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[/] [uart16750/] [trunk/] [syn/] [Altera/] [CycloneII/] [UART16750.tan.summary] - Blame information for rev 17

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Line No. Rev Author Line
1 16 hasw
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Timing Analyzer Summary
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Type           : Worst-case tsu
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Slack          : 2.580 ns
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Required Time  : 10.000 ns
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Actual Time    : 7.420 ns
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From           : WR
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To             : uart_16750:inst|slib_fifo:UART_TXFF|scfifo:scfifo_component|scfifo_an31:auto_generated|a_dpfifo_te31:dpfifo|empty_dff
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From Clock     : --
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To Clock       : CLK
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Failed Paths   : 0
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Type           : Worst-case tco
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Slack          : 2.856 ns
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Required Time  : 15.000 ns
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Actual Time    : 12.144 ns
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From           : uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg5
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To             : DOUT[3]
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From Clock     : CLK
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To Clock       : --
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Failed Paths   : 0
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Type           : Worst-case tpd
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Slack          : N/A
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Required Time  : None
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Actual Time    : 14.563 ns
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From           : A[1]
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To             : DOUT[3]
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From Clock     : --
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To Clock       : --
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Failed Paths   : 0
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Type           : Worst-case th
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Slack          : N/A
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Required Time  : None
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Actual Time    : -2.602 ns
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From           : WR
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To             : uart_16750:inst|slib_edge_detect:UART_ED_WRITE|iDd
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From Clock     : --
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To Clock       : CLK
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Failed Paths   : 0
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Type           : Clock Setup: 'CLK'
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Slack          : 22.036 ns
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Required Time  : 33.33 MHz ( period = 30.003 ns )
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Actual Time    : 125.52 MHz ( period = 7.967 ns )
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From           : uart_16750:inst|iTSR[3]
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To             : uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4]
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From Clock     : CLK
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To Clock       : CLK
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Failed Paths   : 0
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Type           : Clock Hold: 'CLK'
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Slack          : 0.391 ns
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Required Time  : 33.33 MHz ( period = 30.003 ns )
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Actual Time    : N/A
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From           : uart_16750:inst|iLSR_FIFOERR
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To             : uart_16750:inst|iLSR_FIFOERR
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From Clock     : CLK
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To Clock       : CLK
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Failed Paths   : 0
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Type           : Total number of failed paths
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Slack          :
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Required Time  :
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Actual Time    :
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From           :
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To             :
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From Clock     :
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To Clock       :
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Failed Paths   : 0
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