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URL https://opencores.org/ocsvn/uart2bus_testbench/uart2bus_testbench/trunk

Subversion Repositories uart2bus_testbench

[/] [uart2bus_testbench/] [trunk/] [tb/] [run.do] - Blame information for rev 10

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Line No. Rev Author Line
1 2 HanySalah
vlib work
2 6 HanySalah
#------------------------------
3
# BFMs Compiling
4
#------------------------------
5 2 HanySalah
vlog -novopt interfaces/uart_interface.sv +incdir+../
6
vlog -novopt interfaces/rf_interface.sv +incdir+../
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vlog -novopt interfaces/uart_arbiter.sv +incdir+../
8 6 HanySalah
#-----------------------------
9
# Agent Compiling
10
#------------------------------
11 3 HanySalah
vlog -novopt agent/agent_pkg.sv +incdir+agent +incdir+agent/driver  +incdir+./ +incdir+agent/configuration +incdir+agent/sequence +incdir+agent/transaction +incdir+agent/monitor +incdir+agent/coverage
12 6 HanySalah
#-----------------------------
13
# Environment & Scoreboard Compiling
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#------------------------------
15 3 HanySalah
vlog -novopt env/env_pkg.sv +incdir+env +incdir+analysis
16 6 HanySalah
#-----------------------------
17
# UART TEST Compiling
18
#------------------------------
19 2 HanySalah
vlog -novopt uart_pkg.sv +incdir+test/ +incdir+agent/ +incdir+env/ +incdir+./ +incdir+../
20 6 HanySalah
#-----------------------------
21
# UART DUT Compiling
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#------------------------------
23 2 HanySalah
vlog ../rtl/uart_tx.v +incdir+../rtl
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vlog ../rtl/uart_rx.v +incdir+../rtl
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vlog ../rtl/baud_gen.v +incdir+../rtl
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vlog ../rtl/uart_top.v +incdir+../rtl
27
vlog ../rtl/uart_parser.v +incdir+../rtl
28
vlog ../rtl/uart2bus_top.v +incdir+../rtl
29 6 HanySalah
#-----------------------------
30
# UART Top Testbench Compiling
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#------------------------------
32 2 HanySalah
vlog -novopt uart_top.sv +incdir+../../rtl/i2c/ +incdir+./ +incdir+../rtl
33 6 HanySalah
#-----------------------------
34
# UART Top Testbench Simulation
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#------------------------------
36 8 HanySalah
vsim -novopt +coverage uart_top_tb
37
run -all

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