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Line No. Rev Author Line
1 3 HanySalah
//-------------------------------------------------------------------------------------------------
2 2 HanySalah
//
3
//                             UART2BUS VERIFICATION
4
//
5 3 HanySalah
//-------------------------------------------------------------------------------------------------
6 2 HanySalah
// CREATOR    : HANY SALAH
7
// PROJECT    : UART2BUS UVM TEST BENCH
8
// UNIT       : TEST
9 3 HanySalah
//-------------------------------------------------------------------------------------------------
10 2 HanySalah
// TITLE      : UART TEST
11 3 HanySalah
// DESCRIPTION: THIS COMPONENT INCLUDES THE MAIN TESTS THAT WILL BE FORCED TO THE DUT. IT INCLUDES
12
//              VIRTUAL BASE TEST FUNCTION THAT SHARES THE MOST COMMON ATTRIBUTES OF ALL TESTS.
13
//              THE TESTS IMPLEMENTED THROUGH BELOW ARE RELATED TO THE TESTBENCH SPECIFICATIONS
14
//              DOCUMENT. YOU CAN DOWNLOAD IT DIRECTLY THROUGH OPENCORES.COM OR FIND IT IN THE DOC
15
//              DIRECTORY.
16
//-------------------------------------------------------------------------------------------------
17 2 HanySalah
// LOG DETAILS
18
//-------------
19
// VERSION      NAME        DATE        DESCRIPTION
20
//    1       HANY SALAH    10012016    FILE CREATION
21 3 HanySalah
//    2       HANY SALAH    20012016    ADD BINARY MODE TESTS AND INVALID TESTS
22
//    3       HANY SALAH    12022016    IMPROVE BLOCK DESCRIPTION & ADD COMMENTS
23 14 HanySalah
//    4       HANY SALAH    26062017    ADD COVERAGE DRIVEN TEST
24 18 HanySalah
//    5       HANY SALAH    22072017    ADD THE DASHBOARD SETTINGS
25 3 HanySalah
//-------------------------------------------------------------------------------------------------
26
// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
27
// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
28
//-------------------------------------------------------------------------------------------------
29
 
30
//  The base test class that includes the uvm printer and establish the whole environment.
31
//  It also responsible for setting the environment configurations described in details through the
32
//  testbench specifications document.
33
//  The environment configurations are set during the end of elaboration phase. It includes:
34
//    ----------------------------------------------------------------------------------------
35
//  - The active edge   : The active clock edge at which, the data is changed on the UART buses.
36
//                        It could be positive edge or negative edge.
37
//    ----------------------------------------------------------------------------------------
38
//  - The start bit     : Represent the sequence through which the byte is serialized; either to
39
//                        start with the most significant bit or the least significant bit.
40
//    ----------------------------------------------------------------------------------------
41
//  - The data format   : The data representation through the text commands either to be ASCII
42
//                        format or ordinary binary format.
43
//    ----------------------------------------------------------------------------------------
44
//  - The number of stop: The number of stop bits sent after the latest bit of each byte. It
45
//    bit(s)              would be either one or two bits
46
//    ----------------------------------------------------------------------------------------
47
//  - The number of bits: The number of bits within each transferred field. It would be either
48
//    in the field        7 or 8 bits per field.
49
//    ----------------------------------------------------------------------------------------
50
//  - The parity mode   : The used parity type of each field. It would be either no parity bit,
51
//                        odd parity or even parity.
52
//    ----------------------------------------------------------------------------------------
53
//  - The response time : Represent the maximum allowable time within which DUT should respond
54
//                        to the driven request.
55
//    ----------------------------------------------------------------------------------------
56
//  - The false data    : Enable force false data on the output port within the read command
57
//    enable              through the both modes; text or binary.
58
//    ----------------------------------------------------------------------------------------
59
virtual class uart_base_test extends uvm_test;
60
 
61 2 HanySalah
  uart_env          env;
62
 
63
  uvm_table_printer printer;
64
 
65
  uart_config       _config;
66
 
67 9 HanySalah
  int               matched ;
68 10 HanySalah
 
69 16 HanySalah
  `ifdef UVM_1p2
70 17 HanySalah
   uvm_default_report_server    report_server;
71 16 HanySalah
  `else
72
   uvm_report_server    report_server;
73
  `endif
74 14 HanySalah
  int               hit_text_cov=90;
75
  int               hit_bin_cov=90;
76 18 HanySalah
  int               hit_mode_cov=90;
77
 
78
   uart_dashboard       dashboard;
79 9 HanySalah
 
80 18 HanySalah
 
81 9 HanySalah
  `uvm_component_utils_begin(uart_base_test)
82
     `uvm_field_int(matched,UVM_ALL_ON)
83
  `uvm_component_utils_end
84 2 HanySalah
 
85
  function new (string name,uvm_component parent);
86
    super.new(name,parent);
87
  endfunction:new
88
 
89
  function void build_phase (uvm_phase phase);
90
    super.build_phase(phase);
91
 
92
    env = uart_env::type_id::create("env",this);
93
 
94
    _config = uart_config::type_id::create("_config",this);
95 9 HanySalah
 
96 2 HanySalah
    printer = new();
97 17 HanySalah
    `ifdef UVM_1p2
98
     report_server = new("report_server");
99
    `else
100
     report_server = new();
101
    `endif
102 8 HanySalah
    env_configuration();
103 10 HanySalah
    TE_configuration();
104 18 HanySalah
     dashboard = uart_dashboard::type_id::create("uart_dashboard");
105
     uvm_resource_db#(uart_dashboard)::set("shared_cloud","dashboard",dashboard,null);
106 13 HanySalah
    uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
107 2 HanySalah
  endfunction:build_phase
108
 
109
  function void connect_phase (uvm_phase phase);
110
    super.connect_phase(phase);
111
  endfunction:connect_phase
112
 
113 8 HanySalah
  function void env_configuration ();
114 2 HanySalah
    _config._edge         = pos_edge;
115
    _config._start        = lsb;
116
    _config._datamode     = ascii;
117
    _config.num_stop_bits = 1;
118
    _config.num_of_bits   = 8;
119
    _config._paritymode   = parity_off;
120 3 HanySalah
    _config.response_time = 8680;
121
    _config.use_false_data= no;
122 8 HanySalah
  endfunction:env_configuration
123 2 HanySalah
 
124 10 HanySalah
 function void TE_configuration();
125 17 HanySalah
    report_server.set_server(report_server);
126 10 HanySalah
    printer.knobs.depth = 3;
127
    uvm_resource_db#(int)::set("Reporting","matched_packets",0,null);
128
    uvm_root::get().set_timeout(10s);
129 13 HanySalah
    //uvm_root::get().finish_on_completion=1'b0;
130 10 HanySalah
 endfunction // TE_configuration
131 18 HanySalah
 
132
   function void end_of_elaboration_phase (uvm_phase phase);
133
      super.end_of_elaboration_phase(phase);
134
      //dashboard.set_cov_threshold(80,80,80,80,80);
135
   endfunction // end_of_elaboration_phase
136 10 HanySalah
 
137 2 HanySalah
  task run_phase (uvm_phase phase);
138
    phase.phase_done.set_drain_time(this,5000);
139
  endtask:run_phase
140 9 HanySalah
 
141
  function void report_phase (uvm_phase phase);
142 10 HanySalah
     int num_errors;
143
     string status;
144 17 HanySalah
     num_errors = report_server.get_severity_count(UVM_ERROR);
145 9 HanySalah
     uvm_resource_db#(int)::read_by_name("Reporting","matched_packets",matched);
146 17 HanySalah
 
147 10 HanySalah
     if(num_errors == 0) status =  "PASSED";
148
     else status = "FAILED";
149
     $display("--------------------------------------------------\n");
150
     $display("\t\t SIMULATION %s \n",status);
151
     $display("--------------------------------------------------");
152 9 HanySalah
     `uvm_info("FINAL STATUS",$sformatf("The number of matched packets are %0d",matched),UVM_NONE);
153
  endfunction // report_phase
154 11 HanySalah
 
155 2 HanySalah
endclass:uart_base_test
156
 
157 3 HanySalah
//-------------------------------------------------------------------------------------------------
158
//
159
//                          PURE TEXT MODE TESTS
160
//
161
//-------------------------------------------------------------------------------------------------
162 2 HanySalah
 
163 3 HanySalah
  //  This test apply thirteen successive tests of UART write request using text communication mode.
164
  //  Refer to test plan section in the testbench specifications document for more details.
165
  class write_text_mode extends uart_base_test;
166
 
167
    seq_1p1   seq1;
168
    seq_1p2   seq2;
169
    seq_1p3   seq3;
170
    seq_1p4   seq4;
171
    seq_1p5   seq5;
172
    seq_1p6   seq6;
173
    seq_1p7   seq7;
174
    seq_1p8   seq8;
175
    seq_1p9   seq9;
176
    seq_1p10  seq10;
177
    seq_1p11  seq11;
178
    seq_1p12  seq12;
179
    seq_1p13  seq13;
180 2 HanySalah
 
181 3 HanySalah
    `uvm_component_utils(write_text_mode)
182 2 HanySalah
 
183 3 HanySalah
    function new (string name,uvm_component parent);
184
      super.new(name,parent);
185
    endfunction:new
186 2 HanySalah
 
187 3 HanySalah
    function void build_phase (uvm_phase phase);
188
      super.build_phase (phase);
189
      seq1  = seq_1p1::type_id::create("seq1");
190
      seq2  = seq_1p2::type_id::create("seq2");
191
      seq3  = seq_1p3::type_id::create("seq3");
192
      seq4  = seq_1p4::type_id::create("seq4");
193
      seq5  = seq_1p5::type_id::create("seq5");
194
      seq6  = seq_1p6::type_id::create("seq6");
195
      seq7  = seq_1p7::type_id::create("seq7");
196
      seq8  = seq_1p8::type_id::create("seq8");
197
      seq9  = seq_1p9::type_id::create("seq9");
198
      seq10 = seq_1p10::type_id::create("seq10");
199
      seq11 = seq_1p11::type_id::create("seq11");
200
      seq12 = seq_1p12::type_id::create("seq12");
201
      seq13 = seq_1p13::type_id::create("seq13");
202
    endfunction:build_phase
203 2 HanySalah
 
204
 
205 3 HanySalah
    task run_phase (uvm_phase phase);
206
      super.run_phase(phase);
207
      phase.raise_objection(this);
208
      seq1.start(env.agent._seq,null);
209
      seq2.start(env.agent._seq,null);
210
      seq3.start(env.agent._seq,null);
211
      seq4.start(env.agent._seq,null);
212
      seq5.start(env.agent._seq,null);
213
      seq6.start(env.agent._seq,null);
214
      seq7.start(env.agent._seq,null);
215
      seq8.start(env.agent._seq,null);
216
      seq9.start(env.agent._seq,null);
217
      seq10.start(env.agent._seq,null);
218
      seq11.start(env.agent._seq,null);
219
      seq12.start(env.agent._seq,null);
220
      seq13.start(env.agent._seq,null);
221
      phase.drop_objection(this);
222
    endtask:run_phase
223
  endclass:write_text_mode
224 2 HanySalah
 
225 3 HanySalah
  //  This test apply thirteen successive tests of UART read request using text communication mode.
226
  //  Refer to test plan section in the testbench specifications document for more details.
227
  class read_text_mode extends uart_base_test;
228
 
229
    seq_2p1   seq1;
230
    seq_2p2   seq2;
231
    seq_2p3   seq3;
232
    seq_2p4   seq4;
233
    seq_2p5   seq5;
234
    seq_2p6   seq6;
235
    seq_2p7   seq7;
236
    seq_2p8   seq8;
237
    seq_2p9   seq9;
238
    seq_2p10  seq10;
239
    seq_2p11  seq11;
240
    seq_2p12  seq12;
241
    seq_2p13  seq13;
242 2 HanySalah
 
243
 
244 3 HanySalah
    `uvm_component_utils(read_text_mode)
245 2 HanySalah
 
246 3 HanySalah
    function new (string name,uvm_component parent);
247
      super.new(name,parent);
248
    endfunction:new
249 2 HanySalah
 
250 3 HanySalah
    function void build_phase (uvm_phase phase);
251
      super.build_phase(phase);
252
      seq1  = seq_2p1::type_id::create("seq1");
253
      seq2  = seq_2p2::type_id::create("seq2");
254
      seq3  = seq_2p3::type_id::create("seq3");
255
      seq4  = seq_2p4::type_id::create("seq4");
256
      seq5  = seq_2p5::type_id::create("seq5");
257
      seq6  = seq_2p6::type_id::create("seq6");
258
      seq7  = seq_2p7::type_id::create("seq7");
259
      seq8  = seq_2p8::type_id::create("seq8");
260
      seq9  = seq_2p9::type_id::create("seq9");
261
      seq10 = seq_2p10::type_id::create("seq10");
262
      seq11 = seq_2p11::type_id::create("seq11");
263
      seq12 = seq_2p12::type_id::create("seq12");
264
      seq13 = seq_2p13::type_id::create("seq13");
265
    endfunction:build_phase
266 2 HanySalah
 
267 3 HanySalah
    task run_phase (uvm_phase phase);
268
      super.run_phase(phase);
269
      phase.raise_objection(this);
270
      seq1.start(env.agent._seq,null);
271
      seq2.start(env.agent._seq,null);
272
      seq3.start(env.agent._seq,null);
273
      seq4.start(env.agent._seq,null);
274
      seq5.start(env.agent._seq,null);
275
      seq6.start(env.agent._seq,null);
276
      seq7.start(env.agent._seq,null);
277
      seq8.start(env.agent._seq,null);
278
      seq9.start(env.agent._seq,null);
279
      seq10.start(env.agent._seq,null);
280
      seq11.start(env.agent._seq,null);
281
      seq12.start(env.agent._seq,null);
282
      seq13.start(env.agent._seq,null);
283
      phase.drop_objection(this);
284
    endtask:run_phase
285
  endclass:read_text_mode
286 2 HanySalah
 
287 3 HanySalah
//-------------------------------------------------------------------------------------------------
288
//
289
//                          PURE BINARY MODE TESTS
290
//
291
//-------------------------------------------------------------------------------------------------
292 2 HanySalah
 
293 3 HanySalah
  //  This test apply six successive tests of UART nop request using binary communication mode.
294
  //  Refer to test plan section in the testbench specifications document for more details.
295
  class nop_command_mode extends uart_base_test;
296
 
297
    seq_3p1   seq1;
298
    seq_3p2   seq2;
299
    seq_3p3   seq3;
300
    seq_4p1   seq4;
301
    seq_4p2   seq5;
302
    seq_4p3   seq6;
303 2 HanySalah
 
304 3 HanySalah
    `uvm_component_utils(nop_command_mode)
305 2 HanySalah
 
306 3 HanySalah
    function new (string name,uvm_component parent);
307
      super.new(name,parent);
308
    endfunction:new
309 2 HanySalah
 
310 3 HanySalah
    function void build_phase (uvm_phase phase);
311
      super.build_phase(phase);
312
      seq1  = seq_3p1::type_id::create("seq1");
313
      seq2  = seq_3p2::type_id::create("seq2");
314
      seq3  = seq_3p3::type_id::create("seq3");
315
      seq4  = seq_4p1::type_id::create("seq4");
316
      seq5  = seq_4p2::type_id::create("seq5");
317
      seq6  = seq_4p3::type_id::create("seq6");
318
    endfunction:build_phase
319 2 HanySalah
 
320 3 HanySalah
    task run_phase(uvm_phase phase);
321
      super.run_phase(phase);
322
      phase.raise_objection(this);
323
      seq1.start(env.agent._seq,null);
324
      seq2.start(env.agent._seq,null);
325
      seq3.start(env.agent._seq,null);
326
      seq4.start(env.agent._seq,null);
327
      seq5.start(env.agent._seq,null);
328
      seq6.start(env.agent._seq,null);
329
      phase.drop_objection(this);
330
    endtask:run_phase
331
  endclass:nop_command_mode
332 2 HanySalah
 
333
 
334 3 HanySalah
  //  This test apply ten successive tests of UART write request using binary communication mode.
335
  //  Refer to test plan section in the testbench specifications document for more details.
336
  class write_command_mode extends uart_base_test;
337
 
338
    seq_5p1   seq1;
339
    seq_5p2   seq2;
340
    seq_5p3   seq3;
341
    seq_5p4   seq4;
342
    seq_5p5   seq5;
343
    seq_5p6   seq6;
344
    seq_5p7   seq7;
345
    seq_5p8   seq8;
346
    seq_5p9   seq9;
347
    seq_5p10  seq10;
348 2 HanySalah
 
349 3 HanySalah
    `uvm_component_utils(write_command_mode)
350 2 HanySalah
 
351 3 HanySalah
    function new (string name,uvm_component parent);
352
      super.new(name,parent);
353
    endfunction:new
354 2 HanySalah
 
355 3 HanySalah
    function void build_phase (uvm_phase phase);
356
      super.build_phase(phase);
357
      seq1  = seq_5p1::type_id::create("seq1");
358
      seq2  = seq_5p2::type_id::create("seq2");
359
      seq3  = seq_5p3::type_id::create("seq3");
360
      seq4  = seq_5p4::type_id::create("seq4");
361
      seq5  = seq_5p5::type_id::create("seq5");
362
      seq6  = seq_5p6::type_id::create("seq6");
363
      seq7  = seq_5p7::type_id::create("seq7");
364
      seq8  = seq_5p8::type_id::create("seq8");
365
      seq9  = seq_5p9::type_id::create("seq9");
366
      seq10 = seq_5p10::type_id::create("seq10");
367
    endfunction:build_phase
368 2 HanySalah
 
369 3 HanySalah
    task run_phase (uvm_phase phase);
370
      super.run_phase(phase);
371
      phase.raise_objection(this);
372
      uvm_test_done.set_drain_time(this,5000);
373
      //seq1.start(env.agent._seq,null);
374
      seq2.start(env.agent._seq,null);
375
      seq3.start(env.agent._seq,null);
376
      seq4.start(env.agent._seq,null);
377
      seq5.start(env.agent._seq,null);
378
      seq6.start(env.agent._seq,null);
379
      seq7.start(env.agent._seq,null);
380
      seq8.start(env.agent._seq,null);
381
      seq9.start(env.agent._seq,null);
382
      seq10.start(env.agent._seq,null);
383
      phase.drop_objection(this);
384
    endtask:run_phase
385
  endclass: write_command_mode
386 2 HanySalah
 
387
 
388 3 HanySalah
  //  This test apply ten successive tests of UART read request using binary communication mode.
389
  //  Refer to test plan section in the testbench specifications document for more details.
390
  class read_command_mode extends uart_base_test;
391
 
392
    seq_6p1   seq1;
393
    seq_6p2   seq2;
394
    seq_6p3   seq3;
395
    seq_6p4   seq4;
396
    seq_6p5   seq5;
397
    seq_6p6   seq6;
398
    seq_6p7   seq7;
399
    seq_6p8   seq8;
400
    seq_6p9   seq9;
401
    seq_6p10  seq10;
402 2 HanySalah
 
403 3 HanySalah
    `uvm_component_utils(read_command_mode)
404 2 HanySalah
 
405 3 HanySalah
    function new (string name,uvm_component parent);
406
      super.new(name,parent);
407
      seq1  = seq_6p1::type_id::create("seq1");
408
      seq2  = seq_6p2::type_id::create("seq2");
409
      seq3  = seq_6p3::type_id::create("seq3");
410
      seq4  = seq_6p4::type_id::create("seq4");
411
      seq5  = seq_6p5::type_id::create("seq5");
412
      seq6  = seq_6p6::type_id::create("seq6");
413
      seq7  = seq_6p7::type_id::create("seq7");
414
      seq8  = seq_6p8::type_id::create("seq8");
415
      seq9  = seq_6p9::type_id::create("seq9");
416
      seq10 = seq_6p10::type_id::create("seq10");
417
    endfunction:new
418 2 HanySalah
 
419 3 HanySalah
    function void build_phase (uvm_phase phase);
420
      super.build_phase(phase);
421
 
422
    endfunction:build_phase
423
 
424
    task run_phase (uvm_phase phase);
425
      super.run_phase(phase);
426
      phase.raise_objection(this);
427
      //seq1.start(env.agent._seq,null);
428
      seq2.start(env.agent._seq,null);
429
      seq3.start(env.agent._seq,null);
430
      seq4.start(env.agent._seq,null);
431
      seq5.start(env.agent._seq,null);
432
      seq6.start(env.agent._seq,null);
433
      seq7.start(env.agent._seq,null);
434
      seq8.start(env.agent._seq,null);
435
      seq9.start(env.agent._seq,null);
436
      seq10.start(env.agent._seq,null);
437
      phase.drop_objection(this);
438
    endtask:run_phase
439
  endclass:read_command_mode
440
 
441
//-------------------------------------------------------------------------------------------------
442
//
443
//                        COMBINED COMMAND TESTS
444
//
445
//-------------------------------------------------------------------------------------------------
446
 
447
  // this test randomly apply series of 100 text mode commands. They would be either read or write
448
  // sequences described in text mode tests in the testbench specifications document.
449
  class text_mode_test extends uart_base_test;
450
 
451
    rand int unsigned command_number;
452
 
453 11 HanySalah
    bit coverage_hit = 1'b0;
454
 
455 3 HanySalah
    seq_1p1   seq1;
456
    seq_1p2   seq2;
457
    seq_1p3   seq3;
458
    seq_1p4   seq4;
459
    seq_1p5   seq5;
460
    seq_1p6   seq6;
461
    seq_1p7   seq7;
462
    seq_1p8   seq8;
463
    seq_1p9   seq9;
464
    seq_1p10  seq10;
465
    seq_1p11  seq11;
466
    seq_1p12  seq12;
467
    seq_1p13  seq13;
468
 
469
 
470
    seq_2p1   seq14;
471
    seq_2p2   seq15;
472
    seq_2p3   seq16;
473
    seq_2p4   seq17;
474
    seq_2p5   seq18;
475
    seq_2p6   seq19;
476
    seq_2p7   seq20;
477
    seq_2p8   seq21;
478
    seq_2p9   seq22;
479
    seq_2p10  seq23;
480
    seq_2p11  seq24;
481
    seq_2p12  seq25;
482
    seq_2p13  seq26;
483
 
484
    `uvm_component_utils(text_mode_test)
485
 
486
    constraint limit {
487
        command_number inside {[1:26]};
488
    }
489
 
490
    function new (string name , uvm_component parent);
491
      super.new(name,parent);
492
    endfunction:new
493
 
494
    function void build_phase (uvm_phase phase);
495
      super.build_phase(phase);
496
      seq1  = seq_1p1::type_id::create("seq1");
497
      seq2  = seq_1p2::type_id::create("seq2");
498
      seq3  = seq_1p3::type_id::create("seq3");
499
      seq4  = seq_1p4::type_id::create("seq4");
500
      seq5  = seq_1p5::type_id::create("seq5");
501
      seq6  = seq_1p6::type_id::create("seq6");
502
      seq7  = seq_1p7::type_id::create("seq7");
503
      seq8  = seq_1p8::type_id::create("seq8");
504
      seq9  = seq_1p9::type_id::create("seq9");
505
      seq10 = seq_1p10::type_id::create("seq10");
506
      seq11 = seq_1p11::type_id::create("seq11");
507
      seq12 = seq_1p12::type_id::create("seq12");
508
      seq13 = seq_1p13::type_id::create("seq13");
509
      seq14 = seq_2p1::type_id::create("seq14");
510
      seq15 = seq_2p2::type_id::create("seq15");
511
      seq16 = seq_2p3::type_id::create("seq16");
512
      seq17 = seq_2p4::type_id::create("seq17");
513
      seq18 = seq_2p5::type_id::create("seq18");
514
      seq19 = seq_2p6::type_id::create("seq19");
515
      seq20 = seq_2p7::type_id::create("seq20");
516
      seq21 = seq_2p8::type_id::create("seq21");
517
      seq22 = seq_2p9::type_id::create("seq22");
518
      seq23 = seq_2p10::type_id::create("seq23");
519
      seq24 = seq_2p11::type_id::create("seq24");
520
      seq25 = seq_2p12::type_id::create("seq25");
521
      seq26 = seq_2p13::type_id::create("seq26");
522 18 HanySalah
      uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
523 3 HanySalah
    endfunction:build_phase
524
 
525
    task run_phase (uvm_phase phase);
526
      super.run_phase(phase);
527
      phase.raise_objection(this);
528 11 HanySalah
      while (coverage_hit==1'b0)
529 3 HanySalah
        begin
530
        randomize();
531
        case (command_number)
532
          1:
533
            begin
534
            seq1.start(env.agent._seq,null);
535
            end
536
          2:
537
            begin
538
            seq2.start(env.agent._seq,null);
539
            end
540
          3:
541
            begin
542
            seq3.start(env.agent._seq,null);
543
            end
544
          4:
545
            begin
546
            seq4.start(env.agent._seq,null);
547
            end
548
          5:
549
            begin
550
            seq5.start(env.agent._seq,null);
551
            end
552
          6:
553
            begin
554
            seq6.start(env.agent._seq,null);
555
            end
556
          7:
557
            begin
558
            seq7.start(env.agent._seq,null);
559
            end
560
          8:
561
            begin
562
            seq8.start(env.agent._seq,null);
563
            end
564
          9:
565
            begin
566
            seq9.start(env.agent._seq,null);
567
            end
568
          10:
569
            begin
570
            seq10.start(env.agent._seq,null);
571
            end
572
          11:
573
            begin
574
            seq11.start(env.agent._seq,null);
575
            end
576
          12:
577
            begin
578
            seq12.start(env.agent._seq,null);
579
            end
580
          13:
581
            begin
582
            seq13.start(env.agent._seq,null);
583
            end
584
          14:
585
            begin
586
            seq14.start(env.agent._seq,null);
587
            end
588
          15:
589
            begin
590
            seq15.start(env.agent._seq,null);
591
            end
592
          16:
593
            begin
594
            seq16.start(env.agent._seq,null);
595
            end
596
          17:
597
            begin
598
            seq17.start(env.agent._seq,null);
599
            end
600
          18:
601
            begin
602
            seq18.start(env.agent._seq,null);
603
            end
604
          19:
605
            begin
606
            seq19.start(env.agent._seq,null);
607
            end
608
          20:
609
            begin
610
            seq20.start(env.agent._seq,null);
611
            end
612
          21:
613
            begin
614
            seq21.start(env.agent._seq,null);
615
            end
616
          22:
617
            begin
618
            seq22.start(env.agent._seq,null);
619
            end
620
          23:
621
            begin
622
            seq23.start(env.agent._seq,null);
623
            end
624
          24:
625
            begin
626
            seq24.start(env.agent._seq,null);
627
            end
628
          25:
629
            begin
630
            seq25.start(env.agent._seq,null);
631
            end
632
          26:
633
            begin
634
            seq26.start(env.agent._seq,null);
635
            end
636
          default:
637
            begin
638
            `uvm_fatal("OUT OF RANGE","Command Number is Out of Range")
639
            end
640 11 HanySalah
        endcase // case (command_number)
641
        evaluate_coverage();
642 3 HanySalah
        end
643
        phase.drop_objection(this);
644
    endtask:run_phase
645 11 HanySalah
 
646
    function void evaluate_coverage();
647
       int text_coverage;
648
       uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
649
       if(text_coverage >= 95) coverage_hit=1'b1;
650
    endfunction // evaluate_coverage
651
 
652 13 HanySalah
 endclass:text_mode_test
653
 
654
//-------------------------------------------------------------------------------------------------
655
//
656
//                        Coverage Driven Test
657
//
658
//-------------------------------------------------------------------------------------------------
659
 
660 18 HanySalah
class coverage_base_test extends uart_base_test;
661 13 HanySalah
 
662
   rand int unsigned testnumber;
663
 
664
   bit     coverage_hit=1'b0;
665
 
666
   int     iteration=0;
667
 
668 18 HanySalah
   parameter MAX_ITER=10000;
669
 
670
   uvm_table_printer cov_pr;
671 13 HanySalah
 
672
   // Text write tests
673
    seq_1p1   seq1;
674
    seq_1p2   seq2;
675
    seq_1p3   seq3;
676
    seq_1p4   seq4;
677
    seq_1p5   seq5;
678
    seq_1p8   seq6;
679
    seq_1p9   seq7;
680
    seq_1p10  seq8;
681
    seq_1p11  seq9;
682
    seq_1p12  seq10;
683
 
684
   // Text read tests
685
    seq_2p1   seq11;
686
    seq_2p2   seq12;
687
    seq_2p3   seq13;
688
   // seq_2p4   seq17;
689
    seq_2p5   seq14;
690
    seq_2p8   seq15;
691
    seq_2p9   seq16;
692
    seq_2p10  seq17;
693
    seq_2p11  seq18;
694
    seq_2p12  seq19;
695
 
696
   // NOP
697
   seq_3p1    seq20;
698
   seq_3p2    seq21;
699
   seq_3p3    seq22;
700
   seq_4p1    seq23;
701
   seq_4p2    seq24;
702
   seq_4p3    seq25;
703
 
704
   // Write Command Mode
705
   seq_5p2    seq26;
706
   seq_5p3    seq27;
707
   seq_5p4    seq28;
708
   seq_5p5    seq29;
709
   seq_5p6    seq30;
710
   seq_5p7    seq31;
711
   seq_5p8    seq32;
712
   seq_5p9    seq33;
713
   seq_5p10   seq34;
714
 
715
   // Read Command Mode
716
   seq_6p2    seq35;
717
   seq_6p3    seq36;
718
   seq_6p4    seq37;
719
   seq_6p5    seq38;
720
   seq_6p6    seq39;
721
   seq_6p7    seq40;
722
   seq_6p8    seq41;
723
   seq_6p9    seq42;
724
   seq_6p10   seq43;
725
 
726
   // GRANT test
727
   seq_7p1    seq44;
728
   seq_7p2    seq45;
729
 
730
 
731 18 HanySalah
   `uvm_component_utils(coverage_base_test)
732 13 HanySalah
 
733
   constraint validtest{testnumber inside{[0:45]};
734 14 HanySalah
                        testnumber != 13;
735
                        testnumber != 9;
736
                        testnumber != 19;
737
                        testnumber != 21;
738
                        testnumber != 24;}
739 13 HanySalah
 
740
   function new (string name,uvm_component parent);
741
      super.new(name,parent);
742
   endfunction // new
743
 
744
   function void build_phase (uvm_phase phase);
745
      super.build_phase(phase);
746
      seq1      = seq_1p1::type_id::create("seq1");
747
      seq2      = seq_1p2::type_id::create("seq2");
748
      seq3      = seq_1p3::type_id::create("seq3");
749
      seq4      = seq_1p4::type_id::create("seq4");
750
      seq5      = seq_1p5::type_id::create("seq5");
751
      seq6      = seq_1p8::type_id::create("seq6");
752
      seq7      = seq_1p9::type_id::create("seq7");
753
      seq8      = seq_1p10::type_id::create("seq8");
754
      seq9      = seq_1p11::type_id::create("seq9");
755
      seq10     = seq_1p12::type_id::create("seq10");
756
      seq11     = seq_2p1::type_id::create("seq11");
757
      seq12     = seq_2p2::type_id::create("seq12");
758
      seq13     = seq_2p3::type_id::create("seq13");
759
      //seq17   = seq_2p4::type_id::create("seq17");
760
      seq14     = seq_2p5::type_id::create("seq14");
761
      seq15     = seq_2p8::type_id::create("seq15");
762
      seq16     = seq_2p9::type_id::create("seq16");
763
      seq17     = seq_2p10::type_id::create("seq17");
764
      seq18     = seq_2p11::type_id::create("seq18");
765
      seq19     = seq_2p12::type_id::create("seq19");
766
      seq20     = seq_3p1::type_id::create("seq20");
767
      seq21     = seq_3p2::type_id::create("seq21");
768
      seq22     = seq_3p3::type_id::create("seq22");
769
      seq23     = seq_4p1::type_id::create("seq23");
770
      seq24     = seq_4p2::type_id::create("seq24");
771
      seq25     = seq_4p3::type_id::create("seq25");
772
      seq26     = seq_5p2::type_id::create("seq26");
773
      seq27     = seq_5p3::type_id::create("seq27");
774
      seq28     = seq_5p4::type_id::create("seq28");
775
      seq29     = seq_5p5::type_id::create("seq29");
776
      seq30     = seq_5p6::type_id::create("seq30");
777
      seq31     = seq_5p7::type_id::create("seq31");
778
      seq32     = seq_5p8::type_id::create("seq32");
779
      seq33     = seq_5p9::type_id::create("seq33");
780
      seq34     = seq_5p10::type_id::create("seq34");
781
      seq35     = seq_6p2::type_id::create("seq35");
782
      seq36     = seq_6p3::type_id::create("seq36");
783
      seq37     = seq_6p4::type_id::create("seq37");
784
      seq38     = seq_6p5::type_id::create("seq38");
785
      seq39     = seq_6p6::type_id::create("seq39");
786
      seq40     = seq_6p7::type_id::create("seq40");
787
      seq41     = seq_6p8::type_id::create("seq41");
788
      seq42     = seq_6p9::type_id::create("seq42");
789
      seq43     = seq_6p10::type_id::create("seq43");
790
      seq44     = seq_7p1::type_id::create("seq44");
791
      seq45     = seq_7p2::type_id::create("seq45");
792 18 HanySalah
      cov_pr    = new();
793 13 HanySalah
   endfunction // build_phase
794
 
795 18 HanySalah
   function void end_of_elaboration_phase (uvm_phase phase);
796
      super.end_of_elaboration_phase(phase);
797
      cov_pr.knobs.default_radix=UVM_DEC;
798
   endfunction // end_of_elaboration_phase
799
 
800 13 HanySalah
   task run_phase (uvm_phase phase);
801
      super.run_phase(phase);
802
      phase.raise_objection(this);
803 18 HanySalah
      while(!dashboard.hit_coverage && (iteration < MAX_ITER)) begin
804 14 HanySalah
     // while(iteration < 1000) begin
805 13 HanySalah
         iteration++;
806
         randomize();
807
         case(testnumber)
808
           0:
809
             begin
810
                seq1.start(env.agent._seq,null);
811
             end
812
           1:
813
             begin
814
                seq2.start(env.agent._seq,null);
815
             end
816
           2:
817
             begin
818
                seq3.start(env.agent._seq,null);
819
             end
820
           3:
821
             begin
822
                seq4.start(env.agent._seq,null);
823
             end
824
           4:
825
             begin
826
                seq5.start(env.agent._seq,null);
827
             end
828
           5:
829
             begin
830
                seq6.start(env.agent._seq,null);
831
             end
832
           6:
833
             begin
834
                seq7.start(env.agent._seq,null);
835
             end
836
           7:
837
             begin
838
                seq8.start(env.agent._seq,null);
839
             end
840
           8:
841
             begin
842
                seq9.start(env.agent._seq,null);
843
             end
844
           9:
845
             begin
846
                seq10.start(env.agent._seq,null);
847
             end
848
           10:
849
             begin
850
                seq11.start(env.agent._seq,null);
851
             end
852
           11:
853
             begin
854
                seq12.start(env.agent._seq,null);
855
             end
856
           12:
857
             begin
858
                seq13.start(env.agent._seq,null);
859
             end
860
          /* 13:
861
             begin
862
                seq17.start(env.agent._seq,null);
863
             end*/
864
           14:
865
             begin
866
                seq14.start(env.agent._seq,null);
867
             end
868
           15:
869
             begin
870
                seq15.start(env.agent._seq,null);
871
             end
872
           16:
873
             begin
874
                seq16.start(env.agent._seq,null);
875
             end
876
           17:
877
             begin
878
                seq17.start(env.agent._seq,null);
879
             end
880
           18:
881
             begin
882
                seq18.start(env.agent._seq,null);
883
             end
884
           19:
885
             begin
886
                seq19.start(env.agent._seq,null);
887
             end
888
           20:
889
             begin
890
                seq20.start(env.agent._seq,null);
891
             end
892
           21:
893
             begin
894
                seq21.start(env.agent._seq,null);
895
             end
896
           22:
897
             begin
898
                seq22.start(env.agent._seq,null);
899
             end
900
           23:
901
             begin
902
                seq23.start(env.agent._seq,null);
903
             end
904
           24:
905
             begin
906
                seq24.start(env.agent._seq,null);
907
             end
908
           25:
909
             begin
910
                seq25.start(env.agent._seq,null);
911
             end
912
           26:
913
             begin
914
                seq26.start(env.agent._seq,null);
915
             end
916
           27:
917
             begin
918
                seq27.start(env.agent._seq,null);
919
             end
920
           28:
921
             begin
922
                seq28.start(env.agent._seq,null);
923
             end
924
           29:
925
             begin
926
                seq29.start(env.agent._seq,null);
927
             end
928
           30:
929
             begin
930
                seq30.start(env.agent._seq,null);
931
             end
932
           31:
933
             begin
934
                seq31.start(env.agent._seq,null);
935
             end
936
           32:
937
             begin
938
                seq32.start(env.agent._seq,null);
939
             end
940
           33:
941
             begin
942
                seq33.start(env.agent._seq,null);
943
             end
944
           34:
945
             begin
946
                seq34.start(env.agent._seq,null);
947
             end
948
           35:
949
             begin
950
                seq35.start(env.agent._seq,null);
951
             end
952
           36:
953
             begin
954
                seq36.start(env.agent._seq,null);
955
             end
956
           37:
957
             begin
958
                seq37.start(env.agent._seq,null);
959
             end
960
           38:
961
             begin
962
                seq38.start(env.agent._seq,null);
963
             end
964
           39:
965
             begin
966
                seq39.start(env.agent._seq,null);
967
             end
968
           40:
969
             begin
970
                seq40.start(env.agent._seq,null);
971
             end
972
           41:
973
             begin
974
                seq41.start(env.agent._seq,null);
975
             end
976
           42:
977
             begin
978
                seq42.start(env.agent._seq,null);
979
             end
980
           43:
981
             begin
982
                seq43.start(env.agent._seq,null);
983
             end
984
           44:
985
             begin
986
                seq44.start(env.agent._seq,null);
987
             end
988
           45:
989
             begin
990
                seq45.start(env.agent._seq,null);
991
             end
992
           default:
993
             begin
994
                `uvm_error("TE","Invalid_test")
995
             end
996
         endcase // case (testnumber)
997 18 HanySalah
      end // while (!dashboard.hit_coverage && (iteration < MAX_ITER))
998 13 HanySalah
      phase.drop_objection(this);
999
   endtask // run_phase
1000
 
1001
   function void report_phase(uvm_phase phase);
1002 14 HanySalah
      int  text_cov;
1003
      int  mode_cov;
1004
      int  bin_cov;
1005 13 HanySalah
      super.report_phase(phase);
1006 18 HanySalah
     if(!dashboard.hit_coverage)
1007 13 HanySalah
       begin
1008 18 HanySalah
          `uvm_warning("SIM","Coverage not hit");
1009
          dashboard.print(cov_pr);
1010 13 HanySalah
       end
1011 14 HanySalah
     else begin
1012
        `uvm_info("SIM",$sformatf("Simulation hit the coverage successfully by %0d transactions",iteration),UVM_NONE);
1013 18 HanySalah
        dashboard.print(cov_pr);
1014 14 HanySalah
     end
1015 13 HanySalah
   endfunction // report_phase
1016
 
1017 18 HanySalah
endclass // coverage_base_test

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