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<div class="title">E:/uart_block/hdl/iseProject/pkgDefinitions.vhd</div> </div>
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<a href="pkg_definitions_8vhd.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001
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<a name="l00003"></a>00003
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<a name="l00012"></a>00012
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<a name="l00014"></a>00014
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<a name="l00015"></a>00015 <span class="vhdlkeyword">library </span><span class="keywordflow">IEEE</span>;
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<a name="l00016"></a>00016 <span class="vhdlkeyword">use </span>IEEE.STD_LOGIC_1164.<span class="vhdlkeyword">all</span>;
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<a name="l00017"></a>00017
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<a name="l00018"></a><a class="code" href="namespacepkg_definitions.html">00018</a> <span class="keywordflow">package </span>pkgDefinitions <span class="vhdlkeyword">is</span>
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<a name="l00019"></a>00019
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<a name="l00021"></a>00021 <span class="vhdlkeyword">constant</span> <span class="vhdlchar">nBits</span> <span class="vhdlchar">:</span> <span class="comment">integer</span> <span class="vhdlchar">:=</span> <span class="vhdllogic"></span><span class="vhdllogic">8</span>;
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<a name="l00022"></a>00022 <span class="vhdlkeyword">constant</span> <span class="vhdlchar">nBitsLarge</span> <span class="vhdlchar">:</span> <span class="comment">integer</span> <span class="vhdlchar">:=</span> <span class="vhdllogic"></span><span class="vhdllogic">32</span>;
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<a name="l00023"></a>00023
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<a name="l00024"></a>00024 <span class="vhdlkeyword">type</span> <span class="vhdlchar">txStates</span> <span class="vhdlkeyword">is</span> <span class="vhdlchar">(</span><span class="vhdlchar">tx_idle</span><span class="vhdlchar">,</span> <span class="vhdlchar">tx_start</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit0</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit1</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit2</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit3</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit4</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit5</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit6</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit7</span><span class="vhdlchar">,</span> <span class="vhdlchar">tx_stop1</span><span class="vhdlchar">,</span> <span class="vhdlchar">tx_stop2</span><span class="vhdlchar">)</span>;
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<a name="l00025"></a>00025 <span class="vhdlkeyword">type</span> <span class="vhdlchar">rxStates</span> <span class="vhdlkeyword">is</span> <span class="vhdlchar">(</span><span class="vhdlchar">bit0</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit1</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit2</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit3</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit4</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit5</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit6</span><span class="vhdlchar">,</span> <span class="vhdlchar">bit7</span><span class="vhdlchar">,</span> <span class="vhdlchar">rx_stop</span><span class="vhdlchar">,</span> <span class="vhdlchar">rx_idle</span><span class="vhdlchar">)</span>;
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<a name="l00026"></a>00026 <span class="vhdlkeyword">type</span> <span class="vhdlchar">rxFilterStates</span> <span class="vhdlkeyword">is</span> <span class="vhdlchar">(</span><span class="vhdlchar">s0</span><span class="vhdlchar">,</span> <span class="vhdlchar">s1</span><span class="vhdlchar">,</span> <span class="vhdlchar">s2</span><span class="vhdlchar">,</span> <span class="vhdlchar">s3</span><span class="vhdlchar">,</span> <span class="vhdlchar">s4</span><span class="vhdlchar">)</span>;
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<a name="l00027"></a>00027
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<a name="l00028"></a>00028 <span class="vhdlkeyword">type</span> <span class="vhdlchar">sendByte</span> <span class="vhdlkeyword">is</span> <span class="vhdlchar">(</span><span class="vhdlchar">idle</span><span class="vhdlchar">,</span> <span class="vhdlchar">prepare_byte</span><span class="vhdlchar">,</span> <span class="vhdlchar">start_sending</span><span class="vhdlchar">,</span> <span class="vhdlchar">wait_completion</span><span class="vhdlchar">)</span>;
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<a name="l00029"></a>00029
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<a name="l00030"></a>00030 <span class="vhdlkeyword">type</span> <span class="vhdlchar">testMaster</span> <span class="vhdlkeyword">is</span> <span class="vhdlchar">(</span><span class="vhdlchar">idle</span><span class="vhdlchar">,</span> <span class="vhdlchar">config_clock</span><span class="vhdlchar">,</span> <span class="vhdlchar">config_baud</span><span class="vhdlchar">,</span> <span class="vhdlchar">send_byte</span><span class="vhdlchar">,</span> <span class="vhdlchar">receive_byte</span><span class="vhdlchar">,</span> <span class="vhdlchar">wait_cycles</span><span class="vhdlchar">)</span>;
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<a name="l00031"></a>00031
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<a name="l00032"></a>00032 <span class="vhdlkeyword">end</span> <span class="vhdlchar">pkgDefinitions</span>;
|
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<a name="l00033"></a>00033
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<a name="l00034"></a><a class="code" href="class__pkg_definitions.html">00034</a> <span class="vhdlkeyword">package</span> <span class="vhdlkeyword">body</span> _pkgDefinitions <span class="vhdlkeyword">is</span>
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<a name="l00035"></a>00035
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<a name="l00036"></a>00036 <span class="vhdlkeyword">end</span> <span class="vhdlchar">pkgDefinitions</span>;
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</pre></div></div><!-- contents -->
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<li class="footer">Generated on Sat May 12 2012 22:28:05 for Uart wishbone slave Documentation by
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