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<div class="title">E:/uart_block/hdl/iseProject/testUart_control.vhd</div> </div>
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</div><!--header-->
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<div class="fragment"><pre class="fragment"><a name="l00001"></a>00001
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| 115 |
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<a name="l00002"></a>00002 <span class="vhdlkeyword">LIBRARY </span><span class="keywordflow">ieee</span>;
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| 116 |
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<a name="l00003"></a>00003 <span class="vhdlkeyword">USE </span>ieee.std_logic_1164.<span class="vhdlkeyword">ALL</span>;
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| 117 |
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<a name="l00004"></a>00004 <span class="vhdlkeyword">use </span>ieee.std_logic_unsigned.<span class="vhdlkeyword">all</span>;
|
| 118 |
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<a name="l00005"></a>00005 <span class="vhdlkeyword">use </span>ieee.std_logic_arith.<span class="vhdlkeyword">all</span>;
|
| 119 |
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<a name="l00006"></a>00006
|
| 120 |
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<a name="l00008"></a><a class="code" href="classtest_uart__control.html#ac442dca664056131bdaf5c92e4351e01">00008</a> <span class="vhdlkeyword">use </span>work.pkgDefinitions.<span class="vhdlkeyword">all</span>;
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| 121 |
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<a name="l00009"></a>00009
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| 122 |
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<a name="l00010"></a><a class="code" href="classtest_uart__control.html">00010</a> <span class="keywordflow">ENTITY </span><a class="code" href="classtest_uart__control.html">testUart_control</a> <span class="vhdlkeyword">IS</span>
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| 123 |
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<a name="l00011"></a>00011 <span class="vhdlkeyword">END</span> <span class="vhdlchar">testUart_control</span>;
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| 124 |
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<a name="l00012"></a>00012
|
| 125 |
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<a name="l00013"></a><a class="code" href="classtest_uart__control_1_1behavior.html">00013</a> <span class="vhdlkeyword">ARCHITECTURE</span> behavior <span class="vhdlkeyword">OF</span> <a class="code" href="classtest_uart__control.html">testUart_control</a> IS
|
| 126 |
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<a name="l00014"></a>00014 <span class="keyword"></span>
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| 127 |
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<a name="l00015"></a>00015 <span class="keyword"> -- <span class="vhdlkeyword">Component</span> Declaration <span class="vhdlkeyword">for</span> the Unit Under Test (UUT)</span>
|
| 128 |
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<a name="l00016"></a>00016
|
| 129 |
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<a name="l00017"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a7a7412e3b159b0289f620fa9ce2773b4">00017</a> <span class="vhdlkeyword">COMPONENT</span> <a class="code" href="classuart__control.html">uart_control</a>
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| 130 |
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<a name="l00018"></a>00018 <span class="vhdlkeyword">Port</span> ( <a class="code" href="classuart__control.html#a9d3a5df2e98b99b950613d125404f7e7" title="Global reset.">rst</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>;
|
| 131 |
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<a name="l00019"></a>00019 <a class="code" href="classuart__control.html#aaa012193baea07aae07ac241afc38d4e" title="Global clock.">clk</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>;
|
| 132 |
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<a name="l00020"></a>00020 <a class="code" href="classuart__control.html#a5d0f1fd17d4ada84491cbbcdff7bd59c" title="Write enable.">WE</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>;
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| 133 |
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<a name="l00021"></a>00021 <a class="code" href="classuart__control.html#a26488fd3af03df7e52e89685254581d9" title="Register address.">reg_addr</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic_vector</span> (<span class="vhdllogic"></span><span class="vhdllogic">1</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 134 |
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<a name="l00022"></a>00022 <a class="code" href="classuart__control.html#ae66e1f3b5a7b302a165fd87d2ebf8008" title="Start (Strobe)">start</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>;
|
| 135 |
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<a name="l00023"></a>00023 <a class="code" href="classuart__control.html#a4772fc34e10751f941e00c7f532d3a51" title="Done (ACK)">done</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic</span>;
|
| 136 |
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<a name="l00024"></a>00024 <a class="code" href="classuart__control.html#a6a4e14f575e5b97e6af7829108a9cdb6" title="Data Input (Wishbone)">DAT_I</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic_vector</span> ((nBitsLarge<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 137 |
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<a name="l00025"></a>00025 <a class="code" href="classuart__control.html#aa0441f210e0ee245a9ee654ee0ecb105" title="Data output (Wishbone)">DAT_O</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic_vector</span> ((nBitsLarge<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 138 |
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|
<a name="l00026"></a>00026 <a class="code" href="classuart__control.html#ad78e0a527c5f5c8c3ffa83c438b6f61f" title="Signal to control the baud rate frequency.">baud_wait</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic_vector</span> ((nBitsLarge<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 139 |
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<a name="l00027"></a>00027 <a class="code" href="classuart__control.html#af5fbd616289aa28ef674937c72548374" title="1 Byte to be send to serial_transmitter">data_byte_tx</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic_vector</span>((nBits<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 140 |
|
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<a name="l00028"></a>00028 <a class="code" href="classuart__control.html#a938ea181dcf736513f3743dcf22dbf85" title="1 Byte to be received by serial_receiver">data_byte_rx</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic_vector</span>((nBits<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>);
|
| 141 |
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<a name="l00029"></a>00029 <a class="code" href="classuart__control.html#af90e032a76aef85021ee288bbec12e11" title="Signal comming from serial_transmitter.">tx_data_sent</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>;
|
| 142 |
|
|
<a name="l00030"></a>00030 <a class="code" href="classuart__control.html#ac8df6578912d098bdb9f21cb0509fb63" title="Signal to start sending serial data...">tx_start</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic</span>;
|
| 143 |
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<a name="l00031"></a>00031 <a class="code" href="classuart__control.html#a665e6854e6570b00bd7d35db2049f54f" title="Reset Communication blocks.">rst_comm_blocks</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic</span>;
|
| 144 |
|
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<a name="l00032"></a>00032 <a class="code" href="classuart__control.html#a0f38cbc4316d4bba03252027fe0fabc7" title="Signal comming from serial_receiver.">rx_data_ready</a> : <span class="vhdlkeyword">in</span> <span class="comment">std_logic</span>);
|
| 145 |
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<a name="l00033"></a>00033 <span class="vhdlkeyword">END</span> <span class="vhdlkeyword">COMPONENT</span>;
|
| 146 |
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<a name="l00034"></a>00034
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| 147 |
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<a name="l00035"></a>00035 <span class="keyword"></span>
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| 148 |
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<a name="l00036"></a>00036 <span class="keyword"> --Inputs</span>
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| 149 |
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<a name="l00037"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a3366a143573fb930480d87caf161678a">00037</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3366a143573fb930480d87caf161678a" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 150 |
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<a name="l00038"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c">00038</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
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| 151 |
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<a name="l00039"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd">00039</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
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| 152 |
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<a name="l00040"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a2617c016d93a2d14227b30d854f9e883">00040</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a2617c016d93a2d14227b30d854f9e883" title="Signal to connect with UUT.">reg_addr</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">1</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
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| 153 |
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<a name="l00041"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658">00041</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
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<a name="l00042"></a><a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94">00042</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94" title="Signal to connect with UUT.">DAT_I</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
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|
<a name="l00043"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a2542843dc0c2f045329ede0cd8b0f29d">00043</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a2542843dc0c2f045329ede0cd8b0f29d" title="Signal to connect with UUT.">data_byte_rx</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBits</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
|
| 156 |
|
|
<a name="l00044"></a><a class="code" href="classtest_uart__control_1_1behavior.html#ac165676e87cdd92109480bfa6d5cc444">00044</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ac165676e87cdd92109480bfa6d5cc444" title="Signal to connect with UUT.">tx_data_sent</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 157 |
|
|
<a name="l00045"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a5a02d4c51339f0711500faf0a9f9456c">00045</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a5a02d4c51339f0711500faf0a9f9456c" title="Signal to connect with UUT.">rx_data_ready</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 158 |
|
|
<a name="l00046"></a>00046 <span class="keyword"></span>
|
| 159 |
|
|
<a name="l00047"></a>00047 <span class="keyword"> --Outputs</span>
|
| 160 |
|
|
<a name="l00048"></a><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92">00048</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>;
|
| 161 |
|
|
<a name="l00049"></a><a class="code" href="classtest_uart__control_1_1behavior.html#acb24fd5efec09c4d3e95c15786f7c71d">00049</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#acb24fd5efec09c4d3e95c15786f7c71d" title="Signal to connect with UUT.">tx_start</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>;
|
| 162 |
|
|
<a name="l00050"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a21b571630e861153c8507061cc4d9b8c">00050</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a21b571630e861153c8507061cc4d9b8c" title="Signal to connect with UUT.">rst_comm_blocks</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>;
|
| 163 |
|
|
<a name="l00051"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a5894aac3d2f33bfa9c8079569ae53665">00051</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a5894aac3d2f33bfa9c8079569ae53665" title="Signal to connect with UUT.">DAT_O</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
|
| 164 |
|
|
<a name="l00052"></a><a class="code" href="classtest_uart__control_1_1behavior.html#ae0c629e5bf429d5f1972891f357521b1">00052</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ae0c629e5bf429d5f1972891f357521b1" title="Signal to connect with UUT.">baud_wait</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
|
| 165 |
|
|
<a name="l00053"></a><a class="code" href="classtest_uart__control_1_1behavior.html#a9eee909c85ebe364cc76261f89cb4e3e">00053</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9eee909c85ebe364cc76261f89cb4e3e" title="Signal to connect with UUT.">data_byte_tx</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBits</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
|
| 166 |
|
|
<a name="l00054"></a>00054 <span class="keyword"></span>
|
| 167 |
|
|
<a name="l00055"></a>00055 <span class="keyword"> -- Clock period definitions</span>
|
| 168 |
|
|
<a name="l00056"></a>00056 <span class="vhdlkeyword">constant</span> <span class="vhdlchar">clk_period</span> <span class="vhdlchar">:</span> <span class="comment">time</span> <span class="vhdlchar">:=</span> <span class="vhdllogic"></span><span class="vhdllogic">20</span> <span class="vhdlchar">ns</span>;<span class="keyword"> -- 20ns (50Mhz)</span>
|
| 169 |
|
|
<a name="l00057"></a>00057
|
| 170 |
|
|
<a name="l00058"></a>00058 <span class="vhdlkeyword">BEGIN</span>
|
| 171 |
|
|
<a name="l00059"></a>00059
|
| 172 |
|
|
<a name="l00061"></a>00061 <a class="code" href="dummy.html#a1619316ad715601eb5d3559db829ac05" title="Instantiate the Unit Under Test (UUT)">uut</a>: <a class="code" href="classuart__control.html">uart_control</a> <span class="vhdlkeyword">PORT</span> <span class="vhdlkeyword">MAP</span> (
|
| 173 |
|
|
<a name="l00062"></a>00062 <a class="code" href="classuart__control.html#a9d3a5df2e98b99b950613d125404f7e7" title="Global reset.">rst</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a3366a143573fb930480d87caf161678a" title="Signal to connect with UUT.">rst</a>,
|
| 174 |
|
|
<a name="l00063"></a>00063 <a class="code" href="classuart__control.html#aaa012193baea07aae07ac241afc38d4e" title="Global clock.">clk</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c" title="Signal to connect with UUT.">clk</a>,
|
| 175 |
|
|
<a name="l00064"></a>00064 <a class="code" href="classuart__control.html#a5d0f1fd17d4ada84491cbbcdff7bd59c" title="Write enable.">WE</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a>,
|
| 176 |
|
|
<a name="l00065"></a>00065 <a class="code" href="classuart__control.html#a26488fd3af03df7e52e89685254581d9" title="Register address.">reg_addr</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a2617c016d93a2d14227b30d854f9e883" title="Signal to connect with UUT.">reg_addr</a>,
|
| 177 |
|
|
<a name="l00066"></a>00066 <a class="code" href="classuart__control.html#ae66e1f3b5a7b302a165fd87d2ebf8008" title="Start (Strobe)">start</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a>,
|
| 178 |
|
|
<a name="l00067"></a>00067 <a class="code" href="classuart__control.html#a4772fc34e10751f941e00c7f532d3a51" title="Done (ACK)">done</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a>,
|
| 179 |
|
|
<a name="l00068"></a>00068 <a class="code" href="classuart__control.html#a6a4e14f575e5b97e6af7829108a9cdb6" title="Data Input (Wishbone)">DAT_I</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94" title="Signal to connect with UUT.">DAT_I</a>,
|
| 180 |
|
|
<a name="l00069"></a>00069 <a class="code" href="classuart__control.html#aa0441f210e0ee245a9ee654ee0ecb105" title="Data output (Wishbone)">DAT_O</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a5894aac3d2f33bfa9c8079569ae53665" title="Signal to connect with UUT.">DAT_O</a>,
|
| 181 |
|
|
<a name="l00070"></a>00070 <a class="code" href="classuart__control.html#ad78e0a527c5f5c8c3ffa83c438b6f61f" title="Signal to control the baud rate frequency.">baud_wait</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#ae0c629e5bf429d5f1972891f357521b1" title="Signal to connect with UUT.">baud_wait</a>,
|
| 182 |
|
|
<a name="l00071"></a>00071 <a class="code" href="classuart__control.html#af5fbd616289aa28ef674937c72548374" title="1 Byte to be send to serial_transmitter">data_byte_tx</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a9eee909c85ebe364cc76261f89cb4e3e" title="Signal to connect with UUT.">data_byte_tx</a>,
|
| 183 |
|
|
<a name="l00072"></a>00072 <a class="code" href="classuart__control.html#a938ea181dcf736513f3743dcf22dbf85" title="1 Byte to be received by serial_receiver">data_byte_rx</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a2542843dc0c2f045329ede0cd8b0f29d" title="Signal to connect with UUT.">data_byte_rx</a>,
|
| 184 |
|
|
<a name="l00073"></a>00073 <a class="code" href="classuart__control.html#af90e032a76aef85021ee288bbec12e11" title="Signal comming from serial_transmitter.">tx_data_sent</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#ac165676e87cdd92109480bfa6d5cc444" title="Signal to connect with UUT.">tx_data_sent</a>,
|
| 185 |
|
|
<a name="l00074"></a>00074 <a class="code" href="classuart__control.html#a665e6854e6570b00bd7d35db2049f54f" title="Reset Communication blocks.">rst_comm_blocks</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a21b571630e861153c8507061cc4d9b8c" title="Signal to connect with UUT.">rst_comm_blocks</a>,
|
| 186 |
|
|
<a name="l00075"></a>00075 <a class="code" href="classuart__control.html#ac8df6578912d098bdb9f21cb0509fb63" title="Signal to start sending serial data...">tx_start</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#acb24fd5efec09c4d3e95c15786f7c71d" title="Signal to connect with UUT.">tx_start</a>,
|
| 187 |
|
|
<a name="l00076"></a>00076 <a class="code" href="classuart__control.html#a0f38cbc4316d4bba03252027fe0fabc7" title="Signal comming from serial_receiver.">rx_data_ready</a> => <a class="code" href="classtest_uart__control_1_1behavior.html#a5a02d4c51339f0711500faf0a9f9456c" title="Signal to connect with UUT.">rx_data_ready</a>
|
| 188 |
|
|
<a name="l00077"></a>00077 <span class="vhdlchar">)</span>;
|
| 189 |
|
|
<a name="l00078"></a>00078 <span class="keyword"></span>
|
| 190 |
|
|
<a name="l00079"></a>00079 <span class="keyword"> -- Clock <span class="vhdlkeyword">process</span> definitions</span>
|
| 191 |
|
|
<a name="l00080"></a>00080 clk_process :<span class="vhdlkeyword">process</span>
|
| 192 |
|
|
<a name="l00081"></a>00081 <span class="vhdlkeyword">begin</span>
|
| 193 |
|
|
<a name="l00082"></a>00082 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 194 |
|
|
<a name="l00083"></a>00083 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span><span class="vhdlchar">/</span><span class="vhdllogic"></span><span class="vhdllogic">2</span>;
|
| 195 |
|
|
<a name="l00084"></a>00084 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 196 |
|
|
<a name="l00085"></a>00085 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span><span class="vhdlchar">/</span><span class="vhdllogic"></span><span class="vhdllogic">2</span>;
|
| 197 |
|
|
<a name="l00086"></a>00086 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>;
|
| 198 |
|
|
<a name="l00087"></a>00087
|
| 199 |
|
|
<a name="l00088"></a>00088 <span class="keyword"></span>
|
| 200 |
|
|
<a name="l00089"></a>00089 <span class="keyword"> -- Stimulus <span class="vhdlkeyword">process</span></span>
|
| 201 |
|
|
<a name="l00090"></a>00090 stim_proc: <span class="vhdlkeyword">process</span>
|
| 202 |
|
|
<a name="l00091"></a>00091 <span class="vhdlkeyword">begin</span>
|
| 203 |
|
|
<a name="l00092"></a>00092 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3366a143573fb930480d87caf161678a" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 204 |
|
|
<a name="l00093"></a>00093 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 205 |
|
|
<a name="l00094"></a>00094 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span>;
|
| 206 |
|
|
<a name="l00095"></a>00095 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3366a143573fb930480d87caf161678a" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 207 |
|
|
<a name="l00096"></a>00096 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span>;
|
| 208 |
|
|
<a name="l00097"></a>00097 <span class="keyword"></span>
|
| 209 |
|
|
<a name="l00098"></a>00098 <span class="keyword"> -- Configure the clock... </span>
|
| 210 |
|
|
<a name="l00099"></a>00099 reg_addr <= "<span class="vhdllogic">00</span>";
|
| 211 |
|
|
<a name="l00100"></a>00100 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 212 |
|
|
<a name="l00101"></a>00101 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 213 |
|
|
<a name="l00102"></a>00102 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94" title="Signal to connect with UUT.">DAT_I</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">50000000</span><span class="vhdlchar">,</span> <span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span>;
|
| 214 |
|
|
<a name="l00103"></a>00103 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 215 |
|
|
<a name="l00104"></a>00104 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 216 |
|
|
<a name="l00105"></a>00105 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 217 |
|
|
<a name="l00106"></a>00106 reg_addr <= (<span class="vhdlkeyword">others</span> => 'U');
|
| 218 |
|
|
<a name="l00107"></a>00107 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span>;
|
| 219 |
|
|
<a name="l00108"></a>00108 <span class="keyword"></span>
|
| 220 |
|
|
<a name="l00109"></a>00109 <span class="keyword"> -- Configure the Baud... </span>
|
| 221 |
|
|
<a name="l00110"></a>00110 reg_addr <= "<span class="vhdllogic">01</span>";
|
| 222 |
|
|
<a name="l00111"></a>00111 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 223 |
|
|
<a name="l00112"></a>00112 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
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| 224 |
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|
<a name="l00113"></a>00113 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94" title="Signal to connect with UUT.">DAT_I</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">115200</span><span class="vhdlchar">,</span> <span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span>;
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| 225 |
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<a name="l00114"></a>00114 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 226 |
|
|
<a name="l00115"></a>00115 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 227 |
|
|
<a name="l00116"></a>00116 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 228 |
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<a name="l00117"></a>00117 reg_addr <= (<span class="vhdlkeyword">others</span> => 'U');
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| 229 |
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<a name="l00118"></a>00118 <span class="keyword"></span>
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| 230 |
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<a name="l00119"></a>00119 <span class="keyword"> -- <span class="vhdlkeyword">Wait</span> some <span class="comment">time</span> <span class="vhdlkeyword">to</span> configure the communication <span class="vhdlkeyword">block</span></span>
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| 231 |
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<a name="l00120"></a>00120 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span> <span class="vhdlchar">*</span> <span class="vhdllogic"></span><span class="vhdllogic">40</span>;
|
| 232 |
|
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<a name="l00121"></a>00121
|
| 233 |
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<a name="l00122"></a>00122 <span class="keyword"></span>
|
| 234 |
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<a name="l00123"></a>00123 <span class="keyword"> -- Ask <span class="vhdlkeyword">to</span> send some data...(</span><span class="vhdllogic">0x55</span>)
|
| 235 |
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<a name="l00124"></a>00124 reg_addr <= "<span class="vhdllogic">10</span>";
|
| 236 |
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<a name="l00125"></a>00125 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
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| 237 |
|
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<a name="l00126"></a>00126 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 238 |
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<a name="l00127"></a>00127 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94" title="Signal to connect with UUT.">DAT_I</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">x</span><span class="vhdllogic">"00000055"</span>;
|
| 239 |
|
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<a name="l00128"></a>00128 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 240 |
|
|
<a name="l00129"></a>00129 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 241 |
|
|
<a name="l00130"></a>00130 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 242 |
|
|
<a name="l00131"></a>00131 reg_addr <= (<span class="vhdlkeyword">others</span> => 'U');
|
| 243 |
|
|
<a name="l00132"></a>00132 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span>;
|
| 244 |
|
|
<a name="l00133"></a>00133 <span class="keyword"></span>
|
| 245 |
|
|
<a name="l00134"></a>00134 <span class="keyword"> -- Ask <span class="vhdlkeyword">to</span> read some data...</span>
|
| 246 |
|
|
<a name="l00135"></a>00135 reg_addr <= "<span class="vhdllogic">11</span>";
|
| 247 |
|
|
<a name="l00136"></a>00136 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd" title="Signal to connect with UUT.">WE</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 248 |
|
|
<a name="l00137"></a>00137 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 249 |
|
|
<a name="l00138"></a>00138 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92" title="Signal to connect with UUT.">done</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
|
| 250 |
|
|
<a name="l00139"></a>00139 <span class="vhdlchar"><a class="code" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658" title="Signal to connect with UUT.">start</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
|
| 251 |
|
|
<a name="l00140"></a>00140 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span><span class="vhdlchar">*</span><span class="vhdllogic"></span><span class="vhdllogic">10</span>;
|
| 252 |
|
|
<a name="l00141"></a>00141 <span class="keyword"></span>
|
| 253 |
|
|
<a name="l00142"></a>00142 <span class="keyword"> -- Stop Simulation</span>
|
| 254 |
|
|
<a name="l00143"></a>00143 <span class="vhdlkeyword">assert</span> <span class="vhdlchar">false</span> <span class="vhdlkeyword">report</span> <span class="keyword">"NONE. End of simulation."</span> <span class="vhdlkeyword">severity</span> <span class="vhdlchar">failure</span>;
|
| 255 |
|
|
<a name="l00144"></a>00144 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>;
|
| 256 |
|
|
<a name="l00145"></a>00145
|
| 257 |
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|
<a name="l00146"></a>00146 <span class="vhdlkeyword">END</span>;
|
| 258 |
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</pre></div></div><!-- contents -->
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</div>
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<div id="nav-path" class="navpath">
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<ul>
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<li class="navelem"><b>testUart_control.vhd</b> </li>
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<li class="footer">Generated on Sat May 12 2012 22:28:05 for Uart wishbone slave Documentation by
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<a href="http://www.doxygen.org/index.html">
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<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.0 </li>
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</ul>
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