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\section{behavior Architecture Reference}
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\label{classtest_divisor_1_1behavior}\index{behavior@{behavior}}
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Test divisor module.
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\\*
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\\*
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\subsection*{Processes}
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\begin{DoxyCompactItemize}
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\item
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{\bf clk\-\_\-process}{\bfseries ( )}\label{classtest_divisor_1_1behavior_ac5bb218131b813f7908ec89476b31fca}
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\item
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{\bf stim\-\_\-proc}{\bfseries ( )}\label{classtest_divisor_1_1behavior_ad2efa6785cff833c341e27596b21aeb5}
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\end{DoxyCompactItemize}
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\subsection*{Components}
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\begin{DoxyCompactItemize}
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\item
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{\bf divisor} {\bfseries }
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\begin{DoxyCompactList}\small\item\em Reset input. \end{DoxyCompactList}\end{DoxyCompactItemize}
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\subsection*{Constants}
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\begin{DoxyCompactItemize}
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\item
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{\bf clk\-\_\-period} {\bfseries time \-:= 10 ns } \label{classtest_divisor_1_1behavior_aee75ea6d5c1621041dff5db20cba7e70}
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\end{DoxyCompactItemize}
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\subsection*{Signals}
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\begin{DoxyCompactItemize}
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\item
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{\bf rst} {\bfseries std\-\_\-logic \-:= ' 0 ' } \label{classtest_divisor_1_1behavior_a513fa2f18065f5d31a856b5a7268e6be}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf clk} {\bfseries std\-\_\-logic \-:= ' 0 ' } \label{classtest_divisor_1_1behavior_ad8d4742a7eb2e3d3a95e8c0c37d14ed2}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf numerator} {\bfseries std\-\_\-logic\-\_\-vector ( ( n\-Bits\-Large -\/ 1 ) downto 0 ) \-:= ( others = $>$ ' 0 ' ) } \label{classtest_divisor_1_1behavior_ab6d0f470182dc53c3c65afad4c78bddd}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf divident} {\bfseries std\-\_\-logic\-\_\-vector ( ( n\-Bits\-Large -\/ 1 ) downto 0 ) \-:= ( others = $>$ ' 0 ' ) } \label{classtest_divisor_1_1behavior_a45d3fd79b3d4a9c68e45d5bfd00d1fc7}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf quotient} {\bfseries std\-\_\-logic\-\_\-vector ( ( n\-Bits\-Large -\/ 1 ) downto 0 ) } \label{classtest_divisor_1_1behavior_a0a9f54386a9ef858f70c32ccceb1ab0e}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf reminder} {\bfseries std\-\_\-logic\-\_\-vector ( ( n\-Bits\-Large -\/ 1 ) downto 0 ) } \label{classtest_divisor_1_1behavior_a4192e4decb5e0fff313ed7578a1fe6a5}
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\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item
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{\bf done} {\bfseries std\-\_\-logic } \label{classtest_divisor_1_1behavior_a52b926bb7d7b6f608cf22d09d17be95a}
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\end{DoxyCompactItemize}
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\subsection*{Instantiations}
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\begin{DoxyCompactItemize}
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\item
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{\bf uut} {\bfseries divisor} \label{classtest_divisor_1_1behavior_a1619316ad715601eb5d3559db829ac05}
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\begin{DoxyCompactList}\small\item\em Instantiate the Unit Under Test (U\-U\-T) \end{DoxyCompactList}\end{DoxyCompactItemize}
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\subsection{Detailed Description}
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Test divisor module.
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Calculate some divisions and verify if we have the right value
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Definition at line 17 of file test\-Divisor.\-vhd.
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\subsection{Member Data Documentation}
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\index{test\-Divisor\-::behavior@{test\-Divisor\-::behavior}!divisor@{divisor}}
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\index{divisor@{divisor}!testDivisor::behavior@{test\-Divisor\-::behavior}}
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\subsubsection[{divisor}]{\setlength{\rightskip}{0pt plus 5cm}{\bf divisor} {\bfseries } \hspace{0.3cm}{\ttfamily [Component]}}\label{classtest_divisor_1_1behavior_ab31bbf4e04b601f06da44e54e616cc99}
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Reset input.
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Clock input Division result (32 bits) Reminder result (32 bits) Numerator (32 bits) \char`\"{}\-Divide by\char`\"{} number (32 bits)
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Definition at line 21 of file test\-Divisor.\-vhd.
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The documentation for this class was generated from the following files\-:\begin{DoxyCompactItemize}
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\item
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E\-:/uart\-\_\-block/hdl/ise\-Project/{\bf test\-Divisor.\-vhd}\end{DoxyCompactItemize}
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