URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [Sim_ConfigReceiver.wcfg] - Blame information for rev 39

Go to most recent revision | Details | Compare with Previous | View Log




   
   
   
      
         
            
            
            
         
      
   
   
   
      rst
      rst
   
   
      serial_in
      serial_in
   
   
      baudoversampleclk
      baudoversampleclk
   
   
      syncdetected
      syncdetected
   
   
      data_ready
      data_ready
   
   
      data_byte[7:0]
      data_byte[7:0]
      HEXRADIX
   


Line No.	Rev	Author	Line
1	35	leonardoar
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16			`rst`
17			`rst`
18
19
20			`serial_in`
21			`serial_in`
22
23
24			`baudoversampleclk`
25			`baudoversampleclk`
26
27
28			`syncdetected`
29			`syncdetected`
30
31
32			`data_ready`
33			`data_ready`
34
35
36			`data_byte[7:0]`
37			`data_byte[7:0]`
38			`HEXRADIX`
39
40

Browse

Tools

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [Sim_ConfigReceiver.wcfg] - Blame information for rev 39