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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [_xmsgs/] [xst.xmsgs] - Blame information for rev 34

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Line No. Rev Author Line
1 34 leonardoar
2
7 2 leonardoar
8 34 leonardoar 
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 80: Unconnected output port 'CYC_O' of component 'SERIALMASTER'.
9
10 16 leonardoar 
 
11 34 leonardoar 
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 80: Unconnected output port 'SEL_O' of component 'SERIALMASTER'.
12
13 16 leonardoar 
 
14 34 leonardoar 
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 95: Unconnected output port 'data_Avaible' of component 'uart_wishbone_slave'.
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16 16 leonardoar 
 
17 34 leonardoar 
"E:/uart_block/hdl/iseProject/SERIALMASTER.vhd" line 46: Width mismatch. <byteIncome> has a width of 8 bits but assigned expression is 32-bit wide.
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19 28 leonardoar 
 
20 34 leonardoar 
"E:/uart_block/hdl/iseProject/uart_control.vhd" line 62: Unconnected output port 'reminder' of component 'divisor'.
21
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23 34 leonardoar 
Input <DAT_I<31:8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
24
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26 34 leonardoar 
Output <CYC_O> is never assigned. Tied to value 0.
27
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29 34 leonardoar 
Output <SEL_O> is never assigned. Tied to value 0.
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32 34 leonardoar 
Input <baudClk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
33
34 16 leonardoar 
 
35 34 leonardoar 
Signal <getPoint> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
36
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38 34 leonardoar 
Output <data_avaible> is never assigned.
39
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41 34 leonardoar 
The FF/Latch <cycle_wait_oversample_23> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_25> <half_cycle0_22>
42
43 16 leonardoar 
 
44 34 leonardoar 
The FF/Latch <cycle_wait_oversample_14> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_16> <half_cycle0_13>
45
46 16 leonardoar 
 
47 34 leonardoar 
The FF/Latch <cycle_wait_oversample_10> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_12> <half_cycle0_9>
48
49 16 leonardoar 
 
50 34 leonardoar 
The FF/Latch <cycle_wait_oversample_1> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_3> <half_cycle0_0>
51
52 16 leonardoar 
 
53 34 leonardoar 
The FF/Latch <cycle_wait_oversample_4> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_6> <half_cycle0_3>
54
55 16 leonardoar 
 
56 34 leonardoar 
The FF/Latch <cycle_wait_oversample_28> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_30> <half_cycle0_27>
57
58 16 leonardoar 
 
59 34 leonardoar 
The FF/Latch <cycle_wait_oversample_24> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_26> <half_cycle0_23>
60
61 16 leonardoar 
 
62 34 leonardoar 
The FF/Latch <cycle_wait_oversample_19> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_21> <half_cycle0_18>
63
64 16 leonardoar 
 
65 34 leonardoar 
The FF/Latch <cycle_wait_oversample_22> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_24> <half_cycle0_21>
66
67 16 leonardoar 
 
68 34 leonardoar 
The FF/Latch <cycle_wait_oversample_13> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_15> <half_cycle0_12>
69
70 16 leonardoar 
 
71 34 leonardoar 
The FF/Latch <cycle_wait_oversample_0> in Unit <uBaudGen> is equivalent to the following FF/Latch, which will be removed : <half_cycle_2>
72
73 16 leonardoar 
 
74 34 leonardoar 
The FF/Latch <cycle_wait_oversample_27> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_29> <half_cycle0_26>
75
76 16 leonardoar 
 
77 34 leonardoar 
The FF/Latch <cycle_wait_oversample_2> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_4> <half_cycle0_1>
78
79 16 leonardoar 
 
80 34 leonardoar 
The FF/Latch <cycle_wait_oversample_29> in Unit <uBaudGen> is equivalent to the following 7 FFs/Latches, which will be removed : <cycle_wait_oversample_31> <cycle_wait_oversample_30> <half_cycle_31> <half_cycle0_31> <half_cycle0_30> <half_cycle0_29> <half_cycle0_28>
81
82 16 leonardoar 
 
83 34 leonardoar 
The FF/Latch <cycle_wait_oversample_18> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_20> <half_cycle0_17>
84
85 16 leonardoar 
 
86 34 leonardoar 
The FF/Latch <cycle_wait_oversample_8> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_10> <half_cycle0_7>
87
88 16 leonardoar 
 
89 34 leonardoar 
The FF/Latch <cycle_wait_oversample_5> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_7> <half_cycle0_4>
90
91 16 leonardoar 
 
92 34 leonardoar 
The FF/Latch <cycle_wait_oversample_21> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_23> <half_cycle0_20>
93
94 16 leonardoar 
 
95 34 leonardoar 
The FF/Latch <cycle_wait_oversample_16> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_18> <half_cycle0_15>
96
97 16 leonardoar 
 
98 34 leonardoar 
The FF/Latch <cycle_wait_oversample_12> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_14> <half_cycle0_11>
99
100 16 leonardoar 
 
101 34 leonardoar 
The FF/Latch <cycle_wait_oversample_26> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_28> <half_cycle0_25>
102
103 16 leonardoar 
 
104 34 leonardoar 
The FF/Latch <cycle_wait_oversample_7> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_9> <half_cycle0_6>
105
106 16 leonardoar 
 
107 34 leonardoar 
The FF/Latch <cycle_wait_oversample_17> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_19> <half_cycle0_16>
108
109 16 leonardoar 
 
110 34 leonardoar 
The FF/Latch <cycle_wait_oversample_20> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_22> <half_cycle0_19>
111
112 16 leonardoar 
 
113 34 leonardoar 
The FF/Latch <cycle_wait_oversample_15> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_17> <half_cycle0_14>
114
115 27 leonardoar 
 
116 34 leonardoar 
The FF/Latch <cycle_wait_oversample_3> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_5> <half_cycle0_2>
117
118 27 leonardoar 
 
119 34 leonardoar 
The FF/Latch <cycle_wait_oversample_9> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_11> <half_cycle0_8>
120
121 27 leonardoar 
 
122 34 leonardoar 
The FF/Latch <cycle_wait_oversample_11> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_13> <half_cycle0_10>
123
124 27 leonardoar 
 
125 34 leonardoar 
The FF/Latch <cycle_wait_oversample_6> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_8> <half_cycle0_5>
126
127 27 leonardoar 
 
128 34 leonardoar 
The FF/Latch <cycle_wait_oversample_25> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_27> <half_cycle0_24>
129
130 27 leonardoar 
 
131 34 leonardoar 
FF/Latch <N_24> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
132
133 27 leonardoar 
 
134 34 leonardoar 
FF/Latch <N_18> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
135
136 27 leonardoar 
 
137 34 leonardoar 
FF/Latch <N_11> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
138
139 27 leonardoar 
 
140 34 leonardoar 
FF/Latch <N_10> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
141
142 27 leonardoar 
 
143 34 leonardoar 
FF/Latch <N_8> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
144
145 27 leonardoar 
 
146 34 leonardoar 
FF/Latch <config_clk_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
147
148 27 leonardoar 
 
149 34 leonardoar 
FF/Latch <config_clk_10> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
150
151 27 leonardoar 
 
152 34 leonardoar 
FF/Latch <config_clk_11> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
153
154 27 leonardoar 
 
155 34 leonardoar 
FF/Latch <config_clk_18> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
156
157 27 leonardoar 
 
158 34 leonardoar 
FF/Latch <config_clk_24> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
159
160 27 leonardoar 
 
161 34 leonardoar 
FF/Latch <config_clk_26> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
162
163 27 leonardoar 
 
164 34 leonardoar 
FF/Latch <config_clk_27> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
165
166 27 leonardoar 
 
167 34 leonardoar 
FF/Latch <config_clk_28> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
168
169 27 leonardoar 
 
170 34 leonardoar 
FF/Latch <config_clk_29> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
171
172 27 leonardoar 
 
173 34 leonardoar 
FF/Latch <config_clk_30> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
174
175 27 leonardoar 
 
176 34 leonardoar 
FF/Latch <config_clk_31> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
177
178 27 leonardoar 
 
179 34 leonardoar 
FF/Latch <config_baud_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
180
181 27 leonardoar 
 
182 34 leonardoar 
FF/Latch <config_baud_10> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
183
184 27 leonardoar 
 
185 34 leonardoar 
FF/Latch <config_baud_11> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
186
187 27 leonardoar 
 
188 34 leonardoar 
FF/Latch <config_baud_18> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
189
190 27 leonardoar 
 
191 34 leonardoar 
FF/Latch <config_baud_24> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
192
193 27 leonardoar 
 
194 34 leonardoar 
FF/Latch <config_baud_26> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
195
196 27 leonardoar 
 
197 34 leonardoar 
FF/Latch <config_baud_27> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
198
199 27 leonardoar 
 
200 34 leonardoar 
FF/Latch <config_baud_28> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
201
202 27 leonardoar 
 
203 34 leonardoar 
FF/Latch <config_baud_29> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
204
205 27 leonardoar 
 
206 34 leonardoar 
FF/Latch <config_baud_30> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
207
208 27 leonardoar 
 
209 34 leonardoar 
FF/Latch <config_baud_31> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
210
211 27 leonardoar 
 
212 34 leonardoar 
FF/Latch <cycle_wait_oversample_29> (without init value) has a constant value of 0 in block <uBaudGen>. This FF/Latch will be trimmed during the optimization process.
213
214 27 leonardoar 
 
215 34 leonardoar 
FF/Latch <DAT_O_8> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
216
217 27 leonardoar 
 
218 34 leonardoar 
FF/Latch <DAT_O_10> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
219
220 27 leonardoar 
 
221 34 leonardoar 
FF/Latch <DAT_O_11> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
222
223 27 leonardoar 
 
224 34 leonardoar 
FF/Latch <DAT_O_18> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
225
226 27 leonardoar 
 
227 34 leonardoar 
FF/Latch <DAT_O_24> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
228
229 27 leonardoar 
 
230 34 leonardoar 
FF/Latch <DAT_O_26> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
231
232 27 leonardoar 
 
233 34 leonardoar 
FF/Latch <DAT_O_27> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
234
235 27 leonardoar 
 
236 34 leonardoar 
FF/Latch <DAT_O_28> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
237
238 27 leonardoar 
 
239 34 leonardoar 
FF/Latch <DAT_O_29> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
240
241 27 leonardoar 
 
242 34 leonardoar 
FF/Latch <DAT_O_30> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
243
244 27 leonardoar 
 
245 34 leonardoar 
FF/Latch <DAT_O_31> (without init value) has a constant value of 0 in block <uMasterSerial>. This FF/Latch will be trimmed during the optimization process.
246
247 27 leonardoar 
 
248 34 leonardoar 
FF/Latch <D_31> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
249
250 27 leonardoar 
 
251 34 leonardoar 
FF/Latch <D_28> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
252
253 27 leonardoar 
 
254 34 leonardoar 
FF/Latch <D_30> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
255
256 27 leonardoar 
 
257 34 leonardoar 
FF/Latch <N_27> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
258
259 27 leonardoar 
 
260 34 leonardoar 
FF/Latch <N_28> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
261
262 27 leonardoar 
 
263 34 leonardoar 
FF/Latch <N_26> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
264
265 27 leonardoar 
 
266 34 leonardoar 
FF/Latch <N_29> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
267
268 27 leonardoar 
 
269 34 leonardoar 
FF/Latch <N_30> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
270
271 27 leonardoar 
 
272 34 leonardoar 
FF/Latch <N_31> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
273
274 27 leonardoar 
 
275 34 leonardoar 
FF/Latch <D_8> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
276
277 27 leonardoar 
 
278 34 leonardoar 
FF/Latch <D_29> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
279
280 27 leonardoar 
 
281 34 leonardoar 
FF/Latch <D_27> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
282
283 27 leonardoar 
 
284 34 leonardoar 
FF/Latch <D_26> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
285
286 27 leonardoar 
 
287 34 leonardoar 
FF/Latch <D_10> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
288
289 27 leonardoar 
 
290 34 leonardoar 
FF/Latch <D_11> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
291
292 27 leonardoar 
 
293 34 leonardoar 
FF/Latch <D_24> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
294
295 27 leonardoar 
 
296 34 leonardoar 
FF/Latch <D_18> (without init value) has a constant value of 0 in block <uDiv>. This FF/Latch will be trimmed during the optimization process.
297
298 27 leonardoar 
 
299 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_31> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
300
301 27 leonardoar 
 
302 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_30> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
303
304 27 leonardoar 
 
305 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_29> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
306
307 27 leonardoar 
 
308 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_28> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
309
310 27 leonardoar 
 
311 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_27> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
312
313 27 leonardoar 
 
314 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_26> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
315
316 27 leonardoar 
 
317 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_24> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
318
319 27 leonardoar 
 
320 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_18> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
321
322 27 leonardoar 
 
323 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_11> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
324
325 27 leonardoar 
 
326 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_10> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
327
328 27 leonardoar 
 
329 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivDividend_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
330
331 27 leonardoar 
 
332 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_31> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
333
334 27 leonardoar 
 
335 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_30> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
336
337 27 leonardoar 
 
338 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_29> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
339
340 27 leonardoar 
 
341 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_28> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
342
343 27 leonardoar 
 
344 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_27> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
345
346 27 leonardoar 
 
347 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_26> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
348
349 27 leonardoar 
 
350 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_24> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
351
352 27 leonardoar 
 
353 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_18> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
354
355 27 leonardoar 
 
356 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_11> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
357
358 27 leonardoar 
 
359 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_10> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
360
361 27 leonardoar 
 
362 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
363
364 27 leonardoar 
 
365 34 leonardoar 
FF/Latch <DAT_O_8> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
366
367 27 leonardoar 
 
368 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_10> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
369
370 27 leonardoar 
 
371 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_11> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
372
373 27 leonardoar 
 
374 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_18> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
375
376 27 leonardoar 
 
377 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_24> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
378
379 27 leonardoar 
 
380 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_26> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
381
382 27 leonardoar 
 
383 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_27> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
384
385 27 leonardoar 
 
386 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_28> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
387
388 27 leonardoar 
 
389 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_29> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
390
391 27 leonardoar 
 
392 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_30> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
393
394 27 leonardoar 
 
395 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <DAT_O_31> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
396
397 27 leonardoar 
 
398 34 leonardoar 
FF/Latch <cycle_wait_oversample_29> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
399
400 27 leonardoar 
 
401 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycle_wait_oversample_31> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
402
403 27 leonardoar 
 
404 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycle_wait_oversample_30> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
405
406 27 leonardoar 
 
407 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <half_cycle_31> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
408
409 27 leonardoar 
 
410 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <half_cycle0_31> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
411
412 27 leonardoar 
 
413 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <half_cycle0_30> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
414
415 27 leonardoar 
 
416 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <half_cycle0_29> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
417
418 27 leonardoar 
 
419 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <half_cycle0_28> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
420
421 27 leonardoar 
 
422 34 leonardoar 
The FF/Latch <cycle_wait_oversample_23> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_25> <half_cycle0_22>
423
424 27 leonardoar 
 
425 34 leonardoar 
The FF/Latch <cycle_wait_oversample_14> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_16> <half_cycle0_13>
426
427 27 leonardoar 
 
428 34 leonardoar 
The FF/Latch <cycle_wait_oversample_10> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_12> <half_cycle0_9>
429
430 27 leonardoar 
 
431 34 leonardoar 
The FF/Latch <cycle_wait_oversample_1> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_3> <half_cycle0_0>
432
433 27 leonardoar 
 
434 34 leonardoar 
The FF/Latch <cycle_wait_oversample_4> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_6> <half_cycle0_3>
435
436 27 leonardoar 
 
437 34 leonardoar 
The FF/Latch <cycle_wait_oversample_28> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_30> <half_cycle0_27>
438
439 27 leonardoar 
 
440 34 leonardoar 
The FF/Latch <cycle_wait_oversample_24> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_26> <half_cycle0_23>
441
442 27 leonardoar 
 
443 34 leonardoar 
The FF/Latch <cycle_wait_oversample_19> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_21> <half_cycle0_18>
444
445 27 leonardoar 
 
446 34 leonardoar 
The FF/Latch <cycle_wait_oversample_22> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_24> <half_cycle0_21>
447
448 27 leonardoar 
 
449 34 leonardoar 
The FF/Latch <cycle_wait_oversample_13> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_15> <half_cycle0_12>
450
451 27 leonardoar 
 
452 34 leonardoar 
The FF/Latch <cycle_wait_oversample_0> in Unit <baud_generator> is equivalent to the following FF/Latch, which will be removed : <half_cycle_2>
453
454 27 leonardoar 
 
455 34 leonardoar 
The FF/Latch <cycle_wait_oversample_27> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_29> <half_cycle0_26>
456
457 27 leonardoar 
 
458 34 leonardoar 
The FF/Latch <cycle_wait_oversample_2> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_4> <half_cycle0_1>
459
460 27 leonardoar 
 
461 34 leonardoar 
The FF/Latch <cycle_wait_oversample_18> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_20> <half_cycle0_17>
462
463 27 leonardoar 
 
464 34 leonardoar 
The FF/Latch <cycle_wait_oversample_8> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_10> <half_cycle0_7>
465
466 27 leonardoar 
 
467 34 leonardoar 
The FF/Latch <cycle_wait_oversample_5> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_7> <half_cycle0_4>
468
469 27 leonardoar 
 
470 34 leonardoar 
The FF/Latch <cycle_wait_oversample_21> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_23> <half_cycle0_20>
471
472 27 leonardoar 
 
473 34 leonardoar 
The FF/Latch <cycle_wait_oversample_16> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_18> <half_cycle0_15>
474
475 27 leonardoar 
 
476 34 leonardoar 
The FF/Latch <cycle_wait_oversample_12> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_14> <half_cycle0_11>
477
478 27 leonardoar 
 
479 34 leonardoar 
The FF/Latch <cycle_wait_oversample_26> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_28> <half_cycle0_25>
480
481 27 leonardoar 
 
482 34 leonardoar 
The FF/Latch <cycle_wait_oversample_7> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_9> <half_cycle0_6>
483
484 27 leonardoar 
 
485 34 leonardoar 
The FF/Latch <cycle_wait_oversample_17> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_19> <half_cycle0_16>
486
487 27 leonardoar 
 
488 34 leonardoar 
The FF/Latch <cycle_wait_oversample_20> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_22> <half_cycle0_19>
489
490 27 leonardoar 
 
491 34 leonardoar 
The FF/Latch <cycle_wait_oversample_15> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_17> <half_cycle0_14>
492
493 27 leonardoar 
 
494 34 leonardoar 
The FF/Latch <cycle_wait_oversample_3> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_5> <half_cycle0_2>
495
496 27 leonardoar 
 
497 34 leonardoar 
The FF/Latch <cycle_wait_oversample_9> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_11> <half_cycle0_8>
498
499 27 leonardoar 
 
500 34 leonardoar 
The FF/Latch <cycle_wait_oversample_11> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_13> <half_cycle0_10>
501
502 27 leonardoar 
 
503 34 leonardoar 
The FF/Latch <cycle_wait_oversample_6> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_8> <half_cycle0_5>
504
505 27 leonardoar 
 
506 34 leonardoar 
The FF/Latch <cycle_wait_oversample_25> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_27> <half_cycle0_24>
507
508 28 leonardoar 
 
509 34 leonardoar 
FF/Latch <cycles2Wait_0> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
510
511 28 leonardoar 
 
512 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_1> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
513
514 28 leonardoar 
 
515 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_2> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
516
517 28 leonardoar 
 
518 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_3> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
519
520 28 leonardoar 
 
521 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_4> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
522
523 28 leonardoar 
 
524 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_5> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
525
526 28 leonardoar 
 
527 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_23> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
528
529 27 leonardoar 
 
530 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <nextState_1> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
531
532 27 leonardoar 
 
533 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <nextState_5> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
534
535 27 leonardoar 
 
536 34 leonardoar 
The FF/Latch <current_s_FSM_FFd1> in Unit <serial_receiver> is equivalent to the following FF/Latch, which will be removed : <data_ready>
537
538 27 leonardoar 
 
539 34 leonardoar 
Unit uart_control: 32 internal tristates are replaced by logic (pull-up yes):
540 27 leonardoar 
 
541 34 leonardoar 
FF/Latch <waitBestPoint_3> has a constant value of 0 in block <serial_receiver>. This FF/Latch will be trimmed during the optimization process.
542
543 27 leonardoar 
 
544 34 leonardoar 
FF/Latch <waitBestPoint_3> has a constant value of 0 in block <serial_receiver>. This FF/Latch will be trimmed during the optimization process.
545
546 27 leonardoar 
 
547 34 leonardoar 
FF/Latch <waitBestPoint_3> has a constant value of 0 in block <serial_receiver>. This FF/Latch will be trimmed during the optimization process.
548
549 27 leonardoar 
 
550 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
551
552 27 leonardoar 
 
553 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
554
555 27 leonardoar 
 
556 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
557
558 27 leonardoar 
 
559 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
560
561 27 leonardoar 
 
562 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
563
564 27 leonardoar 
 
565 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
566
567 27 leonardoar 
 
568 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
569
570 27 leonardoar 
 
571 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
572
573 27 leonardoar 
 
574 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
575
576 27 leonardoar 
 
577 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
578
579 27 leonardoar 
 
580 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
581
582 27 leonardoar 
 
583 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
584
585 27 leonardoar 
 
586 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
587
588 27 leonardoar 
 
589 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
590
591 27 leonardoar 
 
592 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
593
594 27 leonardoar 
 
595 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
596
597 27 leonardoar 
 
598 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
599
600 27 leonardoar 
 
601 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
602
603 27 leonardoar 
 
604 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
605
606 27 leonardoar 
 
607 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
608
609 27 leonardoar 
 
610 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
611
612 27 leonardoar 
 
613 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
614
615 27 leonardoar 
 
616 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
617
618 27 leonardoar 
 
619 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
620
621 27 leonardoar 
 
622 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
623
624 27 leonardoar 
 
625 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
626
627 27 leonardoar 
 
628 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_clk_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
629
630 27 leonardoar 
 
631 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
632
633 27 leonardoar 
 
634 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
635
636 27 leonardoar 
 
637 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
638
639 27 leonardoar 
 
640 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
641
642 27 leonardoar 
 
643 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
644
645 27 leonardoar 
 
646 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/config_baud_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
647
648 27 leonardoar 
 
649 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
650
651 27 leonardoar 
 
652 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
653
654 27 leonardoar 
 
655 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
656
657 27 leonardoar 
 
658 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
659
660 27 leonardoar 
 
661 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
662
663 27 leonardoar 
 
664 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
665
666 27 leonardoar 
 
667 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
668
669 27 leonardoar 
 
670 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
671
672 27 leonardoar 
 
673 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
674
675 27 leonardoar 
 
676 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
677
678 27 leonardoar 
 
679 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivNumerator_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
680
681 27 leonardoar 
 
682 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
683
684 27 leonardoar 
 
685 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
686
687 27 leonardoar 
 
688 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
689
690 27 leonardoar 
 
691 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
692
693 27 leonardoar 
 
694 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
695
696 27 leonardoar 
 
697 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
698
699 27 leonardoar 
 
700 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
701
702 27 leonardoar 
 
703 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
704
705 27 leonardoar 
 
706 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
707
708 27 leonardoar 
 
709 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
710
711 27 leonardoar 
 
712 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/sigDivDividend_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
713
714 27 leonardoar 
 
715 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
716
717 27 leonardoar 
 
718 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
719
720 27 leonardoar 
 
721 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
722
723 27 leonardoar 
 
724 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
725
726 27 leonardoar 
 
727 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
728
729 27 leonardoar 
 
730 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
731
732 27 leonardoar 
 
733 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
734
735 27 leonardoar 
 
736 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
737
738 27 leonardoar 
 
739 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
740
741 27 leonardoar 
 
742 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
743
744 27 leonardoar 
 
745 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/D_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
746
747 27 leonardoar 
 
748 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
749
750 27 leonardoar 
 
751 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
752
753 27 leonardoar 
 
754 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
755
756 27 leonardoar 
 
757 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
758
759 27 leonardoar 
 
760 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
761
762 27 leonardoar 
 
763 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
764
765 27 leonardoar 
 
766 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
767
768 27 leonardoar 
 
769 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
770
771 27 leonardoar 
 
772 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
773
774 27 leonardoar 
 
775 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
776
777 27 leonardoar 
 
778 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/uDiv/N_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
779
780 27 leonardoar 
 
781 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/R_31> of sequential type is unconnected in block <INTERCON_P2P>.
782
783 27 leonardoar 
 
784 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_0> of sequential type is unconnected in block <INTERCON_P2P>.
785
786 27 leonardoar 
 
787 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_1> of sequential type is unconnected in block <INTERCON_P2P>.
788
789 27 leonardoar 
 
790 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_2> of sequential type is unconnected in block <INTERCON_P2P>.
791
792 27 leonardoar 
 
793 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_3> of sequential type is unconnected in block <INTERCON_P2P>.
794
795 27 leonardoar 
 
796 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_4> of sequential type is unconnected in block <INTERCON_P2P>.
797
798 27 leonardoar 
 
799 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_5> of sequential type is unconnected in block <INTERCON_P2P>.
800
801 27 leonardoar 
 
802 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_6> of sequential type is unconnected in block <INTERCON_P2P>.
803
804 27 leonardoar 
 
805 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_7> of sequential type is unconnected in block <INTERCON_P2P>.
806
807 27 leonardoar 
 
808 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_8> of sequential type is unconnected in block <INTERCON_P2P>.
809
810 27 leonardoar 
 
811 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_9> of sequential type is unconnected in block <INTERCON_P2P>.
812
813 27 leonardoar 
 
814 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_10> of sequential type is unconnected in block <INTERCON_P2P>.
815
816 27 leonardoar 
 
817 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_11> of sequential type is unconnected in block <INTERCON_P2P>.
818
819 27 leonardoar 
 
820 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_12> of sequential type is unconnected in block <INTERCON_P2P>.
821
822 27 leonardoar 
 
823 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_13> of sequential type is unconnected in block <INTERCON_P2P>.
824
825 27 leonardoar 
 
826 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_14> of sequential type is unconnected in block <INTERCON_P2P>.
827
828 27 leonardoar 
 
829 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_15> of sequential type is unconnected in block <INTERCON_P2P>.
830
831 27 leonardoar 
 
832 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_16> of sequential type is unconnected in block <INTERCON_P2P>.
833
834 27 leonardoar 
 
835 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_17> of sequential type is unconnected in block <INTERCON_P2P>.
836
837 27 leonardoar 
 
838 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_18> of sequential type is unconnected in block <INTERCON_P2P>.
839
840 27 leonardoar 
 
841 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_19> of sequential type is unconnected in block <INTERCON_P2P>.
842
843 27 leonardoar 
 
844 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_20> of sequential type is unconnected in block <INTERCON_P2P>.
845
846 27 leonardoar 
 
847 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_21> of sequential type is unconnected in block <INTERCON_P2P>.
848
849 27 leonardoar 
 
850 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_22> of sequential type is unconnected in block <INTERCON_P2P>.
851
852 27 leonardoar 
 
853 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_23> of sequential type is unconnected in block <INTERCON_P2P>.
854
855 27 leonardoar 
 
856 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_24> of sequential type is unconnected in block <INTERCON_P2P>.
857
858 27 leonardoar 
 
859 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_25> of sequential type is unconnected in block <INTERCON_P2P>.
860
861 27 leonardoar 
 
862 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_26> of sequential type is unconnected in block <INTERCON_P2P>.
863
864 27 leonardoar 
 
865 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_27> of sequential type is unconnected in block <INTERCON_P2P>.
866
867 27 leonardoar 
 
868 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_28> of sequential type is unconnected in block <INTERCON_P2P>.
869
870 27 leonardoar 
 
871 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_29> of sequential type is unconnected in block <INTERCON_P2P>.
872
873 27 leonardoar 
 
874 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_30> of sequential type is unconnected in block <INTERCON_P2P>.
875
876 27 leonardoar 
 
877 34 leonardoar 
Node <uUartWishboneSlave/uUartControl/uDiv/reminder_31> of sequential type is unconnected in block <INTERCON_P2P>.
878
879 27 leonardoar 
 
880 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
881
882 27 leonardoar 
 
883 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
884
885 27 leonardoar 
 
886 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
887
888 27 leonardoar 
 
889 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
890
891 27 leonardoar 
 
892 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
893
894 27 leonardoar 
 
895 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
896
897 27 leonardoar 
 
898 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
899
900 27 leonardoar 
 
901 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
902
903 27 leonardoar 
 
904 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
905
906 27 leonardoar 
 
907 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
908
909 27 leonardoar 
 
910 34 leonardoar 
Due to other FF/Latch trimming, FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
911
912 27 leonardoar 
 
913 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
914
915 27 leonardoar 
 
916 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
917
918 27 leonardoar 
 
919 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
920
921 27 leonardoar 
 
922 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
923
924 27 leonardoar 
 
925 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
926
927 27 leonardoar 
 
928 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
929
930 27 leonardoar 
 
931 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
932
933 27 leonardoar 
 
934 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
935
936 27 leonardoar 
 
937 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
938
939 27 leonardoar 
 
940 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
941
942 27 leonardoar 
 
943 34 leonardoar 
FF/Latch <uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8> (without init value) has a constant value of 0 in block <INTERCON_P2P>. This FF/Latch will be trimmed during the optimization process.
944
945 27 leonardoar 
 
946 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<11> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
947
948 27 leonardoar 
 
949 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<18> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
950
951 27 leonardoar 
 
952 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<24> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
953
954 27 leonardoar 
 
955 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<26> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
956
957 27 leonardoar 
 
958 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<27> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
959
960 27 leonardoar 
 
961 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<28> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
962
963 27 leonardoar 
 
964 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<29> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
965
966 32 leonardoar 
 
967 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<30> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
968
969 32 leonardoar 
 
970 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<31> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
971
972 32 leonardoar 
 
973 34 leonardoar 
in unit INTERCON_P2P Conflict on KEEP property on signal uUartWishboneSlave/uUartControl/Mtridata_DAT_O<8> and uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10> signal will be lost.
974
975 32 leonardoar 
 
976 34 leonardoar 
HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
977
978 32 leonardoar 
 
979 21 leonardoar
980 34 leonardoar 
 

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