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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [serial_receiver.vhd] - Blame information for rev 37

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--! @file
--! @brief Serial receiver http://www.fpga4fun.com/SerialInterface.html
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
 
--! Use CPU Definitions package
use work.pkgDefinitions.all;
 
entity serial_receiver is
    Port (
                          rst : in STD_LOGIC;                                                                                                   --! Reset input           
                          baudOverSampleClk : in  STD_LOGIC;                                                            --! Baud oversampled 8x (Best way to detect start bit)
           serial_in : in  STD_LOGIC;                                                                                   --! Uart serial input
           data_ready : out  STD_LOGIC;                                                                         --! Data received and ready to be read
           data_byte : out  STD_LOGIC_VECTOR ((nBits-1) downto 0));      --! Data byte received
end serial_receiver;
 
--! @brief Serial receiver http://www.fpga4fun.com/SerialInterface.html
--! @details Implement block that create a byte from the serial stream of data.
architecture Behavioral of serial_receiver is
signal current_s: rxStates;
signal filterRx : rxFilterStates;
signal syncDetected : std_logic;
 
begin
        -- First we need to oversample(8x baud rate) out serial channel to syncronize with the PC (By detecting the start bit)
        process (rst, baudOverSampleClk, serial_in, current_s)
        begin
                if rst = '1' then
                        filterRx <= s0;
                        syncDetected <= '0';
                elsif rising_edge(baudOverSampleClk) then
                        case filterRx is
                                when s0 =>
                                        syncDetected <= '0';
                                        -- Spike down detected, verify if it's valid for at least 4 cycles                                      
                                        if serial_in = '0' then
                                                filterRx <= s1;
                                        else
                                                filterRx <= s0;
                                        end if;
 
                                when s1 =>
                                        syncDetected <= '0';
                                        if serial_in = '0' then
                                                filterRx <= s2;
                                                syncDetected <= '0';
                                        else
                                                filterRx <= s0;
                                        end if;
 
                                when s2 =>
                                        syncDetected <= '0';
                                        if serial_in = '0' then
                                                filterRx <= s3;
                                                syncDetected <= '0';
                                        else
                                                filterRx <= s0;
                                        end if;
 
                                when s3 =>
                                        syncDetected <= '0';
                                        if serial_in = '0' then
                                                filterRx <= s4;
                                                syncDetected <= '0';
                                        else
                                                filterRx <= s0;
                                        end if;
 
                                when s4 =>
                                        -- Real Beginning of start bit detected 
                                        if serial_in = '0' then
                                                filterRx <= s4;
                                                syncDetected <= '1';
                                        end if;
 
                                        -- Reset out sync detector when finished to receive a byte
                                        if current_s = rx_idle then
                                                filterRx <= s0;
                                        end if;
                        end case;
                end if;
        end process;
 
        -- Process to handle the serial receive (On this case our reset is the syncDetected signal
        -- Always include all of your signals on the sensivity list!! (Even if the simulation is already ok)
        process (syncDetected, baudOverSampleClk, serial_in)
        variable byteReceived : STD_LOGIC_VECTOR ((nBits-1) downto 0);
        variable waitBestPoint : integer range 0 to 10;
        constant numTicks : integer := 7;
        begin
                if syncDetected = '0' then
                        current_s <= bit0;
                        data_ready <= '0';
                        byteReceived := (others => '0');
                        waitBestPoint := 0;
                elsif rising_edge(baudOverSampleClk) then
                        case current_s is
                                when bit0 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(0) := serial_in;
                                                current_s <=  bit1;
                                        end if;
 
                                when bit1 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(1) := serial_in;
                                                current_s <=  bit2;
                                        end if;
 
                                when bit2 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(2) := serial_in;
                                                current_s <=  bit3;
                                        end if;
 
                                when bit3 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(3) := serial_in;
                                                current_s <=  bit4;
                                        end if;
 
                                when bit4 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(4) := serial_in;
                                                current_s <=  bit5;
                                        end if;
 
                                when bit5 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(5) := serial_in;
                                                current_s <=  bit6;
                                        end if;
 
                                when bit6 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(6) := serial_in;
                                                current_s <=  bit7;
                                        end if;
 
                                when bit7 =>
                                        data_ready <= '0';
                                        if (waitBestPoint < numTicks) then
                                                waitBestPoint := waitBestPoint + 1;
                                        else
                                                waitBestPoint := 0;
                                                byteReceived(7) := serial_in;
                                                data_byte <= byteReceived;
                                                current_s <=  rx_stop;
                                        end if;
 
                                when rx_stop =>
                                        data_ready <= '1';
                                        data_byte <= byteReceived;
                                        current_s <=  rx_idle;
 
                                when rx_idle =>
                                        data_ready <= '1';
                                        data_byte <= byteReceived;
                                        current_s <=  rx_idle;
                        end case;
                end if;
        end process;
 
end Behavioral;
 

Line No.	Rev	Author	Line
1	37	leonardoar	`--! @file`
2			`--! @brief Serial receiver http://www.fpga4fun.com/SerialInterface.html`
3	2	leonardoar	`library IEEE;`
4			`use IEEE.STD_LOGIC_1164.ALL;`
5
6			`--! Use CPU Definitions package`
7			`use work.pkgDefinitions.all;`
8
9			`entity serial_receiver is`
10			`Port (`
11	37	leonardoar	`rst : in STD_LOGIC; --! Reset input`
12			`baudOverSampleClk : in STD_LOGIC; --! Baud oversampled 8x (Best way to detect start bit)`
13			`serial_in : in STD_LOGIC; --! Uart serial input`
14			`data_ready : out STD_LOGIC; --! Data received and ready to be read`
15			`data_byte : out STD_LOGIC_VECTOR ((nBits-1) downto 0)); --! Data byte received`
16	2	leonardoar	`end serial_receiver;`
17
18	37	leonardoar	`--! @brief Serial receiver http://www.fpga4fun.com/SerialInterface.html`
19			`--! @details Implement block that create a byte from the serial stream of data.`
20	2	leonardoar	`architecture Behavioral of serial_receiver is`
21	15	leonardoar	`signal current_s: rxStates;`
22	2	leonardoar	`signal filterRx : rxFilterStates;`
23	32	leonardoar	`signal syncDetected : std_logic;`
24	2	leonardoar
25			`begin`
26	37	leonardoar	`-- First we need to oversample(8x baud rate) out serial channel to syncronize with the PC (By detecting the start bit)`
27	4	leonardoar	`process (rst, baudOverSampleClk, serial_in, current_s)`
28	2	leonardoar	`begin`
29			`if rst = '1' then`
30			`filterRx <= s0;`
31			`syncDetected <= '0';`
32			`elsif rising_edge(baudOverSampleClk) then`
33			`case filterRx is`
34			`when s0 =>`
35			`syncDetected <= '0';`
36	37	leonardoar	`-- Spike down detected, verify if it's valid for at least 4 cycles`
37	2	leonardoar	`if serial_in = '0' then`
38			`filterRx <= s1;`
39			`else`
40			`filterRx <= s0;`
41			`end if;`
42
43			`when s1 =>`
44			`syncDetected <= '0';`
45			`if serial_in = '0' then`
46			`filterRx <= s2;`
47			`syncDetected <= '0';`
48			`else`
49			`filterRx <= s0;`
50			`end if;`
51
52	4	leonardoar	`when s2 =>`
53			`syncDetected <= '0';`
54			`if serial_in = '0' then`
55			`filterRx <= s3;`
56			`syncDetected <= '0';`
57			`else`
58			`filterRx <= s0;`
59	32	leonardoar	`end if;`
60
61			`when s3 =>`
62			`syncDetected <= '0';`
63			`if serial_in = '0' then`
64			`filterRx <= s4;`
65			`syncDetected <= '0';`
66			`else`
67			`filterRx <= s0;`
68	4	leonardoar	`end if;`
69
70	32	leonardoar	`when s4 =>`
71	2	leonardoar	`-- Real Beginning of start bit detected`
72			`if serial_in = '0' then`
73	32	leonardoar	`filterRx <= s4;`
74	4	leonardoar	`syncDetected <= '1';`
75	2	leonardoar	`end if;`
76	4	leonardoar
77			`-- Reset out sync detector when finished to receive a byte`
78	15	leonardoar	`if current_s = rx_idle then`
79	4	leonardoar	`filterRx <= s0;`
80			`end if;`
81	2	leonardoar	`end case;`
82			`end if;`
83			`end process;`
84	15	leonardoar
85			`-- Process to handle the serial receive (On this case our reset is the syncDetected signal`
86			`-- Always include all of your signals on the sensivity list!! (Even if the simulation is already ok)`
87	32	leonardoar	`process (syncDetected, baudOverSampleClk, serial_in)`
88			`variable byteReceived : STD_LOGIC_VECTOR ((nBits-1) downto 0);`
89			`variable waitBestPoint : integer range 0 to 10;`
90			`constant numTicks : integer := 7;`
91	2	leonardoar	`begin`
92			`if syncDetected = '0' then`
93	15	leonardoar	`current_s <= bit0;`
94			`data_ready <= '0';`
95	32	leonardoar	`byteReceived := (others => '0');`
96	35	leonardoar	`waitBestPoint := 0;`
97	32	leonardoar	`elsif rising_edge(baudOverSampleClk) then`
98	15	leonardoar	`case current_s is`
99			`when bit0 =>`
100	32	leonardoar	`data_ready <= '0';`
101			`if (waitBestPoint < numTicks) then`
102	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
103	32	leonardoar	`else`
104			`waitBestPoint := 0;`
105			`byteReceived(0) := serial_in;`
106	35	leonardoar	`current_s <= bit1;`
107	32	leonardoar	`end if;`
108	15	leonardoar
109			`when bit1 =>`
110	32	leonardoar	`data_ready <= '0';`
111			`if (waitBestPoint < numTicks) then`
112	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
113	32	leonardoar	`else`
114			`waitBestPoint := 0;`
115			`byteReceived(1) := serial_in;`
116	35	leonardoar	`current_s <= bit2;`
117	32	leonardoar	`end if;`
118	15	leonardoar
119			`when bit2 =>`
120	32	leonardoar	`data_ready <= '0';`
121			`if (waitBestPoint < numTicks) then`
122	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
123	32	leonardoar	`else`
124			`waitBestPoint := 0;`
125			`byteReceived(2) := serial_in;`
126	35	leonardoar	`current_s <= bit3;`
127	32	leonardoar	`end if;`
128	15	leonardoar
129			`when bit3 =>`
130	32	leonardoar	`data_ready <= '0';`
131			`if (waitBestPoint < numTicks) then`
132	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
133	32	leonardoar	`else`
134			`waitBestPoint := 0;`
135			`byteReceived(3) := serial_in;`
136	35	leonardoar	`current_s <= bit4;`
137	32	leonardoar	`end if;`
138	15	leonardoar
139			`when bit4 =>`
140	32	leonardoar	`data_ready <= '0';`
141			`if (waitBestPoint < numTicks) then`
142	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
143	32	leonardoar	`else`
144			`waitBestPoint := 0;`
145			`byteReceived(4) := serial_in;`
146	35	leonardoar	`current_s <= bit5;`
147	32	leonardoar	`end if;`
148	15	leonardoar
149			`when bit5 =>`
150	32	leonardoar	`data_ready <= '0';`
151			`if (waitBestPoint < numTicks) then`
152	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
153	32	leonardoar	`else`
154			`waitBestPoint := 0;`
155			`byteReceived(5) := serial_in;`
156	35	leonardoar	`current_s <= bit6;`
157	32	leonardoar	`end if;`
158	15	leonardoar
159			`when bit6 =>`
160	32	leonardoar	`data_ready <= '0';`
161			`if (waitBestPoint < numTicks) then`
162	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
163	32	leonardoar	`else`
164			`waitBestPoint := 0;`
165			`byteReceived(6) := serial_in;`
166	35	leonardoar	`current_s <= bit7;`
167	32	leonardoar	`end if;`
168	15	leonardoar
169			`when bit7 =>`
170	32	leonardoar	`data_ready <= '0';`
171			`if (waitBestPoint < numTicks) then`
172	35	leonardoar	`waitBestPoint := waitBestPoint + 1;`
173	32	leonardoar	`else`
174			`waitBestPoint := 0;`
175			`byteReceived(7) := serial_in;`
176			`data_byte <= byteReceived;`
177	35	leonardoar	`current_s <= rx_stop;`
178	32	leonardoar	`end if;`
179	15	leonardoar
180			`when rx_stop =>`
181			`data_ready <= '1';`
182			`data_byte <= byteReceived;`
183			`current_s <= rx_idle;`
184
185			`when rx_idle =>`
186			`data_ready <= '1';`
187			`data_byte <= byteReceived;`
188	35	leonardoar	`current_s <= rx_idle;`
189	15	leonardoar	`end case;`
190	2	leonardoar	`end if;`
191			`end process;`
192	15	leonardoar
193	2	leonardoar	`end Behavioral;`
194

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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [serial_receiver.vhd] - Blame information for rev 37