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Subversion Repositories uart_fiber

[/] [uart_fiber/] [trunk/] [Main.ucf] - Blame information for rev 6

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#PACE: Start of Constraints generated by PACE
 
#PACE: Start of PACE I/O Pin Assignments
NET "iCLK"  LOC = "p1"  ;
NET "RX"  LOC = "p5"  ;
NET "TX"  LOC = "p6"  ;
NET "optic_in"  LOC = "p7"  ;
NET "optic_out"  LOC = "p8"  ;
 
NET "optic_out2"  LOC = "p27"  ;
NET "optic_in2"  LOC = "p28"  ;
NET "TX2"  LOC = "p29"  ;
NET "RX2"  LOC = "p30"  ;
 
 
 
NET "led1"  LOC = "p34"  ;
NET "led2"  LOC = "p33"  ;
NET "led3"  LOC = "p32"  ;
NET "led4"  LOC = "p31"  ;
 
 
NET "iCLK" TNM_NET = iCLK;
timespec TS_iCLK = PERIOD "iCLK" 20 ns HIGH 50%;
#PACE: Start of PACE Area Constraints
 
#PACE: Start of PACE Prohibit Constraints
 
#PACE: End of Constraints generated by PACE

Line No.	Rev	Author	Line
1	6	chipmaker7	`#PACE: Start of Constraints generated by PACE`
2
3			`#PACE: Start of PACE I/O Pin Assignments`
4			`NET "iCLK" LOC = "p1" ;`
5			`NET "RX" LOC = "p5" ;`
6			`NET "TX" LOC = "p6" ;`
7			`NET "optic_in" LOC = "p7" ;`
8			`NET "optic_out" LOC = "p8" ;`
9
10			`NET "optic_out2" LOC = "p27" ;`
11			`NET "optic_in2" LOC = "p28" ;`
12			`NET "TX2" LOC = "p29" ;`
13			`NET "RX2" LOC = "p30" ;`
14
15
16
17			`NET "led1" LOC = "p34" ;`
18			`NET "led2" LOC = "p33" ;`
19			`NET "led3" LOC = "p32" ;`
20			`NET "led4" LOC = "p31" ;`
21
22
23			`NET "iCLK" TNM_NET = iCLK;`
24			`timespec TS_iCLK = PERIOD "iCLK" 20 ns HIGH 50%;`
25			`#PACE: Start of PACE Area Constraints`
26
27			`#PACE: Start of PACE Prohibit Constraints`
28
29			`#PACE: End of Constraints generated by PACE`

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Subversion Repositories uart_fiber

[/] [uart_fiber/] [trunk/] [Main.ucf] - Blame information for rev 6