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audriusa |
# W12 RX Input LVCMOS18 USB_UART_TX 21 TXD Output
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# W13 TX Output LVCMOS18 USB_UART_RX 20 RXD Input
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# Y13 CTS Output LVCMOS18 USB_UART_CTS 18 CTS Input
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# AA13 RTS Input LVCMOS18 USB_UART_RTS 19 RTS Output
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| 6 |
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#USB UART
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set_property PACKAGE_PIN W13 [get_ports USB_UART_RX_FPGA_TX_LS]
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set_property IOSTANDARD LVCMOS33 [get_ports USB_UART_RX_FPGA_TX_LS]
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| 9 |
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| 10 |
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set_property PACKAGE_PIN W12 [get_ports USB_UART_TX_FPGA_RX_LS]
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| 11 |
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set_property IOSTANDARD LVCMOS33 [get_ports USB_UART_TX_FPGA_RX_LS]
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| 12 |
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| 13 |
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set_property PACKAGE_PIN AA13 [get_ports USB_UART_RTS_O_B_LS]
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| 14 |
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set_property IOSTANDARD LVCMOS33 [get_ports USB_UART_RTS_O_B_LS]
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| 15 |
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| 16 |
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set_property PACKAGE_PIN Y13 [get_ports USB_UART_CTS_I_B_LS]
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| 17 |
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set_property IOSTANDARD LVCMOS33 [get_ports USB_UART_CTS_I_B_LS]
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| 18 |
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| 19 |
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#GPIO
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| 20 |
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| 21 |
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#GPIO PB SWITCHES
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set_property PACKAGE_PIN B11 [get_ports GPIO_SW_E]
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_SW_E]
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| 24 |
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set_property PACKAGE_PIN A10 [get_ports GPIO_SW_N]
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| 25 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_SW_N]
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| 26 |
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set_property PACKAGE_PIN B10 [get_ports GPIO_SW_W]
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| 27 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_SW_W]
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| 28 |
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set_property PACKAGE_PIN A9 [get_ports GPIO_SW_C]
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| 29 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_SW_C]
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| 30 |
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set_property PACKAGE_PIN C11 [get_ports GPIO_SW_S]
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_SW_S]
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| 33 |
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#GPIO DIP SWITCHES
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set_property PACKAGE_PIN G11 [get_ports "GPIO_DIP_SW0"] ;
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set_property IOSTANDARD LVCMOS33 [get_ports "GPIO_DIP_SW0"] ;
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| 36 |
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set_property PACKAGE_PIN H11 [get_ports "GPIO_DIP_SW1"] ;
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| 37 |
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set_property IOSTANDARD LVCMOS33 [get_ports "GPIO_DIP_SW1"] ;
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| 38 |
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set_property PACKAGE_PIN H9 [get_ports "GPIO_DIP_SW2"] ;
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| 39 |
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set_property IOSTANDARD LVCMOS33 [get_ports "GPIO_DIP_SW2"] ;
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| 40 |
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set_property PACKAGE_PIN J9 [get_ports "GPIO_DIP_SW3"] ;
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| 41 |
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set_property IOSTANDARD LVCMOS33 [get_ports "GPIO_DIP_SW3"] ;
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| 42 |
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# LEDs
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#GPIO LEDs
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set_property PACKAGE_PIN C9 [get_ports GPIO_LED_0]
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_0]
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| 47 |
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set_property PACKAGE_PIN D9 [get_ports GPIO_LED_1]
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| 48 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_1]
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| 49 |
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set_property PACKAGE_PIN E10 [get_ports GPIO_LED_2]
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| 50 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_2]
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| 51 |
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set_property PACKAGE_PIN E11 [get_ports GPIO_LED_3]
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| 52 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_3]
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| 53 |
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set_property PACKAGE_PIN F9 [get_ports GPIO_LED_4]
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| 54 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_4]
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| 55 |
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set_property PACKAGE_PIN F10 [get_ports GPIO_LED_5]
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| 56 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_5]
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| 57 |
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set_property PACKAGE_PIN G9 [get_ports GPIO_LED_6]
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| 58 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_6]
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| 59 |
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set_property PACKAGE_PIN G10 [get_ports GPIO_LED_7]
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| 60 |
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set_property IOSTANDARD LVCMOS33 [get_ports GPIO_LED_7]
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| 61 |
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| 62 |
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#CLOCKS
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| 63 |
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| 64 |
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#create_clock -period 1000000.000 -name AM_CLOCK -waveform {0.000 500000.000} [get_ports CLK_125_P]
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| 65 |
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| 66 |
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set_property ALLOW_COMBINATORIAL_LOOPS true [get_nets *]
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# set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets *]
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| 68 |
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| 69 |
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# Forum clock (90.0 MHz single-ended 1.8V LVCMOS, series resistor coupled FPGA_EMCCLK, connected to XCKU5P FPGA U1 bank 65 dedicated EMCCLK input pin N21), works posedge
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| 70 |
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set_property PACKAGE_PIN N21 [get_ports CLK_I]
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| 71 |
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set_property IOSTANDARD LVCMOS18 [get_ports CLK_I]
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| 72 |
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| 73 |
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set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets CLK_I_IBUF_inst/O]
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| 74 |
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| 75 |
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create_clock -period 11.111 -name CLK_I -waveform {0.000 5.556} [get_ports CLK_I]
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| 76 |
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| 77 |
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