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pjf |
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-- Company:
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-- Engineer:
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--
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-- Create Date: 12:35:50 05/31/2011
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-- Design Name:
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-- Module Name: C:/Users/pjf/Documents/projects/fpga/xilinx/Network/arp1/arp_tb.vhd
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-- Project Name: arp1
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-- Target Device:
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-- Tool versions:
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-- Description:
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--
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-- VHDL Test Bench Created by ISE for module: arp
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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-- Notes:
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-- This testbench has been automatically generated using types std_logic and
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-- std_logic_vector for the ports of the unit under test. Xilinx recommends
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-- that these types always be used for the top-level I/O of a design in order
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-- to guarantee that the testbench will bind correctly to the post-implementation
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-- simulation model.
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--------------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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use work.arp_types.all;
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ENTITY arp_tb IS
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END arp_tb;
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ARCHITECTURE behavior OF arp_tb IS
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-- Component Declaration for the Unit Under Test (UUT)
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COMPONENT arp
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PORT(
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-- lookup request signals
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arp_req_req : in arp_req_req_type;
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arp_req_rslt : out arp_req_rslt_type;
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-- MAC layer RX signals
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data_in_clk : in STD_LOGIC;
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reset : in STD_LOGIC;
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data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock
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data_in_last : in STD_LOGIC; -- indicates last data in frame
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-- MAC layer TX signals
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mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)
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mac_tx_granted : in std_logic; -- indicates that access to channel has been granted
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data_out_clk : in std_logic;
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data_out_ready : in std_logic; -- indicates system ready to consume data
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data_out_valid : out std_logic; -- indicates data out is valid
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data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame
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data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame
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data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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-- system signals
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our_mac_address : in STD_LOGIC_VECTOR (47 downto 0);
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our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);
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req_count : out STD_LOGIC_VECTOR(7 downto 0) -- count of arp pkts received
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);
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END COMPONENT;
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--Inputs
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signal clk : std_logic := '0';
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signal reset : std_logic := '0';
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signal data_in : std_logic_vector(7 downto 0) := (others => '0');
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signal data_in_valid : std_logic := '0';
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signal data_in_last : std_logic := '0';
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signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');
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signal our_ip_address : std_logic_vector(31 downto 0) := (others => '0');
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signal data_out_ready : std_logic;
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signal data_out_valid : std_logic;
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signal data_out_first : std_logic;
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signal data_out_last : std_logic;
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signal data_out : std_logic_vector (7 downto 0);
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signal req_count : STD_LOGIC_VECTOR(7 downto 0);
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signal arp_req_req : arp_req_req_type;
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signal arp_req_rslt : arp_req_rslt_type;
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signal mac_tx_req : std_logic;
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signal mac_tx_granted : std_logic;
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-- Clock period definitions
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constant clk_period : time := 8 ns;
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BEGIN
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-- Instantiate the Unit Under Test (UUT)
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uut: arp PORT MAP (
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-- lookup request mappings
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arp_req_req => arp_req_req,
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arp_req_rslt => arp_req_rslt,
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-- rx mappings
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data_in_clk => clk,
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reset => reset,
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data_in => data_in,
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data_in_valid => data_in_valid,
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data_in_last => data_in_last,
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-- tx mappings
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mac_tx_req => mac_tx_req,
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mac_tx_granted => mac_tx_granted,
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data_out_clk => clk,
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data_out_ready => data_out_ready,
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data_out_valid => data_out_valid,
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data_out_first => data_out_first,
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data_out_last => data_out_last,
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data_out => data_out,
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-- system mappings
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our_mac_address => our_mac_address,
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our_ip_address => our_ip_address,
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req_count => req_count
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);
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-- Clock process definitions
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clk_process :process
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begin
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clk <= '0';
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wait for clk_period/2;
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clk <= '1';
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wait for clk_period/2;
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end process;
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-- Stimulus process
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stim_proc: process
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begin
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-- hold reset state for 100 ns.
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wait for 100 ns;
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our_ip_address <= x"c0a80509"; -- 192.168.5.9
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our_mac_address <= x"002320212223";
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mac_tx_granted <= '1'; -- FIXME 0
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reset <= '1';
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wait for clk_period*10;
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reset <= '0';
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wait for clk_period*5;
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assert mac_tx_req = '0' report "mac_tx_req asserted on reset";
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-- insert stimulus here
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arp_req_req.lookup_req <= '0';
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arp_req_req.ip <= (others => '0');
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data_out_ready <= '1';
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report "T1: Send an ARP request: who has 192.168.5.8? Tell 192.168.5.1";
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data_in_valid <= '1';
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-- dst MAC (bc)
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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-- src MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"23"; wait for clk_period;
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data_in <= x"18"; wait for clk_period;
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data_in <= x"29"; wait for clk_period;
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data_in <= x"26"; wait for clk_period;
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data_in <= x"7c"; wait for clk_period;
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-- type
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data_in <= x"08"; wait for clk_period;
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data_in <= x"06"; wait for clk_period;
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-- HW type
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data_in <= x"00"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Protocol type
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data_in <= x"08"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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-- HW size
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data_in <= x"06"; wait for clk_period;
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-- protocol size
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data_in <= x"04"; wait for clk_period;
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-- Opcode
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data_in <= x"00"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Sender MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"23"; wait for clk_period;
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data_in <= x"18"; wait for clk_period;
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data_in <= x"29"; wait for clk_period;
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data_in <= x"26"; wait for clk_period;
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data_in <= x"7c"; wait for clk_period;
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-- Sender IP
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data_in <= x"c0"; wait for clk_period;
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data_in <= x"a8"; wait for clk_period;
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data_in <= x"05"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Target MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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-- Target IP
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data_in <= x"c0"; wait for clk_period;
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data_in <= x"a8"; wait for clk_period;
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data_in <= x"05"; wait for clk_period;
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data_in <= x"09"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in_last <= '1';
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data_in <= x"00"; wait for clk_period;
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data_in_last <= '0';
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data_in_valid <= '0';
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-- check tx arbitration signals
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assert mac_tx_req = '1' report "T1: mac_tx_req not set";
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-- ready to tx
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data_out_ready <= '1';
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mac_tx_granted <= '1';
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wait for clk_period*10;
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data_out_ready <= '0';
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wait for clk_period*2;
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data_out_ready <= '1';
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wait for clk_period*50;
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report "T2: Send another ARP request: who has 192.168.5.8? Tell 192.168.5.1, holding off transmitter";
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data_out_ready <= '0';
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data_in_valid <= '1';
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-- dst MAC (bc)
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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data_in <= x"ff"; wait for clk_period;
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-- src MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"23"; wait for clk_period;
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data_in <= x"18"; wait for clk_period;
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data_in <= x"29"; wait for clk_period;
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data_in <= x"26"; wait for clk_period;
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data_in <= x"7c"; wait for clk_period;
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-- type
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data_in <= x"08"; wait for clk_period;
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data_in <= x"06"; wait for clk_period;
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-- HW type
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data_in <= x"00"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Protocol type
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data_in <= x"08"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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-- HW size
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data_in <= x"06"; wait for clk_period;
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-- protocol size
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data_in <= x"04"; wait for clk_period;
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-- Opcode
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data_in <= x"00"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Sender MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"23"; wait for clk_period;
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data_in <= x"18"; wait for clk_period;
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data_in <= x"29"; wait for clk_period;
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data_in <= x"26"; wait for clk_period;
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data_in <= x"7c"; wait for clk_period;
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-- Sender IP
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data_in <= x"c0"; wait for clk_period;
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data_in <= x"a8"; wait for clk_period;
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data_in <= x"05"; wait for clk_period;
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data_in <= x"01"; wait for clk_period;
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-- Target MAC
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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-- Target IP
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data_in <= x"c0"; wait for clk_period;
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data_in <= x"a8"; wait for clk_period;
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data_in <= x"05"; wait for clk_period;
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data_in <= x"09"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in <= x"00"; wait for clk_period;
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data_in_last <= '1';
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data_in <= x"00"; wait for clk_period;
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data_in_last <= '0';
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data_in_valid <= '0';
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-- ready to tx
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wait for clk_period*10;
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data_out_ready <= '1';
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wait for clk_period*50;
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-- Send a request for the IP that is already cached
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arp_req_req.ip <= x"c0a80501";
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arp_req_req.lookup_req <= '1';
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wait for clk_period;
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arp_req_req.lookup_req <= '0';
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wait for clk_period*50;
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-- Send a request for the IP that is not cached
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arp_req_req.ip <= x"c0a80503";
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arp_req_req.lookup_req <= '1';
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wait for clk_period;
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arp_req_req.lookup_req <= '0';
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wait for clk_period*80;
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-- Send the reply
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data_out_ready <= '1';
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|
| 316 |
|
|
report "T3: Send an ARP reply: 192.168.5.3 has mac 02:12:03:23:04:54";
|
| 317 |
|
|
data_in_valid <= '1';
|
| 318 |
|
|
-- dst MAC (bc)
|
| 319 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 320 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 321 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 322 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 323 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 324 |
|
|
data_in <= x"ff"; wait for clk_period;
|
| 325 |
|
|
-- src MAC
|
| 326 |
|
|
data_in <= x"02"; wait for clk_period;
|
| 327 |
|
|
data_in <= x"12"; wait for clk_period;
|
| 328 |
|
|
data_in <= x"03"; wait for clk_period;
|
| 329 |
|
|
data_in <= x"23"; wait for clk_period;
|
| 330 |
|
|
data_in <= x"04"; wait for clk_period;
|
| 331 |
|
|
data_in <= x"54"; wait for clk_period;
|
| 332 |
|
|
-- type
|
| 333 |
|
|
data_in <= x"08"; wait for clk_period;
|
| 334 |
|
|
data_in <= x"06"; wait for clk_period;
|
| 335 |
|
|
-- HW type
|
| 336 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 337 |
|
|
data_in <= x"01"; wait for clk_period;
|
| 338 |
|
|
-- Protocol type
|
| 339 |
|
|
data_in <= x"08"; wait for clk_period;
|
| 340 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 341 |
|
|
-- HW size
|
| 342 |
|
|
data_in <= x"06"; wait for clk_period;
|
| 343 |
|
|
-- protocol size
|
| 344 |
|
|
data_in <= x"04"; wait for clk_period;
|
| 345 |
|
|
-- Opcode
|
| 346 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 347 |
|
|
data_in <= x"02"; wait for clk_period;
|
| 348 |
|
|
-- Sender MAC
|
| 349 |
|
|
data_in <= x"02"; wait for clk_period;
|
| 350 |
|
|
data_in <= x"12"; wait for clk_period;
|
| 351 |
|
|
data_in <= x"03"; wait for clk_period;
|
| 352 |
|
|
data_in <= x"23"; wait for clk_period;
|
| 353 |
|
|
data_in <= x"04"; wait for clk_period;
|
| 354 |
|
|
data_in <= x"54"; wait for clk_period;
|
| 355 |
|
|
-- Sender IP
|
| 356 |
|
|
data_in <= x"c0"; wait for clk_period;
|
| 357 |
|
|
data_in <= x"a8"; wait for clk_period;
|
| 358 |
|
|
data_in <= x"05"; wait for clk_period;
|
| 359 |
|
|
data_in <= x"03"; wait for clk_period;
|
| 360 |
|
|
-- Target MAC
|
| 361 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 362 |
|
|
data_in <= x"23"; wait for clk_period;
|
| 363 |
|
|
data_in <= x"20"; wait for clk_period;
|
| 364 |
|
|
data_in <= x"21"; wait for clk_period;
|
| 365 |
|
|
data_in <= x"22"; wait for clk_period;
|
| 366 |
|
|
data_in <= x"23"; wait for clk_period;
|
| 367 |
|
|
-- Target IP
|
| 368 |
|
|
data_in <= x"c0"; wait for clk_period;
|
| 369 |
|
|
data_in <= x"a8"; wait for clk_period;
|
| 370 |
|
|
data_in <= x"05"; wait for clk_period;
|
| 371 |
|
|
data_in <= x"09"; wait for clk_period;
|
| 372 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 373 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 374 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 375 |
|
|
data_in_last <= '1';
|
| 376 |
|
|
data_in <= x"00"; wait for clk_period;
|
| 377 |
|
|
data_in_last <= '0';
|
| 378 |
|
|
data_in_valid <= '0';
|
| 379 |
|
|
|
| 380 |
|
|
report "--- end of tests ---";
|
| 381 |
|
|
wait;
|
| 382 |
|
|
end process;
|
| 383 |
|
|
|
| 384 |
|
|
END;
|
