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----------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date:    12:43:16 06/04/2011 
-- Design Name: 
-- Module Name:    IP_complete_nomac - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: Implements complete IP stack with ARP (but no MAC)
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Revision 0.02 - separated RX and TX clocks
-- Revision 0.03 - Added mac_tx_tfirst
-- Additional Comments: 
--
----------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use work.axi.all;
use work.ipv4_types.all;
use work.arp_types.all;
 
entity IP_complete_nomac is
         generic (
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
                        );
    Port (
                        -- IP Layer signals
                        ip_tx_start                             : in std_logic;
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
                        ip_rx_start                             : out std_logic;                                                                        -- indicates receipt of ip frame.
                        ip_rx                                           : out ipv4_rx_type;
                        -- system signals
                        rx_clk                                  : in  STD_LOGIC;
                        tx_clk                                  : in  STD_LOGIC;
                        reset                                   : in  STD_LOGIC;
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
                        our_mac_address                 : in std_logic_vector (47 downto 0);
                        control                                 : in ip_control_type;
                        -- status signals
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
                        -- MAC Transmitter
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid
                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data
                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame
                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame
                        -- MAC Receiver
                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received
                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid
                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data
                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame
                        );
end IP_complete_nomac;
 
architecture structural of IP_complete_nomac is
 
    COMPONENT IPv4
    PORT(
                        -- IP Layer signals
                        ip_tx_start                             : in std_logic;
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
                        ip_rx_start                             : out std_logic;                                                                        -- indicates receipt of ip frame.
                        ip_rx                                           : out ipv4_rx_type;
                        -- system control signals
                        rx_clk                                  : in  STD_LOGIC;
                        tx_clk                                  : in  STD_LOGIC;
                        reset                                   : in  STD_LOGIC;
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
                        our_mac_address                 : in std_logic_vector (47 downto 0);
                        -- system status signals
                        rx_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
                        -- ARP lookup signals
                        arp_req_req                             : out arp_req_req_type;
                        arp_req_rslt                    : in arp_req_rslt_type;
                        -- MAC layer RX signals
                        mac_data_in                     : in  STD_LOGIC_VECTOR (7 downto 0);             -- ethernet frame (from dst mac addr through to last byte of frame)
                        mac_data_in_valid       : in  STD_LOGIC;                                                                        -- indicates data_in valid on clock
                        mac_data_in_last                : in  STD_LOGIC;                                                                        -- indicates last data in frame
                        -- MAC layer TX signals
                        mac_tx_req                              : out std_logic;                                                                        -- indicates that ip wants access to channel (stays up for as long as tx)
                        mac_tx_granted                  : in std_logic;                                                                 -- indicates that access to channel has been granted            
                        mac_data_out_ready      : in std_logic;                                                                 -- indicates system ready to consume data
                        mac_data_out_valid      : out std_logic;                                                                        -- indicates data out is valid
                        mac_data_out_first      : out std_logic;                                                                        -- with data out valid indicates the first byte of a frame
                        mac_data_out_last               : out std_logic;                                                                        -- with data out valid indicates the last byte of a frame
                        mac_data_out                    : out std_logic_vector (7 downto 0)                      -- ethernet frame (from dst mac addr through to last byte of frame)      
         );
         END COMPONENT;
 
    COMPONENT arp
         generic (
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
                        );
    Port (
                        -- lookup request signals
                        arp_req_req                     : in arp_req_req_type;
                        arp_req_rslt            : out arp_req_rslt_type;
                        -- MAC layer RX signals
                        data_in_clk             : in  STD_LOGIC;
                        reset                           : in  STD_LOGIC;
                        data_in                                 : in  STD_LOGIC_VECTOR (7 downto 0);             -- ethernet frame (from dst mac addr through to last byte of frame)
                        data_in_valid           : in  STD_LOGIC;                                                                        -- indicates data_in valid on clock
                        data_in_last            : in  STD_LOGIC;                                                                        -- indicates last data in frame
                        -- MAC layer TX signals
                        mac_tx_req                      : out std_logic;                                                                        -- indicates that ip wants access to channel (stays up for as long as tx)
                        mac_tx_granted          : in std_logic;                                                                 -- indicates that access to channel has been granted            
                        data_out_clk            : in std_logic;
                        data_out_ready          : in std_logic;                                                                 -- indicates system ready to consume data
                        data_out_valid          : out std_logic;                                                                        -- indicates data out is valid
                        data_out_first          : out std_logic;                                                                        -- with data out valid indicates the first byte of a frame
                        data_out_last           : out std_logic;                                                                        -- with data out valid indicates the last byte of a frame
                        data_out                                : out std_logic_vector (7 downto 0);             -- ethernet frame (from dst mac addr through to last byte of frame)
                        -- system signals
                        our_mac_address         : in STD_LOGIC_VECTOR (47 downto 0);
                        our_ip_address  : in STD_LOGIC_VECTOR (31 downto 0);
                        control                         : in arp_control_type;
                        req_count                       : out STD_LOGIC_VECTOR(7 downto 0)                       -- count of arp pkts received
                        );
         END COMPONENT;
 
    COMPONENT tx_arbitrator
    PORT(
                clk                             : in std_logic;
                reset                           : in std_logic;
 
                req_1                           : in  std_logic;
                grant_1                 : out std_logic;
      data_1         : in  std_logic_vector(7 downto 0); -- data byte to tx
      valid_1        : in  std_logic;                                                   -- tdata is valid
      first_1        : in  std_logic;                                                   -- indicates first byte of frame
      last_1         : in  std_logic;                                                   -- indicates last byte of frame
 
                req_2                           : in  std_logic;
                grant_2                 : out std_logic;
      data_2         : in  std_logic_vector(7 downto 0); -- data byte to tx
      valid_2        : in  std_logic;                                                   -- tdata is valid
      first_2        : in  std_logic;                                                   -- indicates first byte of frame
      last_2         : in  std_logic;                                                   -- indicates last byte of frame
 
      data              : out  std_logic_vector(7 downto 0);     -- data byte to tx
      valid             : out  std_logic;                                                       -- tdata is valid
      first             : out  std_logic;                                                       -- indicates first byte of frame
      last              : out  std_logic                                                        -- indicates last byte of frame
         );
         END COMPONENT;
 
        ---------------------------
        -- Signals
        ---------------------------
 
        -- ARP REQUEST
        signal arp_req_req_int          : arp_req_req_type;
        signal arp_req_rslt_int         : arp_req_rslt_type;
        -- MAC arbitration busses
        signal ip_mac_req                               : std_logic;
        signal ip_mac_grant                     : std_logic;
        signal ip_mac_data_out          : std_logic_vector (7 downto 0);
        signal ip_mac_valid                     : std_logic;
        signal ip_mac_first                     : std_logic;
        signal ip_mac_last                      : std_logic;
        signal arp_mac_req                      : std_logic;
        signal arp_mac_grant                    : std_logic;
        signal arp_mac_data_out         : std_logic_vector (7 downto 0);
        signal arp_mac_valid                    : std_logic;
        signal arp_mac_first                    : std_logic;
        signal arp_mac_last                     : std_logic;
        -- MAC RX bus
        signal mac_rx_tready_int        : std_logic;
        -- MAC TX bus
        signal mac_tx_tdata_int         : std_logic_vector (7 downto 0);
        signal mac_tx_tvalid_int        : std_logic;
        signal mac_tx_tfirst_int        : std_logic;
        signal mac_tx_tlast_int         : std_logic;
        -- control signals
        signal mac_tx_granted_int       : std_logic;
 
begin
 
        mac_rx_tready_int <= '1';               -- enable the mac receiver
 
        -- set followers
        mac_tx_tdata <= mac_tx_tdata_int;
        mac_tx_tvalid <= mac_tx_tvalid_int;
        mac_tx_tfirst <= mac_tx_tfirst_int;
        mac_tx_tlast <= mac_tx_tlast_int;
 
        mac_rx_tready <= mac_rx_tready_int;
 
   ------------------------------------------------------------------------------
   -- Instantiate the IP layer
   ------------------------------------------------------------------------------
 
    IP_layer : IPv4 PORT MAP
                (
          ip_tx_start                   => ip_tx_start,
          ip_tx                                         => ip_tx,
          ip_tx_result                  => ip_tx_result,
          ip_tx_data_out_ready=> ip_tx_data_out_ready,
          ip_rx_start                   => ip_rx_start,
          ip_rx                                         => ip_rx,
          rx_clk                                        => rx_clk,
          tx_clk                                        => tx_clk,
          reset                                         => reset,
          our_ip_address                => our_ip_address,
          our_mac_address               => our_mac_address,
                         rx_pkt_count                   => ip_pkt_count,
          arp_req_req                   => arp_req_req_int,
          arp_req_rslt                  => arp_req_rslt_int,
          mac_tx_req                    => ip_mac_req,
          mac_tx_granted                => ip_mac_grant,
          mac_data_out_ready    => mac_tx_tready,
          mac_data_out_valid    => ip_mac_valid,
                         mac_data_out_first     => ip_mac_first,
          mac_data_out_last     => ip_mac_last,
          mac_data_out                  => ip_mac_data_out,
          mac_data_in                   => mac_rx_tdata,
          mac_data_in_valid     => mac_rx_tvalid,
          mac_data_in_last      => mac_rx_tlast
        );
 
   ------------------------------------------------------------------------------
   -- Instantiate the ARP layer
   ------------------------------------------------------------------------------
        arp_layer : arp
                        generic map (
                         CLOCK_FREQ                     => CLOCK_FREQ,
                         ARP_TIMEOUT            => ARP_TIMEOUT
                         )
                         Port map(
                        -- request signals
                          arp_req_req                                   => arp_req_req_int,
                          arp_req_rslt                                  => arp_req_rslt_int,
                          -- rx signals
                          data_in_clk                   => rx_clk,
                          reset                         => reset,
                          data_in                       => mac_rx_tdata,
                          data_in_valid                 => mac_rx_tvalid,
                          data_in_last                  => mac_rx_tlast,
                          -- tx signals
                          mac_tx_req                                    => arp_mac_req,
                          mac_tx_granted                                => arp_mac_grant,
                          data_out_clk                                  => tx_clk,
                          data_out_ready                                => mac_tx_tready,
                          data_out_valid                                => arp_mac_valid,
                          data_out_first                                => arp_mac_first,
                          data_out_last                         => arp_mac_last,
                          data_out                                              => arp_mac_data_out,
                          -- system signals
                          our_mac_address                               => our_mac_address,
                          our_ip_address                                => our_ip_address,
                          control                                               => control.arp_controls,
                          req_count                                             => arp_pkt_count
                          );
 
 
   ------------------------------------------------------------------------------
   -- Instantiate the TX Arbitrator 
   ------------------------------------------------------------------------------
        mac_tx_arb : tx_arbitrator
                 Port map(
                                clk                                             => tx_clk,
                                reset                           => reset,
 
                                req_1                                                   => ip_mac_req,
                                grant_1                                         => ip_mac_grant,
                                data_1                          => ip_mac_data_out,
                                valid_1                         => ip_mac_valid,
                                first_1                                         => ip_mac_first,
                                last_1                                          => ip_mac_last,
 
                                req_2                                                   => arp_mac_req,
                                grant_2                                         => arp_mac_grant,
                                data_2                          => arp_mac_data_out,
                                valid_2                         => arp_mac_valid,
                                first_2                                         => arp_mac_first,
                                last_2                                          => arp_mac_last,
 
                                data                                    => mac_tx_tdata_int,
                                valid                                   => mac_tx_tvalid_int,
                                first                                   => mac_tx_tfirst_int,
                                last                                    => mac_tx_tlast_int
                          );
 
end structural;
 

Line No.	Rev	Author	Line
1	2	pjf	`----------------------------------------------------------------------------------`
2			`-- Company:`
3			`-- Engineer:`
4			`--`
5			`-- Create Date: 12:43:16 06/04/2011`
6			`-- Design Name:`
7			`-- Module Name: IP_complete_nomac - Behavioral`
8			`-- Project Name:`
9			`-- Target Devices:`
10			`-- Tool versions:`
11			`-- Description: Implements complete IP stack with ARP (but no MAC)`
12			`--`
13			`-- Dependencies:`
14			`--`
15			`-- Revision:`
16			`-- Revision 0.01 - File Created`
17			`-- Revision 0.02 - separated RX and TX clocks`
18	4	pjf	`-- Revision 0.03 - Added mac_tx_tfirst`
19	2	pjf	`-- Additional Comments:`
20			`--`
21			`----------------------------------------------------------------------------------`
22			`LIBRARY ieee;`
23			`USE ieee.std_logic_1164.ALL;`
24			`use IEEE.NUMERIC_STD.ALL;`
25			`use work.axi.all;`
26			`use work.ipv4_types.all;`
27			`use work.arp_types.all;`
28
29			`entity IP_complete_nomac is`
30	8	pjf	`generic (`
31			`CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr`
32			`ARP_TIMEOUT : integer := 60 -- ARP response timeout (s)`
33			`);`
34	2	pjf	`Port (`
35			`-- IP Layer signals`
36			`ip_tx_start : in std_logic;`
37			`ip_tx : in ipv4_tx_type; -- IP tx cxns`
38			`ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission)`
39			`ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data`
40			`ip_rx_start : out std_logic; -- indicates receipt of ip frame.`
41			`ip_rx : out ipv4_rx_type;`
42			`-- system signals`
43			`rx_clk : in STD_LOGIC;`
44			`tx_clk : in STD_LOGIC;`
45			`reset : in STD_LOGIC;`
46			`our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);`
47			`our_mac_address : in std_logic_vector (47 downto 0);`
48	8	pjf	`control : in ip_control_type;`
49	2	pjf	`-- status signals`
50			`arp_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- count of arp pkts received`
51			`ip_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- number of IP pkts received for us`
52			`-- MAC Transmitter`
53			`mac_tx_tdata : out std_logic_vector(7 downto 0); -- data byte to tx`
54			`mac_tx_tvalid : out std_logic; -- tdata is valid`
55			`mac_tx_tready : in std_logic; -- mac is ready to accept data`
56	4	pjf	`mac_tx_tfirst : out std_logic; -- indicates first byte of frame`
57	2	pjf	`mac_tx_tlast : out std_logic; -- indicates last byte of frame`
58			`-- MAC Receiver`
59			`mac_rx_tdata : in std_logic_vector(7 downto 0); -- data byte received`
60			`mac_rx_tvalid : in std_logic; -- indicates tdata is valid`
61			`mac_rx_tready : out std_logic; -- tells mac that we are ready to take data`
62			`mac_rx_tlast : in std_logic -- indicates last byte of the trame`
63			`);`
64			`end IP_complete_nomac;`
65
66			`architecture structural of IP_complete_nomac is`
67
68			`COMPONENT IPv4`
69			`PORT(`
70			`-- IP Layer signals`
71			`ip_tx_start : in std_logic;`
72			`ip_tx : in ipv4_tx_type; -- IP tx cxns`
73			`ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission)`
74			`ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data`
75			`ip_rx_start : out std_logic; -- indicates receipt of ip frame.`
76			`ip_rx : out ipv4_rx_type;`
77			`-- system control signals`
78			`rx_clk : in STD_LOGIC;`
79			`tx_clk : in STD_LOGIC;`
80			`reset : in STD_LOGIC;`
81			`our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);`
82			`our_mac_address : in std_logic_vector (47 downto 0);`
83			`-- system status signals`
84			`rx_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- number of IP pkts received for us`
85			`-- ARP lookup signals`
86			`arp_req_req : out arp_req_req_type;`
87			`arp_req_rslt : in arp_req_rslt_type;`
88			`-- MAC layer RX signals`
89			`mac_data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)`
90			`mac_data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock`
91			`mac_data_in_last : in STD_LOGIC; -- indicates last data in frame`
92			`-- MAC layer TX signals`
93			`mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)`
94			`mac_tx_granted : in std_logic; -- indicates that access to channel has been granted`
95			`mac_data_out_ready : in std_logic; -- indicates system ready to consume data`
96			`mac_data_out_valid : out std_logic; -- indicates data out is valid`
97	4	pjf	`mac_data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame`
98	2	pjf	`mac_data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame`
99			`mac_data_out : out std_logic_vector (7 downto 0) -- ethernet frame (from dst mac addr through to last byte of frame)`
100			`);`
101			`END COMPONENT;`
102
103			`COMPONENT arp`
104	8	pjf	`generic (`
105			`CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr`
106			`ARP_TIMEOUT : integer := 60 -- ARP response timeout (s)`
107			`);`
108			`Port (`
109	2	pjf	`-- lookup request signals`
110			`arp_req_req : in arp_req_req_type;`
111			`arp_req_rslt : out arp_req_rslt_type;`
112			`-- MAC layer RX signals`
113			`data_in_clk : in STD_LOGIC;`
114			`reset : in STD_LOGIC;`
115			`data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)`
116			`data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock`
117			`data_in_last : in STD_LOGIC; -- indicates last data in frame`
118			`-- MAC layer TX signals`
119			`mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)`
120			`mac_tx_granted : in std_logic; -- indicates that access to channel has been granted`
121			`data_out_clk : in std_logic;`
122			`data_out_ready : in std_logic; -- indicates system ready to consume data`
123			`data_out_valid : out std_logic; -- indicates data out is valid`
124	4	pjf	`data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame`
125	2	pjf	`data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame`
126			`data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)`
127			`-- system signals`
128			`our_mac_address : in STD_LOGIC_VECTOR (47 downto 0);`
129	8	pjf	`our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);`
130			`control : in arp_control_type;`
131	2	pjf	`req_count : out STD_LOGIC_VECTOR(7 downto 0) -- count of arp pkts received`
132	8	pjf	`);`
133	2	pjf	`END COMPONENT;`
134
135			`COMPONENT tx_arbitrator`
136			`PORT(`
137			`clk : in std_logic;`
138			`reset : in std_logic;`
139
140			`req_1 : in std_logic;`
141			`grant_1 : out std_logic;`
142			`data_1 : in std_logic_vector(7 downto 0); -- data byte to tx`
143			`valid_1 : in std_logic; -- tdata is valid`
144	4	pjf	`first_1 : in std_logic; -- indicates first byte of frame`
145	2	pjf	`last_1 : in std_logic; -- indicates last byte of frame`
146
147			`req_2 : in std_logic;`
148			`grant_2 : out std_logic;`
149			`data_2 : in std_logic_vector(7 downto 0); -- data byte to tx`
150			`valid_2 : in std_logic; -- tdata is valid`
151	4	pjf	`first_2 : in std_logic; -- indicates first byte of frame`
152	2	pjf	`last_2 : in std_logic; -- indicates last byte of frame`
153
154			`data : out std_logic_vector(7 downto 0); -- data byte to tx`
155			`valid : out std_logic; -- tdata is valid`
156	4	pjf	`first : out std_logic; -- indicates first byte of frame`
157	2	pjf	`last : out std_logic -- indicates last byte of frame`
158			`);`
159			`END COMPONENT;`
160
161			`---------------------------`
162			`-- Signals`
163			`---------------------------`
164
165			`-- ARP REQUEST`
166			`signal arp_req_req_int : arp_req_req_type;`
167			`signal arp_req_rslt_int : arp_req_rslt_type;`
168			`-- MAC arbitration busses`
169			`signal ip_mac_req : std_logic;`
170			`signal ip_mac_grant : std_logic;`
171			`signal ip_mac_data_out : std_logic_vector (7 downto 0);`
172			`signal ip_mac_valid : std_logic;`
173	4	pjf	`signal ip_mac_first : std_logic;`
174	2	pjf	`signal ip_mac_last : std_logic;`
175			`signal arp_mac_req : std_logic;`
176			`signal arp_mac_grant : std_logic;`
177			`signal arp_mac_data_out : std_logic_vector (7 downto 0);`
178			`signal arp_mac_valid : std_logic;`
179	4	pjf	`signal arp_mac_first : std_logic;`
180	2	pjf	`signal arp_mac_last : std_logic;`
181			`-- MAC RX bus`
182			`signal mac_rx_tready_int : std_logic;`
183			`-- MAC TX bus`
184			`signal mac_tx_tdata_int : std_logic_vector (7 downto 0);`
185			`signal mac_tx_tvalid_int : std_logic;`
186	4	pjf	`signal mac_tx_tfirst_int : std_logic;`
187	2	pjf	`signal mac_tx_tlast_int : std_logic;`
188			`-- control signals`
189			`signal mac_tx_granted_int : std_logic;`
190
191			`begin`
192
193			`mac_rx_tready_int <= '1'; -- enable the mac receiver`
194
195			`-- set followers`
196			`mac_tx_tdata <= mac_tx_tdata_int;`
197			`mac_tx_tvalid <= mac_tx_tvalid_int;`
198	4	pjf	`mac_tx_tfirst <= mac_tx_tfirst_int;`
199	2	pjf	`mac_tx_tlast <= mac_tx_tlast_int;`
200
201			`mac_rx_tready <= mac_rx_tready_int;`
202
203			`------------------------------------------------------------------------------`
204			`-- Instantiate the IP layer`
205			`------------------------------------------------------------------------------`
206
207			`IP_layer : IPv4 PORT MAP`
208			`(`
209			`ip_tx_start => ip_tx_start,`
210			`ip_tx => ip_tx,`
211			`ip_tx_result => ip_tx_result,`
212			`ip_tx_data_out_ready=> ip_tx_data_out_ready,`
213			`ip_rx_start => ip_rx_start,`
214			`ip_rx => ip_rx,`
215			`rx_clk => rx_clk,`
216			`tx_clk => tx_clk,`
217			`reset => reset,`
218			`our_ip_address => our_ip_address,`
219			`our_mac_address => our_mac_address,`
220			`rx_pkt_count => ip_pkt_count,`
221			`arp_req_req => arp_req_req_int,`
222			`arp_req_rslt => arp_req_rslt_int,`
223			`mac_tx_req => ip_mac_req,`
224			`mac_tx_granted => ip_mac_grant,`
225			`mac_data_out_ready => mac_tx_tready,`
226			`mac_data_out_valid => ip_mac_valid,`
227	4	pjf	`mac_data_out_first => ip_mac_first,`
228	2	pjf	`mac_data_out_last => ip_mac_last,`
229			`mac_data_out => ip_mac_data_out,`
230			`mac_data_in => mac_rx_tdata,`
231			`mac_data_in_valid => mac_rx_tvalid,`
232			`mac_data_in_last => mac_rx_tlast`
233			`);`
234
235			`------------------------------------------------------------------------------`
236			`-- Instantiate the ARP layer`
237			`------------------------------------------------------------------------------`
238			`arp_layer : arp`
239	8	pjf	`generic map (`
240			`CLOCK_FREQ => CLOCK_FREQ,`
241			`ARP_TIMEOUT => ARP_TIMEOUT`
242			`)`
243			`Port map(`
244	2	pjf	`-- request signals`
245			`arp_req_req => arp_req_req_int,`
246			`arp_req_rslt => arp_req_rslt_int,`
247			`-- rx signals`
248			`data_in_clk => rx_clk,`
249			`reset => reset,`
250			`data_in => mac_rx_tdata,`
251			`data_in_valid => mac_rx_tvalid,`
252			`data_in_last => mac_rx_tlast,`
253			`-- tx signals`
254			`mac_tx_req => arp_mac_req,`
255			`mac_tx_granted => arp_mac_grant,`
256			`data_out_clk => tx_clk,`
257			`data_out_ready => mac_tx_tready,`
258			`data_out_valid => arp_mac_valid,`
259	4	pjf	`data_out_first => arp_mac_first,`
260	2	pjf	`data_out_last => arp_mac_last,`
261			`data_out => arp_mac_data_out,`
262			`-- system signals`
263			`our_mac_address => our_mac_address,`
264			`our_ip_address => our_ip_address,`
265	8	pjf	`control => control.arp_controls,`
266	2	pjf	`req_count => arp_pkt_count`
267			`);`
268
269
270			`------------------------------------------------------------------------------`
271			`-- Instantiate the TX Arbitrator`
272			`------------------------------------------------------------------------------`
273			`mac_tx_arb : tx_arbitrator`
274			`Port map(`
275			`clk => tx_clk,`
276			`reset => reset,`
277
278			`req_1 => ip_mac_req,`
279			`grant_1 => ip_mac_grant,`
280			`data_1 => ip_mac_data_out,`
281			`valid_1 => ip_mac_valid,`
282	4	pjf	`first_1 => ip_mac_first,`
283	2	pjf	`last_1 => ip_mac_last,`
284
285			`req_2 => arp_mac_req,`
286			`grant_2 => arp_mac_grant,`
287			`data_2 => arp_mac_data_out,`
288			`valid_2 => arp_mac_valid,`
289	4	pjf	`first_2 => arp_mac_first,`
290	2	pjf	`last_2 => arp_mac_last,`
291
292			`data => mac_tx_tdata_int,`
293			`valid => mac_tx_tvalid_int,`
294	4	pjf	`first => mac_tx_tfirst_int,`
295	2	pjf	`last => mac_tx_tlast_int`
296			`);`
297
298			`end structural;`
299

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