| 1 |
3 |
ultra_embe |
#ifndef ULPI_WRAPPER_TB_H
|
| 2 |
|
|
#define ULPI_WRAPPER_TB_H
|
| 3 |
|
|
|
| 4 |
|
|
#include "sc_vpi_clock.h"
|
| 5 |
|
|
#include "ulpi_wrapper_vpi.h"
|
| 6 |
|
|
|
| 7 |
|
|
#include "ulpi_driver.h"
|
| 8 |
|
|
#include "utmi_driver.h"
|
| 9 |
|
|
#include "wbl_driver.h"
|
| 10 |
|
|
|
| 11 |
|
|
class ulpi_wrapper_tb: public sc_module
|
| 12 |
|
|
{
|
| 13 |
|
|
public:
|
| 14 |
|
|
SC_HAS_PROCESS(ulpi_wrapper_tb);
|
| 15 |
|
|
|
| 16 |
|
|
sc_signal< bool > ulpi_rst_i;
|
| 17 |
|
|
sc_signal< sc_uint<8> > ulpi_data_i;
|
| 18 |
|
|
sc_signal< sc_uint<8> > ulpi_data_o;
|
| 19 |
|
|
sc_signal< bool > ulpi_dir_i;
|
| 20 |
|
|
sc_signal< bool > ulpi_nxt_i;
|
| 21 |
|
|
sc_signal< bool > ulpi_stp_o;
|
| 22 |
|
|
sc_signal< sc_uint<8> > reg_addr_i;
|
| 23 |
|
|
sc_signal< bool > reg_stb_i;
|
| 24 |
|
|
sc_signal< bool > reg_we_i;
|
| 25 |
|
|
sc_signal< sc_uint<8> > reg_data_i;
|
| 26 |
|
|
sc_signal< sc_uint<8> > reg_data_o;
|
| 27 |
|
|
sc_signal< bool > reg_ack_o;
|
| 28 |
|
|
sc_signal< bool > utmi_txvalid_i;
|
| 29 |
|
|
sc_signal< bool > utmi_txready_o;
|
| 30 |
|
|
sc_signal< bool > utmi_rxvalid_o;
|
| 31 |
|
|
sc_signal< bool > utmi_rxactive_o;
|
| 32 |
|
|
sc_signal< bool > utmi_rxerror_o;
|
| 33 |
|
|
sc_signal< sc_uint<8> > utmi_data_o;
|
| 34 |
|
|
sc_signal< sc_uint<8> > utmi_data_i;
|
| 35 |
|
|
sc_signal< sc_uint<2> > utmi_xcvrselect_i;
|
| 36 |
|
|
sc_signal< bool > utmi_termselect_i;
|
| 37 |
|
|
sc_signal< sc_uint<2> > utmi_opmode_i;
|
| 38 |
|
|
sc_signal< bool > utmi_dppulldown_i;
|
| 39 |
|
|
sc_signal< bool > utmi_dmpulldown_i;
|
| 40 |
|
|
sc_signal< sc_uint<2> > utmi_linestate_o;
|
| 41 |
|
|
|
| 42 |
|
|
ulpi_wrapper_tb(sc_module_name name): sc_module(name),
|
| 43 |
|
|
m_dut("tb_top"),
|
| 44 |
|
|
m_vpi_clk("tb_top.ulpi_clk60_i"),
|
| 45 |
|
|
m_ulpi("m_ulpi"), m_utmi("m_utmi"), m_reg("m_reg"),
|
| 46 |
|
|
m_phy_link_queue(2048), m_link_phy_queue(2048)
|
| 47 |
|
|
{
|
| 48 |
|
|
m_dut.ulpi_clk60_i(m_vpi_clk.m_clk);
|
| 49 |
|
|
m_dut.ulpi_rst_i(ulpi_rst_i);
|
| 50 |
|
|
m_dut.ulpi_data_i(ulpi_data_i);
|
| 51 |
|
|
m_dut.ulpi_data_o(ulpi_data_o);
|
| 52 |
|
|
m_dut.ulpi_dir_i(ulpi_dir_i);
|
| 53 |
|
|
m_dut.ulpi_nxt_i(ulpi_nxt_i);
|
| 54 |
|
|
m_dut.ulpi_stp_o(ulpi_stp_o);
|
| 55 |
|
|
m_dut.reg_addr_i(reg_addr_i);
|
| 56 |
|
|
m_dut.reg_stb_i(reg_stb_i);
|
| 57 |
|
|
m_dut.reg_we_i(reg_we_i);
|
| 58 |
|
|
m_dut.reg_data_i(reg_data_i);
|
| 59 |
|
|
m_dut.reg_data_o(reg_data_o);
|
| 60 |
|
|
m_dut.reg_ack_o(reg_ack_o);
|
| 61 |
|
|
m_dut.utmi_txvalid_i(utmi_txvalid_i);
|
| 62 |
|
|
m_dut.utmi_txready_o(utmi_txready_o);
|
| 63 |
|
|
m_dut.utmi_rxvalid_o(utmi_rxvalid_o);
|
| 64 |
|
|
m_dut.utmi_rxactive_o(utmi_rxactive_o);
|
| 65 |
|
|
m_dut.utmi_rxerror_o(utmi_rxerror_o);
|
| 66 |
|
|
m_dut.utmi_data_o(utmi_data_o);
|
| 67 |
|
|
m_dut.utmi_data_i(utmi_data_i);
|
| 68 |
|
|
m_dut.utmi_xcvrselect_i(utmi_xcvrselect_i);
|
| 69 |
|
|
m_dut.utmi_termselect_i(utmi_termselect_i);
|
| 70 |
|
|
m_dut.utmi_opmode_i(utmi_opmode_i);
|
| 71 |
|
|
m_dut.utmi_dppulldown_i(utmi_dppulldown_i);
|
| 72 |
|
|
m_dut.utmi_dmpulldown_i(utmi_dmpulldown_i);
|
| 73 |
|
|
m_dut.utmi_linestate_o(utmi_linestate_o);
|
| 74 |
|
|
|
| 75 |
|
|
m_ulpi.clk_i(m_vpi_clk.m_clk);
|
| 76 |
|
|
m_ulpi.rst_i(ulpi_rst_i);
|
| 77 |
|
|
|
| 78 |
|
|
m_ulpi.ulpi_data_o(ulpi_data_i);
|
| 79 |
|
|
m_ulpi.ulpi_data_i(ulpi_data_o);
|
| 80 |
|
|
m_ulpi.ulpi_dir_o(ulpi_dir_i);
|
| 81 |
|
|
m_ulpi.ulpi_nxt_o(ulpi_nxt_i);
|
| 82 |
|
|
m_ulpi.ulpi_stp_i(ulpi_stp_o);
|
| 83 |
|
|
|
| 84 |
|
|
m_utmi.clk_i(m_vpi_clk.m_clk);
|
| 85 |
|
|
m_utmi.rst_i(ulpi_rst_i);
|
| 86 |
|
|
|
| 87 |
|
|
m_utmi.utmi_txvalid_o(utmi_txvalid_i);
|
| 88 |
|
|
m_utmi.utmi_data_o(utmi_data_i);
|
| 89 |
|
|
m_utmi.utmi_txready_i(utmi_txready_o);
|
| 90 |
|
|
|
| 91 |
|
|
m_utmi.utmi_data_i(utmi_data_o);
|
| 92 |
|
|
m_utmi.utmi_rxvalid_i(utmi_rxvalid_o);
|
| 93 |
|
|
m_utmi.utmi_rxactive_i(utmi_rxactive_o);
|
| 94 |
|
|
|
| 95 |
|
|
m_reg.addr_o(reg_addr_i);
|
| 96 |
|
|
m_reg.data_o(reg_data_i);
|
| 97 |
|
|
m_reg.data_i(reg_data_o);
|
| 98 |
|
|
m_reg.we_o(reg_we_i);
|
| 99 |
|
|
m_reg.stb_o(reg_stb_i);
|
| 100 |
|
|
m_reg.ack_i(reg_ack_o);
|
| 101 |
|
|
|
| 102 |
|
|
SC_CTHREAD(testbench, m_vpi_clk.m_clk);
|
| 103 |
|
|
SC_CTHREAD(phy_tx, m_vpi_clk.m_clk);
|
| 104 |
|
|
SC_CTHREAD(phy_rx, m_vpi_clk.m_clk);
|
| 105 |
|
|
SC_CTHREAD(link_rx, m_vpi_clk.m_clk);
|
| 106 |
|
|
SC_CTHREAD(link_tx, m_vpi_clk.m_clk);
|
| 107 |
|
|
}
|
| 108 |
|
|
|
| 109 |
|
|
ulpi_wrapper_vpi m_dut;
|
| 110 |
|
|
|
| 111 |
|
|
sc_vpi_clock m_vpi_clk;
|
| 112 |
|
|
|
| 113 |
|
|
ulpi_driver m_ulpi;
|
| 114 |
|
|
utmi_driver m_utmi;
|
| 115 |
|
|
wbl_driver m_reg;
|
| 116 |
|
|
|
| 117 |
|
|
sc_fifo < sc_uint <9> > m_phy_link_queue;
|
| 118 |
|
|
sc_fifo < sc_uint <9> > m_link_phy_queue;
|
| 119 |
|
|
sc_mutex m_mutex;
|
| 120 |
|
|
|
| 121 |
|
|
void testbench(void);
|
| 122 |
|
|
void phy_tx(void);
|
| 123 |
|
|
void phy_rx(void);
|
| 124 |
|
|
void link_rx(void);
|
| 125 |
|
|
void link_tx(void);
|
| 126 |
|
|
};
|
| 127 |
|
|
|
| 128 |
|
|
#endif
|