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[/] [usb11/] [trunk/] [rtl/] [systemc/] [usb_pa_sie.cpp] - Blame information for rev 15

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/////////////////////////////////////////////////////////////////////
////                                                             ////
////  USB Packet Assembler                                       ////
////                                                             ////
////  SystemC Version: usb_pa_sie.cpp                            ////
////  Author: Alfredo Luiz Foltran Fialho                        ////
////          alfoltran@ig.com.br                                ////
////                                                             ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Verilog Version: usb1_pa.v                                  ////
//// Copyright (C) 2000-2002 Rudolf Usselmann                    ////
////                         www.asics.ws                        ////
////                         rudi@asics.ws                       ////
////                                                             ////
//// This source file may be used and distributed without        ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
////                                                             ////
////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
//// POSSIBILITY OF SUCH DAMAGE.                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
 
#include "systemc.h"
#include "usb_pa_sie.h"
 
void usb_pa_sie::zl_up(void) {
        zero_length.write(ep_empty.read());
}
 
void usb_pa_sie::zl_r_up(void) {
        if (!rst.read())
                zero_length_r.write(false);
        else if (last.read())
                zero_length_r.write(false);
        else if (crc16_clr.read())
                zero_length_r.write(zero_length.read());
}
 
void usb_pa_sie::tx_valid_r_up1(void) {
        tx_valid_r1.write(tx_valid.read());
}
 
void usb_pa_sie::tx_valid_r_up2(void) {
        tx_valid_r.write(tx_valid_r1.read());
}
 
void usb_pa_sie::send_token_up(void) {
        if (!rst.read())
                send_token_r.write(false);
        else if (send_token.read())
                send_token_r.write(true);
        else if (tx_ready.read())
                send_token_r.write(false);
}
 
// TOKEN PID Select
void usb_pa_sie::token_pid_up(void) {
        switch (token_pid_sel.read()) {// synopsys full_case parallel_case
                case 0: token_pid.write(((sc_uint<4>)(~USBF_T_PID_ACK), (sc_uint<4>)USBF_T_PID_ACK));
                                break;
                case 1: token_pid.write(((sc_uint<4>)(~USBF_T_PID_NACK), (sc_uint<4>)USBF_T_PID_NACK));
                                break;
                case 2: token_pid.write(((sc_uint<4>)(~USBF_T_PID_STALL), (sc_uint<4>)USBF_T_PID_STALL));
                                break;
                case 3: token_pid.write(((sc_uint<4>)(~USBF_T_PID_NYET), (sc_uint<4>)USBF_T_PID_NYET));
                                break;
        }
}
 
// DATA PID Select
void usb_pa_sie::data_pid_up(void) {
        switch (data_pid_sel.read()) {// synopsys full_case parallel_case
                case 0: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA0), (sc_uint<4>)USBF_T_PID_DATA0));
                                break;
                case 1: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA1), (sc_uint<4>)USBF_T_PID_DATA1));
                                break;
                case 2: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA2), (sc_uint<4>)USBF_T_PID_DATA2));
                                break;
                case 3: data_pid.write(((sc_uint<4>)(~USBF_T_PID_MDATA), (sc_uint<4>)USBF_T_PID_MDATA));
                                break;
        }
}
 
// Data Path Muxes
void usb_pa_sie::tx_data_up1(void) {
        if (dsel.read())
                tx_data_data.write(tx_spec_data.read());
        else
                tx_data_data.write(tx_data_st.read());
}
 
void usb_pa_sie::tx_data_up2(void) {
        if (send_token.read() || send_token_r.read())
                tx_data_d.write(token_pid.read());
        else
                tx_data_d.write(tx_data_data.read());
}
 
void usb_pa_sie::tx_data_up3(void) {
        tx_data.write(tx_data_d.read());
}
 
void usb_pa_sie::tx_spec_up(void) {
        if (!crc_sel1.read() && !crc_sel2.read())
                tx_spec_data.write(data_pid.read());
        else if (crc_sel1.read())
                tx_spec_data.write(crc16_rev.read().range(15, 8));      // CRC 1
        else
                tx_spec_data.write(crc16_rev.read().range(7, 0));        // CRC 2
}
 
// TX Valid Assignment
void usb_pa_sie::tx_valid_up1(void) {
        tx_valid_last.write(send_token.read() || last.read());
}
 
void usb_pa_sie::tx_valid_up2(void) {
        tx_valid.write(tx_valid_d.read());
}
 
void usb_pa_sie::tx_first_up1(void) {
        tx_first_r.write(send_token.read() || send_data.read());
}
 
void usb_pa_sie::tx_first_up2(void) {
        tx_first.write((send_token.read() || send_data.read()) && !tx_first_r.read());
}
 
// CRC Logic
void usb_pa_sie::send_data_up1(void) {
        send_data_r.write(send_data.read());
}
 
void usb_pa_sie::send_data_up2(void) {
        send_data_r2.write(send_data_r.read());
}
 
void usb_pa_sie::crc16_clr_up(void) {
        crc16_clr.write(send_data.read() && !send_data_r.read());
}
 
void usb_pa_sie::crc16_din_up(void) {
        #ifdef USB_SIMULATION
                crc16_din.write((       (sc_uint<1>)tx_data_st.read()[0],
                                                        (sc_uint<1>)tx_data_st.read()[1],
                                                        (sc_uint<1>)tx_data_st.read()[2],
                                                        (sc_uint<1>)tx_data_st.read()[3],
                                                        (sc_uint<1>)tx_data_st.read()[4],
                                                        (sc_uint<1>)tx_data_st.read()[5],
                                                        (sc_uint<1>)tx_data_st.read()[6],
                                                        (sc_uint<1>)tx_data_st.read()[7]));
        #else
                crc16_din.write(tx_data_st.read().range(0, 7));
        #endif
}
 
void usb_pa_sie::crc16_add_up(void) {
        crc16_add.write(!zero_length_r.read() &&
                        ((send_data_r.read() && !send_data_r2.read()) || (rd_next.read() && !crc_sel1.read())));
}
 
void usb_pa_sie::crc16_up(void) {
        if (crc16_clr.read())
                crc16.write(65535);
        else if (crc16_add.read())
                crc16.write(crc16_next.read());
}
 
void usb_pa_sie::crc16_rev_up(void) {
        #ifdef USB_SIMULATION
                crc16_rev.write((       (sc_uint<1>)!crc16.read()[8],
                                                        (sc_uint<1>)!crc16.read()[9],
                                                        (sc_uint<1>)!crc16.read()[10],
                                                        (sc_uint<1>)!crc16.read()[11],
                                                        (sc_uint<1>)!crc16.read()[12],
                                                        (sc_uint<1>)!crc16.read()[13],
                                                        (sc_uint<1>)!crc16.read()[14],
                                                        (sc_uint<1>)!crc16.read()[15],
                                                        (sc_uint<1>)!crc16.read()[0],
                                                        (sc_uint<1>)!crc16.read()[1],
                                                        (sc_uint<1>)!crc16.read()[2],
                                                        (sc_uint<1>)!crc16.read()[3],
                                                        (sc_uint<1>)!crc16.read()[4],
                                                        (sc_uint<1>)!crc16.read()[5],
                                                        (sc_uint<1>)!crc16.read()[6],
                                                        (sc_uint<1>)!crc16.read()[7]));
        #else
                crc16_rev.write(((sc_uint<8>)(~crc16.read().range(8, 15)), (sc_uint<8>)(~crc16.read().range(0, 7))));
        #endif
}
 
// Transmit and Encode FSM
void usb_pa_sie::state_up(void) {
        if (!rst.read())
                state.write(PA_IDLE);
        else
                state.write(next_state.read());
}
 
void usb_pa_sie::pa_statemachine(void) {
        next_state.write(state.read());                 // Default don't change current state
        tx_valid_d.write(false);
        dsel.write(false);
        rd_next.write(false);
        last.write(false);
        crc_sel1.write(false);
        crc_sel2.write(false);
 
        switch (state.read()) {// synopsys full_case parallel_case
                case PA_IDLE:   if (zero_length.read() && send_data.read()) {
                                                        tx_valid_d.write(true);
                                                        dsel.write(true);
                                                        next_state.write(PA_CRC1);
 
                                                // Send DATA packet
                                                } else if (send_data.read()) {
                                                        tx_valid_d.write(true);
                                                        dsel.write(true);
                                                        next_state.write(PA_DATA);
                                                }
                                                break;
                case PA_DATA:   if (tx_ready.read() && tx_valid_r.read())
                                                        rd_next.write(true);
 
                                                tx_valid_d.write(true);
                                                if (!send_data.read() && tx_ready.read() && tx_valid_r.read()) {
                                                        dsel.write(true);
                                                        crc_sel1.write(true);
                                                        next_state.write(PA_CRC1);
                                                }
                                                break;
                case PA_CRC1:   dsel.write(true);
                                                tx_valid_d.write(true);
                                                if (tx_ready.read()) {
                                                        last.write(true);
                                                        crc_sel2.write(true);
                                                        next_state.write(PA_CRC2);
                                                } else {
                                                        tx_valid_d.write(true);
                                                        crc_sel1.write(true);
                                                }
                                                break;
                case PA_CRC2:   dsel.write(true);
                                                crc_sel2.write(true);
                                                if (tx_ready.read())
                                                        next_state.write(PA_IDLE);
                                                else
                                                        last.write(true);
                                                break;
        }
}
/*
usb_pa_sie::~usb_pa_sie(void) {
        if (i_crc16)
                delete i_crc16;
}
*/

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Subversion Repositories usb11

[/] [usb11/] [trunk/] [rtl/] [systemc/] [usb_pa_sie.cpp] - Blame information for rev 15

Line No.	Rev	Author	Line
1	2	alfoltran	`/////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// USB Packet Assembler ////`
4			`//// ////`
5			`//// SystemC Version: usb_pa_sie.cpp ////`
6			`//// Author: Alfredo Luiz Foltran Fialho ////`
7			`//// alfoltran@ig.com.br ////`
8			`//// ////`
9			`//// ////`
10			`/////////////////////////////////////////////////////////////////////`
11			`//// ////`
12			`//// Verilog Version: usb1_pa.v ////`
13			`//// Copyright (C) 2000-2002 Rudolf Usselmann ////`
14			`//// www.asics.ws ////`
15			`//// rudi@asics.ws ////`
16			`//// ////`
17			`//// This source file may be used and distributed without ////`
18			`//// restriction provided that this copyright statement is not ////`
19			`//// removed from the file and that any derivative work contains ////`
20			`//// the original copyright notice and the associated disclaimer.////`
21			`//// ////`
22			//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
23			`//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////`
24			`//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////`
25			`//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////`
26			`//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////`
27			`//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////`
28			`//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////`
29			`//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////`
30			`//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////`
31			`//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////`
32			`//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////`
33			`//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////`
34			`//// POSSIBILITY OF SUCH DAMAGE. ////`
35			`//// ////`
36			`/////////////////////////////////////////////////////////////////////`
37
38			`#include "systemc.h"`
39			`#include "usb_pa_sie.h"`
40
41			`void usb_pa_sie::zl_up(void) {`
42			`zero_length.write(ep_empty.read());`
43			`}`
44
45			`void usb_pa_sie::zl_r_up(void) {`
46			`if (!rst.read())`
47			`zero_length_r.write(false);`
48			`else if (last.read())`
49			`zero_length_r.write(false);`
50			`else if (crc16_clr.read())`
51			`zero_length_r.write(zero_length.read());`
52			`}`
53
54			`void usb_pa_sie::tx_valid_r_up1(void) {`
55			`tx_valid_r1.write(tx_valid.read());`
56			`}`
57
58			`void usb_pa_sie::tx_valid_r_up2(void) {`
59			`tx_valid_r.write(tx_valid_r1.read());`
60			`}`
61
62			`void usb_pa_sie::send_token_up(void) {`
63			`if (!rst.read())`
64			`send_token_r.write(false);`
65			`else if (send_token.read())`
66			`send_token_r.write(true);`
67			`else if (tx_ready.read())`
68			`send_token_r.write(false);`
69			`}`
70
71			`// TOKEN PID Select`
72			`void usb_pa_sie::token_pid_up(void) {`
73			`switch (token_pid_sel.read()) {// synopsys full_case parallel_case`
74			`case 0: token_pid.write(((sc_uint<4>)(~USBF_T_PID_ACK), (sc_uint<4>)USBF_T_PID_ACK));`
75			`break;`
76			`case 1: token_pid.write(((sc_uint<4>)(~USBF_T_PID_NACK), (sc_uint<4>)USBF_T_PID_NACK));`
77			`break;`
78			`case 2: token_pid.write(((sc_uint<4>)(~USBF_T_PID_STALL), (sc_uint<4>)USBF_T_PID_STALL));`
79			`break;`
80			`case 3: token_pid.write(((sc_uint<4>)(~USBF_T_PID_NYET), (sc_uint<4>)USBF_T_PID_NYET));`
81			`break;`
82			`}`
83			`}`
84
85			`// DATA PID Select`
86			`void usb_pa_sie::data_pid_up(void) {`
87			`switch (data_pid_sel.read()) {// synopsys full_case parallel_case`
88			`case 0: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA0), (sc_uint<4>)USBF_T_PID_DATA0));`
89			`break;`
90			`case 1: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA1), (sc_uint<4>)USBF_T_PID_DATA1));`
91			`break;`
92			`case 2: data_pid.write(((sc_uint<4>)(~USBF_T_PID_DATA2), (sc_uint<4>)USBF_T_PID_DATA2));`
93			`break;`
94			`case 3: data_pid.write(((sc_uint<4>)(~USBF_T_PID_MDATA), (sc_uint<4>)USBF_T_PID_MDATA));`
95			`break;`
96			`}`
97			`}`
98
99			`// Data Path Muxes`
100			`void usb_pa_sie::tx_data_up1(void) {`
101			`if (dsel.read())`
102			`tx_data_data.write(tx_spec_data.read());`
103			`else`
104			`tx_data_data.write(tx_data_st.read());`
105			`}`
106
107			`void usb_pa_sie::tx_data_up2(void) {`
108			`if (send_token.read() \|\| send_token_r.read())`
109			`tx_data_d.write(token_pid.read());`
110			`else`
111			`tx_data_d.write(tx_data_data.read());`
112			`}`
113
114			`void usb_pa_sie::tx_data_up3(void) {`
115			`tx_data.write(tx_data_d.read());`
116			`}`
117
118			`void usb_pa_sie::tx_spec_up(void) {`
119			`if (!crc_sel1.read() && !crc_sel2.read())`
120			`tx_spec_data.write(data_pid.read());`
121			`else if (crc_sel1.read())`
122			`tx_spec_data.write(crc16_rev.read().range(15, 8)); // CRC 1`
123			`else`
124			`tx_spec_data.write(crc16_rev.read().range(7, 0)); // CRC 2`
125			`}`
126
127			`// TX Valid Assignment`
128			`void usb_pa_sie::tx_valid_up1(void) {`
129			`tx_valid_last.write(send_token.read() \|\| last.read());`
130			`}`
131
132			`void usb_pa_sie::tx_valid_up2(void) {`
133			`tx_valid.write(tx_valid_d.read());`
134			`}`
135
136			`void usb_pa_sie::tx_first_up1(void) {`
137			`tx_first_r.write(send_token.read() \|\| send_data.read());`
138			`}`
139
140			`void usb_pa_sie::tx_first_up2(void) {`
141			`tx_first.write((send_token.read() \|\| send_data.read()) && !tx_first_r.read());`
142			`}`
143
144			`// CRC Logic`
145			`void usb_pa_sie::send_data_up1(void) {`
146			`send_data_r.write(send_data.read());`
147			`}`
148
149			`void usb_pa_sie::send_data_up2(void) {`
150			`send_data_r2.write(send_data_r.read());`
151			`}`
152
153			`void usb_pa_sie::crc16_clr_up(void) {`
154			`crc16_clr.write(send_data.read() && !send_data_r.read());`
155			`}`
156
157			`void usb_pa_sie::crc16_din_up(void) {`
158			`#ifdef USB_SIMULATION`
159			`crc16_din.write(( (sc_uint<1>)tx_data_st.read()[0],`
160			`(sc_uint<1>)tx_data_st.read()[1],`
161			`(sc_uint<1>)tx_data_st.read()[2],`
162			`(sc_uint<1>)tx_data_st.read()[3],`
163			`(sc_uint<1>)tx_data_st.read()[4],`
164			`(sc_uint<1>)tx_data_st.read()[5],`
165			`(sc_uint<1>)tx_data_st.read()[6],`
166			`(sc_uint<1>)tx_data_st.read()[7]));`
167			`#else`
168			`crc16_din.write(tx_data_st.read().range(0, 7));`
169			`#endif`
170			`}`
171
172			`void usb_pa_sie::crc16_add_up(void) {`
173			`crc16_add.write(!zero_length_r.read() &&`
174			`((send_data_r.read() && !send_data_r2.read()) \|\| (rd_next.read() && !crc_sel1.read())));`
175			`}`
176
177			`void usb_pa_sie::crc16_up(void) {`
178			`if (crc16_clr.read())`
179			`crc16.write(65535);`
180			`else if (crc16_add.read())`
181			`crc16.write(crc16_next.read());`
182			`}`
183
184			`void usb_pa_sie::crc16_rev_up(void) {`
185			`#ifdef USB_SIMULATION`
186			`crc16_rev.write(( (sc_uint<1>)!crc16.read()[8],`
187			`(sc_uint<1>)!crc16.read()[9],`
188			`(sc_uint<1>)!crc16.read()[10],`
189			`(sc_uint<1>)!crc16.read()[11],`
190			`(sc_uint<1>)!crc16.read()[12],`
191			`(sc_uint<1>)!crc16.read()[13],`
192			`(sc_uint<1>)!crc16.read()[14],`
193			`(sc_uint<1>)!crc16.read()[15],`
194			`(sc_uint<1>)!crc16.read()[0],`
195			`(sc_uint<1>)!crc16.read()[1],`
196			`(sc_uint<1>)!crc16.read()[2],`
197			`(sc_uint<1>)!crc16.read()[3],`
198			`(sc_uint<1>)!crc16.read()[4],`
199			`(sc_uint<1>)!crc16.read()[5],`
200			`(sc_uint<1>)!crc16.read()[6],`
201			`(sc_uint<1>)!crc16.read()[7]));`
202			`#else`
203			`crc16_rev.write(((sc_uint<8>)(~crc16.read().range(8, 15)), (sc_uint<8>)(~crc16.read().range(0, 7))));`
204			`#endif`
205			`}`
206
207			`// Transmit and Encode FSM`
208			`void usb_pa_sie::state_up(void) {`
209			`if (!rst.read())`
210			`state.write(PA_IDLE);`
211			`else`
212			`state.write(next_state.read());`
213			`}`
214
215			`void usb_pa_sie::pa_statemachine(void) {`
216			`next_state.write(state.read()); // Default don't change current state`
217			`tx_valid_d.write(false);`
218			`dsel.write(false);`
219			`rd_next.write(false);`
220			`last.write(false);`
221			`crc_sel1.write(false);`
222			`crc_sel2.write(false);`
223
224			`switch (state.read()) {// synopsys full_case parallel_case`
225			`case PA_IDLE: if (zero_length.read() && send_data.read()) {`
226			`tx_valid_d.write(true);`
227			`dsel.write(true);`
228			`next_state.write(PA_CRC1);`
229
230			`// Send DATA packet`
231			`} else if (send_data.read()) {`
232			`tx_valid_d.write(true);`
233			`dsel.write(true);`
234			`next_state.write(PA_DATA);`
235			`}`
236			`break;`
237			`case PA_DATA: if (tx_ready.read() && tx_valid_r.read())`
238			`rd_next.write(true);`
239
240			`tx_valid_d.write(true);`
241			`if (!send_data.read() && tx_ready.read() && tx_valid_r.read()) {`
242			`dsel.write(true);`
243			`crc_sel1.write(true);`
244			`next_state.write(PA_CRC1);`
245			`}`
246			`break;`
247			`case PA_CRC1: dsel.write(true);`
248			`tx_valid_d.write(true);`
249			`if (tx_ready.read()) {`
250			`last.write(true);`
251			`crc_sel2.write(true);`
252			`next_state.write(PA_CRC2);`
253			`} else {`
254			`tx_valid_d.write(true);`
255			`crc_sel1.write(true);`
256			`}`
257			`break;`
258			`case PA_CRC2: dsel.write(true);`
259			`crc_sel2.write(true);`
260			`if (tx_ready.read())`
261			`next_state.write(PA_IDLE);`
262			`else`
263			`last.write(true);`
264			`break;`
265			`}`
266			`}`
267			`/*`
268			`usb_pa_sie::~usb_pa_sie(void) {`
269			`if (i_crc16)`
270			`delete i_crc16;`
271			`}`
272			`*/`