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alfoltran |
/////////////////////////////////////////////////////////////////////
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//// ////
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//// USB Packet Disassembler ////
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//// ////
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//// SystemC Version: usb_pd_sie.h ////
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//// Author: Alfredo Luiz Foltran Fialho ////
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//// alfoltran@ig.com.br ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Verilog Version: usb1_pd.v ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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#ifndef USB_PD_SIE_H
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#define USB_PD_SIE_H
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#include "usb_defines.h"
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#include "usb_crc5.h"
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#include "usb_crc16.h"
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enum PD_STATE { PD_IDLE = 1,
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PD_ACTIVE = 2,
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PD_TOKEN = 4,
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PD_DATA = 8};
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SC_MODULE(usb_pd_sie) {
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public:
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sc_in<bool> clk;
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sc_in<bool> rst;
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// RX Interface
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sc_in<sc_uint<8> > rx_data;
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sc_in<bool> rx_valid, rx_active, rx_err;
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// PID Information
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// Decoded PIDs (used when token_valid is asserted)
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sc_out<bool> pid_OUT, pid_IN, pid_SOF, pid_SETUP;
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sc_out<bool> pid_DATA0, pid_DATA1, pid_DATA2, pid_MDATA;
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sc_out<bool> pid_ACK, pid_NACK, pid_STALL, pid_NYET;
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sc_out<bool> pid_PRE, pid_ERR, pid_SPLIT, pid_PING;
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sc_out<bool> pid_cks_err; // Indicates a PID checksum error
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// Token Information
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sc_out<sc_uint<7> > token_fadr; // Function address from token
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sc_out<sc_uint<4> > token_endp; // Endpoint number from token
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sc_out<bool> token_valid; // Token is valid
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sc_out<bool> crc5_err; // Token CRC5 error
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sc_out<sc_uint<11> >frame_no; // Frame number for SOF tokens
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// Receive Data Output
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sc_out<sc_uint<8> > rx_data_st; // Data to memory store unit
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sc_out<bool> rx_data_valid; // Data on rx_data_st is valid
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sc_out<bool> rx_data_done; // Indicates end of a transfer
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sc_out<bool> crc16_err; // Data packet CRC16 error
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// Misc
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sc_out<bool> seq_err; // State Machine Sequence Error
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sc_out<bool> rx_busy; // Receiving Data Packet
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// Local Signals
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sc_signal<sc_uint<4> > state, next_state;// synopsys state_vector state
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sc_signal<sc_uint<8> > pid; // Packet PID
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sc_signal<bool> pid_le_sm; // PID load enable from State Machine
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sc_signal<bool> pid_ld_en; // Enable loading of PID (all conditions)
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sc_signal<bool> pid_RES;
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sc_signal<bool> pid_TOKEN; // All TOKEN packet that we recognize
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sc_signal<bool> pid_DATA; // All DATA packet that we recognize
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sc_signal<sc_uint<8> > token0, token1; // Token registers
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sc_signal<bool> token_le_1, token_le_2; // Latch enables for token storage registers
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sc_signal<sc_uint<5> > token_crc5;
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sc_signal<sc_uint<8> > d0, d1, d2; // Data path delay line (used to filter out crcs)
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sc_signal<bool> data_valid_d; // Data valid output from State Machine
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sc_signal<bool> data_done; // Data cycle complete output from State Machine
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sc_signal<bool> data_valid0; // Data valid delay line
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sc_signal<bool> rxv1, rxv2;
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sc_signal<bool> pid_ack;
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sc_signal<bool> token_valid_r1;
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sc_signal<bool> token_valid_str1;
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sc_signal<bool> rx_active_r;
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sc_signal<bool> rx_busy_d;
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sc_signal<sc_uint<5> > crc5_out, crc5_out2;
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sc_signal<sc_uint<5> > crc5_pol;
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sc_signal<sc_uint<11> > crc5_din;
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sc_signal<bool> crc16_clr;
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sc_signal<sc_uint<16> > crc16_sum, crc16_out;
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sc_signal<sc_uint<8> > crc16_din;
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usb_crc5 *i_crc5; // CRC5 Calculator
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usb_crc16 *i_crc16; // CRC16 Calculator
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// Busy Logic Functions
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void rx_busy_up1(void);
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void rx_busy_up2(void);
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// PID Decoding Logic Functions
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void pid_ld_up(void);
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void pid_up(void);
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void pid_cks_err_up(void);
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void pid_decoder(void);
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void pid_token_up(void);
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void pid_data_up(void);
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// Token Decoding Logic Functions
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void token_decoder(void);
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void token_valid_up1(void);
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void token_valid_up2(void);
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void token_valid_up3(void);
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void token_up(void);
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// CRC5 Logic Functions
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void crc5_din_up(void);
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void crc5_err_up(void);
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void crc5_out2_up(void);
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// Data Receiving Logic Functions
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void rxv1_up(void);
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void rxv2_up(void);
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void data_valid0_up(void);
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void d_up(void);
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void rx_data_st_up(void);
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void rx_data_valid_up(void);
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void rx_data_done_up(void);
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// CRC16 Logic Functions
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void rx_active_r_up(void);
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void crc16_din_up(void);
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void crc16_clr_up(void);
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void crc16_sum_up(void);
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void crc16_err_up(void);
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// Receive/Decode State Machine Functions
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void state_up(void);
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void pd_statemachine(void);
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// Destructor
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// ~usb_pd_sie(void);
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SC_CTOR(usb_pd_sie) {
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crc5_pol.write(31);
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SC_METHOD(rx_busy_up1);
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sensitive << clk.pos() << rst.neg();
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SC_METHOD(rx_busy_up2);
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sensitive << clk.pos();
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SC_METHOD(pid_ld_up);
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sensitive << pid_le_sm << rx_active << rx_valid;
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SC_METHOD(pid_up);
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sensitive << clk.pos() << rst.neg();
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SC_METHOD(pid_cks_err_up);
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sensitive << pid;
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SC_METHOD(pid_decoder);
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sensitive << pid;
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SC_METHOD(pid_token_up);
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sensitive << pid_OUT << pid_IN << pid_SOF << pid_SETUP << pid_PING;
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SC_METHOD(pid_data_up);
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sensitive << pid_DATA0 << pid_DATA1 << pid_DATA2 << pid_MDATA;
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SC_METHOD(token_decoder);
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sensitive << clk.pos();
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SC_METHOD(token_valid_up1);
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sensitive << clk.pos();
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SC_METHOD(token_valid_up2);
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sensitive << clk.pos();
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SC_METHOD(token_valid_up3);
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sensitive << token_valid_str1;
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SC_METHOD(token_up);
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sensitive << token0 << token1;
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SC_METHOD(crc5_din_up);
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sensitive << token_fadr << token_endp;
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SC_METHOD(crc5_err_up);
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sensitive << token_valid << crc5_out2 << token_crc5;
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SC_METHOD(crc5_out2_up);
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sensitive << crc5_out;
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SC_METHOD(rxv1_up);
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sensitive << clk.pos() << rst.neg();
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SC_METHOD(rxv2_up);
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sensitive << clk.pos() << rst.neg();
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SC_METHOD(data_valid0_up);
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sensitive << clk.pos();
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SC_METHOD(d_up);
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sensitive << clk.pos();
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SC_METHOD(rx_data_st_up);
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sensitive << d2;
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SC_METHOD(rx_data_valid_up);
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sensitive << data_valid0;
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SC_METHOD(rx_data_done_up);
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sensitive << data_done;
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SC_METHOD(rx_active_r_up);
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sensitive << clk.pos();
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SC_METHOD(crc16_din_up);
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sensitive << rx_data;
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SC_METHOD(crc16_clr_up);
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sensitive << rx_active << rx_active_r;
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SC_METHOD(crc16_sum_up);
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sensitive << clk.pos();
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SC_METHOD(crc16_err_up);
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sensitive << data_done << crc16_sum;
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SC_METHOD(state_up);
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sensitive << clk.pos() << rst.neg();
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SC_METHOD(pd_statemachine);
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sensitive << state << rx_valid << rx_active << rx_err << pid_ACK << pid_TOKEN << pid_DATA;
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// CRC5 Calculator Instantiation and Binding
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i_crc5 = new usb_crc5("CRC5");
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i_crc5->crc_in(crc5_pol);
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i_crc5->din(crc5_din);
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i_crc5->crc_out(crc5_out);
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// CRC16 Calculator Instantiation and Binding
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i_crc16 = new usb_crc16("CRC16");
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i_crc16->crc_in(crc16_sum);
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i_crc16->din(crc16_din);
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i_crc16->crc_out(crc16_out);
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}
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};
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#endif
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