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[/] [usb11_sim_model/] [trunk/] [USB_Stimuli.vhd] - Blame information for rev 5

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1 2 M_artin
--==========================================================================================================--
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--                                                                                                          --
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--  Copyright (C) 2011  by  Martin Neumann martin@neumanns-mail.de                                          --
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--                                                                                                          --
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--  This source file may be used and distributed without restriction provided that this copyright statement --
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--  is not removed from the file and that any derivative work contains the original copyright notice and    --
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--  the associated disclaimer.                                                                              --
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--                                                                                                          --
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--  This software is provided ''as is'' and without any express or implied warranties, including, but not   --
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--  limited to, the implied warranties of merchantability and fitness for a particular purpose. in no event --
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--  shall the author or contributors be liable for any direct, indirect, incidental, special, exemplary, or --
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--  consequential damages (including, but not limited to, procurement of substitute goods or services; loss --
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--  of use, data, or profits; or business interruption) however caused and on any theory of liability,      --
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--  whether in  contract, strict liability, or tort (including negligence or otherwise) arising in any way  --
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--  out of the use of this software, even if advised of the possibility of such damage.                     --
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--                                                                                                          --
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--==========================================================================================================--
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--                                                                                                          --
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--  File name   : USB_tc_02.vhd                                                                             --
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--  Author      : Martin Neumann  martin@neumanns-mail.de                                                   --
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--  Description : Copy and rename this file to usb_stimuli.vhd before running a new simulation!             --
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--                                                                                                          --
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--==========================================================================================================--
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--                                                                                                          --
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-- Change history                                                                                           --
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--                                                                                                          --
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-- Version / date        Description                                                                        --
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--                                                                                                          --
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-- 01  05 Mar 2011 MN    Initial version                                                                    --
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--                                                                                                          --
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-- End change history                                                                                       --
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--==========================================================================================================--
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LIBRARY work, IEEE;
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  USE IEEE.std_logic_1164.ALL;
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  USE IEEE.std_logic_arith.ALL;
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  USE work.usb_commands.ALL;
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ENTITY USB_Stimuli IS PORT(
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  -- Test Control Interface --
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  USB             : OUT usb_action;
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  t_no            : OUT NATURAL;
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  -- Application Interface
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  clk             : IN  STD_LOGIC;
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  rst_neg_ext     : OUT STD_LOGIC;
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  RXval           : IN  STD_LOGIC;                    -- RX bytes available
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  RXdat           : IN  STD_LOGIC_VECTOR(7 DOWNTO 0); -- Received data bytes
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  RXrdy           : OUT STD_LOGIC := '0';             -- Application ready for data
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  RXlen           : IN  STD_LOGIC_VECTOR(7 DOWNTO 0); -- Number of bytes available
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  TXval           : OUT STD_LOGIC := '0';             -- Application has valid data
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  TXdat           : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- Data byte to send
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  TXrdy           : IN  STD_LOGIC;                    -- Entity is ready for data
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  TXroom          : IN  STD_LOGIC_VECTOR(7 DOWNTO 0); -- No of free bytes in TX
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  TXcork          : OUT STD_LOGIC := '1');            -- Hold TX transmission
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END USB_Stimuli;
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ARCHITECTURE sim OF usb_stimuli IS
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  SIGNAL   rd_data : byte_array(0 TO 7);
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  SIGNAL   TX_load : STD_LOGIC := '0';
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BEGIN
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  p_stimuli_data : PROCESS
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  BEGIN
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    list("*****************************");
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    list("*   Results of tc_02.vhd    *");
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    list("*****************************");
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    list(" ");
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    list(T_No, 10);
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    rst_neg_ext <= '0';
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    WAIT FOR 301 ns;
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    rst_neg_ext <= '1';
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    WAIT FOR 40 ns;
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    list("Reset completed, initializing");
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    TX_load <= '1';
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    list(T_No, 20);
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    setup(usb, X"00", X"0");                                          --Send Setup to addr 0, endp 0 ..
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    send_D0(usb,(X"80",X"06",X"00",X"01",X"00",X"00",X"40",X"00"));  -- .. 'Get Device descriptor'
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    wait_slv(usb);                                                   --Recv ACK
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    in_token(usb, X"00", X"0");                                      --Send IN-Token
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    wait_slv(usb);                                                   --Recv Data1 Device Discriptor
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    send_ack(usb);                                                   --Send ACK
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    out_token(usb, X"00", X"0");
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    send_D0(usb);                                                    --Send Zero Data
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    wait_slv(usb);
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    list(T_No, 30);
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    setup(usb, X"00", X"0");                                         --Setup to addr 0, endp 0 ..
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    send_D0(usb,(X"00",X"05",X"03",X"00",X"00",X"00",X"00",X"00"));  -- .. 'Set Address'
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    wait_slv(usb);                                                   --Recv ACK
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    in_token(usb, X"00", X"0");                                      --Send IN-Token
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    wait_slv(usb);                                                   --Recv Data0 zero Length
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    send_ack(usb);                                                   --Send ACK
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    --Now we may use the new address :
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    list(T_No, 50);
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    out_token(usb, X"03", X"1");                                     --Send Out-Token to Endpoint 1
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    send_D0(usb, (X"11",X"22",X"33",X"44",X"55",X"66",X"77",X"88"));
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    wait_slv(usb);
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    list(T_No, 51);
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    out_token(usb, X"03", X"1");                                     --Send Out-Token to Endpoint 1
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    send_D0(usb, (X"11",X"12",X"13",X"14",X"15",X"16",X"17",X"18"));
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    wait_slv(usb);
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    TXcork <= '0';                                                   --Release TX buffer
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    FOR i IN 0 TO 5 LOOP
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      list(T_No, 60+i);
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      in_token(usb, X"03", X"1");                                    --Send IN-Token to Endpoint 1
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      wait_slv(usb);                                                 --Recv Data ?
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      send_ack(usb);                                                 --Send ACK
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    END LOOP;
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 --   list(T_No, 70);
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 --   in_token(usb, X"03", X"1");                                    --Send IN-Token to Endpoint 1
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 --   wait_slv(usb);                                                 --Recv Data ?
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 --   send_ack(usb);                                                 --Send ACK
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    IF usb_busy THEN                                                 --is a usb_monitor signal
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      WAIT UNTIL NOT usb_busy;
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    END IF;
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    WAIT FOR 300 ns;
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    send_RES(usb);
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    WAIT FOR 1 us;
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    ASSERT FALSE REPORT"End of Test" SEVERITY FAILURE;
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  END PROCESS;
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  p_rd_data : PROCESS
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    VARIABLE i : NATURAL := 0;
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  BEGIN
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  WAIT UNTIL rising_edge(clk);
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  RXrdy <= '1';
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  IF i < 8 THEN
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    RXrdy <= '1';
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    IF RXval ='1' THEN
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      rd_data(i) <= RXdat;
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    END IF;
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  ELSE
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    RXrdy <= '0';
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  END IF;
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  END PROCESS;
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  p_wr_data : PROCESS
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    VARIABLE i : NATURAL := 0;
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  BEGIN
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  WAIT UNTIL rising_edge(clk);
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  IF i < 333 AND TXrdy ='1' and TX_load ='1' THEN
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    TXval <= '1';
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    TXdat <= CONV_STD_LOGIC_VECTOR(i,8);
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    i := i +1;
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  ELSE
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    TXval  <= '0';
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  END IF;
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  END PROCESS;
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END sim;

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