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--==========================================================================================================--
--                                                                                                          --
--  Copyright (C) 2011  by  Martin Neumann martin@neumanns-mail.de                                          --
--                                                                                                          --
--  This source file may be used and distributed without restriction provided that this copyright statement --
--  is not removed from the file and that any derivative work contains the original copyright notice and    --
--  the associated disclaimer.                                                                              --
--                                                                                                          --
--  This software is provided ''as is'' and without any express or implied warranties, including, but not   --
--  limited to, the implied warranties of merchantability and fitness for a particular purpose. In no event --
--  shall the author or contributors be liable for any direct, indirect, incidental, special, exemplary, or --
--  consequential damages (including, but not limited to, procurement of substitute goods or services; loss --
--  of use, data, or profits; or business interruption) however caused and on any theory of liability,      --
--  whether in  contract, strict liability, or tort (including negligence or otherwise) arising in any way  --
--  out of the use of this software, even if advised of the possibility of such damage.                     --
--                                                                                                          --
--==========================================================================================================--
--                                                                                                          --
--  File name   : usb_fs_monitor.vhd                                                                        --
--  Author      : Martin Neumann  martin@neumanns-mail.de                                                   --
--  Description : USB bus monitor, logs all USB activities in result.out file.                              --
--                                                                                                          --
--==========================================================================================================--
--                                                                                                          --
-- Change history                                                                                           --
--                                                                                                          --
-- Version / date        Description                                                                        --
--                                                                                                          --
-- 01  05 Mar 2011 MN    Initial version                                                                    --
-- 02  01 Nov 2011 MN    clk_60MHz now internally generated; next_state corrected                           --
-- 03  30 Jan 2012 MN    fixed problems at transfer end, modified for protocol checking                     --
--                                                                                                          --
-- End change history                                                                                       --
--==========================================================================================================--
 
LIBRARY work, IEEE;
  USE work.usb_commands.ALL;
  USE IEEE.std_logic_1164.all;
  USE IEEE.std_logic_textio.all;
  USE std.textio.all;
 
ENTITY usb_fs_monitor IS PORT(
  master_oe       : IN STD_LOGIC;
  usb_Dp          : IN STD_LOGIC;
  usb_Dn          : IN STD_LOGIC);
END usb_fs_monitor;
 
ARCHITECTURE SIM OF usb_fs_monitor IS
  TYPE   state_mode   IS(idle, pid, token1, token2, frame1, frame2, data, eop, err);
  SIGNAL clk_en         : STD_LOGIC;
  SIGNAL clk_60MHz      : STD_LOGIC;
  SIGNAL usb_state      : state_mode;
  SIGNAL byte_valid     : STD_LOGIC;
  SIGNAL usb_dp_sync    : STD_LOGIC;
  SIGNAL usb_dn_sync    : STD_LOGIC;
  SIGNAL usb_bit        : STD_LOGIC;
  SIGNAL usb_byte       : STD_LOGIC_VECTOR(7 DOWNTO 0);
  SIGNAL bit_cntr       : NATURAL;
  SIGNAL dll_cntr       : NATURAL;
  SIGNAL stuffing_det   : STD_LOGIC;
  SIGNAL edge_detect    : STD_LOGIC;
  SIGNAL usb_dp_s0      : STD_LOGIC;
  SIGNAL usb_dp_s1      : STD_LOGIC;
  SIGNAL usb_dn_s0      : STD_LOGIC;
  SIGNAL usb_dn_s1      : STD_LOGIC;
  SIGNAL usb_dp_last    : STD_LOGIC;
  SIGNAL se0            : BOOLEAN;
 
BEGIN
 
--==========================================================================================================--
  -- Synchronize Inputs                                                                                     --
--==========================================================================================================--
 
  p_clk_60MHz : PROCESS
  BEGIN
    clk_60MHz <= '0';
    While true loop
      clk_60MHz <= '0';
      WAIT FOR 8333 ps;
      clk_60MHz <= '1';
      WAIT FOR 8334 ps; -- 60 MHz
    end loop;
  END PROCESS;
 
  p_usb_dp_sync: process (clk_60MHz)
  begin
    if rising_edge(clk_60MHz) then
      usb_dp_s0  <= usb_dp;
      usb_dp_s1  <= usb_dp_s0;
      if (usb_dp_s0 and usb_dp_s1) ='1' then
        usb_dp_sync <= '1';
      elsif (usb_dp_s0 OR usb_dp_s1) ='0' then
        usb_dp_sync <= '0';
      end if;
    end if;
  end process;
 
  p_usb_dn_sync: process (clk_60MHz)
  begin
    if rising_edge(clk_60MHz) then
      usb_dn_s0  <= usb_Dn;
      usb_dn_s1  <= usb_dn_s0;
      if (usb_dn_s0 and usb_dn_s1) ='1' then
        usb_dn_sync <= '1';
      elsif (usb_dn_s0 OR usb_dn_s1) ='0' then
        usb_dn_sync <= '0';
      end if;
    end if;
  end process;
 
  usb_bit <= usb_dp_sync AND NOT usb_dn_sync;
 
  p_usb_d_last: process (clk_60MHz)
  begin
    if rising_edge(clk_60MHz) THEN
      usb_dp_last <= usb_dp_sync;
    end if;
  end process;
 
  edge_detect <= usb_dp_last XOR usb_dp_sync;
 
  p_dll_cntr: PROCESS (clk_60MHz)
  BEGIN
    IF rising_edge(clk_60MHz) THEN
      IF edge_detect ='1' THEN
        IF dll_cntr >= 8 THEN
          dll_cntr <= 2;         -- clk_en to be centered in next count sequence
        ELSE
          dll_cntr <= 7;         -- clk_en is now centered
        END IF;
      ELSIF dll_cntr >= 8 THEN   -- normal count sequence is 8->4->5->6->7->8->4...
        dll_cntr <= 4;
      ELSE
        dll_cntr <= dll_cntr +1;
      END IF;
    END IF;
  END PROCESS;
 
  clk_en <= '1' WHEN dll_cntr >= 8 ELSE '0';
 
--==========================================================================================================--
  -- Analyse USB Inputs                                                                                     --
--==========================================================================================================--
 
  --se0 <= usb_Dp_sync='0' AND usb_Dn_sync='0';
 
  p_se0 : PROCESS(clk_60MHz)
  BEGIN
    IF rising_edge(clk_60MHz) THEN
      IF clk_en ='1' THEN
        se0 <= usb_Dp_sync='0' AND usb_Dn_sync='0';
      END IF;
    END IF;
  END PROCESS;
 
  p_reset_det : PROCESS(clk_60MHz)
    VARIABLE se0_lev      : BOOLEAN;
    VARIABLE se0_time     : Time := 0 ns;
    VARIABLE v_LineWr     : line := NULL;
  BEGIN
    IF rising_edge(clk_60MHz) THEN
      IF clk_en ='1' THEN
        IF se0 THEN
          IF NOT se0_lev THEN
            se0_lev  := TRUE;
            se0_time := now;
          END IF;
        ELSE
          IF se0_lev THEN
            se0_time := now - se0_time;
            IF se0_time >= 200 ns THEN
              write (v_LineWr, now, right,15);
              IF se0_time >= 2500 ns THEN
                write (v_LineWr, STRING'("  USB Reset detected for "));
              ELSE
                write (v_LineWr, STRING'("  USB lines at SE0 for "));
              END IF;
              write (v_LineWr, se0_time, right,15);
              PrintLine(v_LineWr);
            END IF;
          END IF;
          se0_lev := FALSE;
        END IF;
      END IF;
    END IF;
  END PROCESS;
 
  p_usb_byte : PROCESS(usb_state, clk_60MHz)
    VARIABLE hold, usb_last : STD_LOGIC;
    VARIABLE ones_cnt : NATURAL;
  BEGIN
    IF rising_edge(clk_60MHz) THEN
      IF usb_state = idle OR usb_state = eop THEN
        usb_last := usb_bit;
        bit_cntr <= 0;
        ones_cnt := 0;
        byte_valid <= '0';
        usb_byte <= (OTHERS => 'H');
      ELSIF clk_en ='1' THEN
        IF usb_bit = usb_last THEN
          usb_byte <= '1' & usb_byte(7 DOWNTO 1);
          bit_cntr <= (bit_cntr +1) MOD 8;
          ones_cnt := (ones_cnt +1);
          IF ones_cnt > 6 THEN
            ASSERT FALSE REPORT"Stuffing error" SEVERITY ERROR;
          END IF;
          hold := '0';
        ELSE
          IF ones_cnt /= 6 THEN
            usb_byte <= '0' & usb_byte(7 DOWNTO 1);
            bit_cntr <= (bit_cntr +1) MOD 8;
            hold := '0';
          ELSE
            hold := '1';
          END IF;
          ones_cnt := 0;
        END IF;
        IF bit_cntr=7 THEN
          byte_valid <= NOT hold;
        ELSE
          byte_valid <= '0';
        END IF;
        usb_last := usb_bit;
      END IF;
      stuffing_det <= hold;
    END IF;
  END PROCESS;
 
  p_usb_state : PROCESS(clk_60MHz)
    VARIABLE address  : STD_LOGIC_VECTOR(6 DOWNTO 0);
    VARIABLE endpoint : STD_LOGIC_VECTOR(3 DOWNTO 0);
    VARIABLE frame_no : STD_LOGIC_VECTOR(10 DOWNTO 0);
    VARIABLE byte_cnt : NATURAL;
    VARIABLE sync_pattern : STD_LOGIC_VECTOR(7 DOWNTO 0);
    VARIABLE v_LineWr : line := NULL;
  BEGIN
    IF rising_edge(clk_60MHz) THEN
      IF clk_en ='1' THEN
        IF se0 THEN
          sync_pattern := (OTHERS => '0');
        ELSE
          sync_pattern := sync_pattern(6 DOWNTO 0) & usb_bit;
        END IF;
        CASE usb_state IS
          WHEN idle   => IF sync_pattern = "01010100" THEN
                           usb_state <= pid;
                         ELSE
                           usb_state <= idle;
                         END IF;
          WHEN pid    => IF byte_valid ='1' THEN
                           IF usb_byte(3 DOWNTO 0) /= NOT usb_byte(7 DOWNTO 4) THEN  --+------+------+-------------+
                             ASSERT FALSE REPORT"PID error" SEVERITY ERROR;          --| PID  | usb- | String      |
                           END IF;                                                   --|Bit3:0|state |             |
                           write (v_LineWr, now, right,15);                          --|------|------|-------------|
                           IF master_oe ='1' THEN                                    --| x"1" | token| "OUT-Token" |
                             write (v_LineWr, STRING'("  Send "));                   --| x"2" | idle | "ACK"       |
                           ELSE                                                      --| x"3" | data | "Data0"     |
                             write (v_LineWr, STRING'("  Recv "));                   --| x"4" | N/A  | "Ping"      |
                           END IF;                                                   --| x"5" | frame| "SOF-Token" |
                           byte_cnt := 0;                                            --| x"6" | idle | "NYET"      |
                           ASSERT usb_byte(3 DOWNTO 0) = NOT usb_byte(7 DOWNTO 4)    --| x"7" | data | "Data2"     |
                             REPORT"PID error detected" SEVERITY ERROR;              --| x"8" | N/A  | "Split"     |
                           CASE usb_byte(3 DOWNTO 0) IS                              --| x"9" | token| "IN-Token"  |
                             WHEN x"1"   => write (v_LineWr, STRING'("OUT-Token"));  --| x"A" | idle | "NAK"       |
                             WHEN x"9"   => write (v_LineWr, STRING'("IN-Token"));   --| x"B" | data | "Data1"     |
                             WHEN x"5"   => write (v_LineWr, STRING'("SOF-Token"));  --| x"C" | N/A  | "Preamble"  |
                             WHEN x"D"   => write (v_LineWr, STRING'("Setup"));      --| x"D" | token| "Setup"     |
                             WHEN x"3"   => write (v_LineWr, STRING'("Data0"));      --| x"E" | idle | "STALL"     |
                             WHEN x"B"   => write (v_LineWr, STRING'("Data1"));      --| x"F" | data | "MData"     |
                             WHEN x"7"   => write (v_LineWr, STRING'("Data2"));      --| x"0" | idle | "Error"     |
                             WHEN x"F"   => write (v_LineWr, STRING'("MData"));      --+------+------+-------------+
                             WHEN x"2"   => write (v_LineWr, STRING'("ACK"));
                             WHEN x"A"   => write (v_LineWr, STRING'("NAK"));
                             WHEN x"E"   => write (v_LineWr, STRING'("STALL"));
                             WHEN x"6"   => write (v_LineWr, STRING'("NYET"));
                             WHEN x"C"   => write (v_LineWr, STRING'("Preamble"));
                          -- WHEN x"C"   => write (v_LineWr, STRING'("SPLIT-ERR"));
                             WHEN x"8"   => write (v_LineWr, STRING'("Split"));
                             WHEN x"4"   => write (v_LineWr, STRING'("Ping"));
                             WHEN OTHERS => ASSERT FALSE REPORT"PID is zero" SEVERITY ERROR;
                           END CASE;
                           CASE usb_byte(3 DOWNTO 0) IS
                             WHEN x"1" | x"9" | x"D"        => usb_state <= token1;
                             WHEN x"5"                      => usb_state <= frame1;
                             WHEN x"3" | x"B" | x"7" | x"F" => usb_state <= data;
                             WHEN x"2" | x"A" | x"E" | x"6" => usb_state <= eop;
                                                               PrintLine(v_LineWr); -- print as soon as possible
                             WHEN others                    => usb_state <= idle;
                               ASSERT FALSE REPORT "FS-Monitor: This PID is not impemented" SEVERITY WARNING;
                           END CASE;
                         END IF;
                         IF se0 THEN
                           usb_state <= err;
                         END IF;
          WHEN token1 => IF byte_valid ='1' THEN
                           address  := usb_byte(6 DOWNTO 0);
                           endpoint(0) := usb_byte(7);
                           usb_state <= token2;
                         END IF;
                         IF se0 THEN
                           usb_state <= err;
                         END IF;
          WHEN token2 => IF byte_valid ='1' THEN
                           endpoint(3 DOWNTO 1) := usb_byte(2 DOWNTO 0);
                           write (v_LineWr, STRING'(": Address 0x"));
                           HexWrite (v_LineWr, address);
                           write (v_LineWr, STRING'(", Endpoint 0x"));
                           HexWrite (v_LineWr, endpoint);
                           write (v_LineWr, STRING'(", CRC5 0x"));
                           HexWrite (v_LineWr, usb_byte(7 DOWNTO 3));
                           usb_state <= eop;
                           PrintLine(v_LineWr);
                         END IF;
          WHEN frame1 => IF byte_valid ='1' THEN
                           frame_no(7 DOWNTO 0) := usb_byte;
                           usb_state <= frame2;
                         END IF;
                         IF se0 THEN
                           usb_state <= err;
                         END IF;
          WHEN frame2 => IF byte_valid ='1' THEN
                           frame_no(10 DOWNTO 8) := usb_byte(2 DOWNTO 0);
                           write (v_LineWr, STRING'(": Frame No 0x"));
                           HexWrite (v_LineWr, frame_no);
                           write (v_LineWr, STRING'(", CRC5 0x"));
                           HexWrite (v_LineWr, usb_byte(7 DOWNTO 3));
                           usb_state <= err;
                           usb_state <= eop;
                           PrintLine(v_LineWr);
                         END IF;
          WHEN data   => IF byte_valid ='1' THEN
                           byte_cnt := byte_cnt +1;
                           IF byte_cnt = 17 THEN
                             PrintLine(v_LineWr);
                             write (v_LineWr, now, right,15);
                             write (v_LineWr, STRING'("       ....."));
                             byte_cnt := 1;
                           END IF;
                           write (v_LineWr, STRING'(" 0x"));
                           HexWrite (v_LineWr, usb_byte);
                         ELSIF se0 THEN
                           PrintLine(v_LineWr);
                           IF bit_cntr <= 1 THEN
                             usb_state <= idle;
                           ELSE
                             usb_state <= err;
                           END IF;
                         END IF;
          WHEN eop    => IF se0 THEN
                           usb_state <= idle;
                         ELSIF stuffing_det = '0' THEN
                           usb_state <= err;
                         END IF;
          WHEN OTHERS => PrintLine(v_LineWr); -- CASE err
                         ASSERT FALSE REPORT "FS monitor: protocol error" SEVERITY ERROR;
                         usb_state <= idle;
        END CASE;
      END IF;
    END IF;
  END PROCESS;
 
  usb_busy <= NOT(usb_state = idle OR usb_state = eop); -- global signal, defiened and used in usb_commands --
 
END SIM;
 
--======================================== END OF usb_fs_monitor.vhd =======================================--

Line No.	Rev	Author	Line
1	2	M_artin	`--==========================================================================================================--`
2			`-- --`
3			`-- Copyright (C) 2011 by Martin Neumann martin@neumanns-mail.de --`
4			`-- --`
5			`-- This source file may be used and distributed without restriction provided that this copyright statement --`
6			`-- is not removed from the file and that any derivative work contains the original copyright notice and --`
7			`-- the associated disclaimer. --`
8			`-- --`
9			`-- This software is provided ''as is'' and without any express or implied warranties, including, but not --`
10	4	M_artin	`-- limited to, the implied warranties of merchantability and fitness for a particular purpose. In no event --`
11	2	M_artin	`-- shall the author or contributors be liable for any direct, indirect, incidental, special, exemplary, or --`
12			`-- consequential damages (including, but not limited to, procurement of substitute goods or services; loss --`
13			`-- of use, data, or profits; or business interruption) however caused and on any theory of liability, --`
14			`-- whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way --`
15			`-- out of the use of this software, even if advised of the possibility of such damage. --`
16			`-- --`
17			`--==========================================================================================================--`
18			`-- --`
19			`-- File name : usb_fs_monitor.vhd --`
20			`-- Author : Martin Neumann martin@neumanns-mail.de --`
21			`-- Description : USB bus monitor, logs all USB activities in result.out file. --`
22			`-- --`
23			`--==========================================================================================================--`
24			`-- --`
25			`-- Change history --`
26			`-- --`
27			`-- Version / date Description --`
28			`-- --`
29			`-- 01 05 Mar 2011 MN Initial version --`
30	4	M_artin	`-- 02 01 Nov 2011 MN clk_60MHz now internally generated; next_state corrected --`
31			`-- 03 30 Jan 2012 MN fixed problems at transfer end, modified for protocol checking --`
32	2	M_artin	`-- --`
33			`-- End change history --`
34			`--==========================================================================================================--`
35
36	4	M_artin	`LIBRARY work, IEEE;`
37			`USE work.usb_commands.ALL;`
38	2	M_artin	`USE IEEE.std_logic_1164.all;`
39			`USE IEEE.std_logic_textio.all;`
40			`USE std.textio.all;`
41
42			`ENTITY usb_fs_monitor IS PORT(`
43			`master_oe : IN STD_LOGIC;`
44			`usb_Dp : IN STD_LOGIC;`
45			`usb_Dn : IN STD_LOGIC);`
46			`END usb_fs_monitor;`
47
48			`ARCHITECTURE SIM OF usb_fs_monitor IS`
49	4	M_artin	`TYPE state_mode IS(idle, pid, token1, token2, frame1, frame2, data, eop, err);`
50			`SIGNAL clk_en : STD_LOGIC;`
51			`SIGNAL clk_60MHz : STD_LOGIC;`
52	2	M_artin	`SIGNAL usb_state : state_mode;`
53	4	M_artin	`SIGNAL byte_valid : STD_LOGIC;`
54	2	M_artin	`SIGNAL usb_dp_sync : STD_LOGIC;`
55			`SIGNAL usb_dn_sync : STD_LOGIC;`
56	4	M_artin	`SIGNAL usb_bit : STD_LOGIC;`
57	2	M_artin	`SIGNAL usb_byte : STD_LOGIC_VECTOR(7 DOWNTO 0);`
58			`SIGNAL bit_cntr : NATURAL;`
59			`SIGNAL dll_cntr : NATURAL;`
60	4	M_artin	`SIGNAL stuffing_det : STD_LOGIC;`
61	2	M_artin	`SIGNAL edge_detect : STD_LOGIC;`
62			`SIGNAL usb_dp_s0 : STD_LOGIC;`
63			`SIGNAL usb_dp_s1 : STD_LOGIC;`
64			`SIGNAL usb_dn_s0 : STD_LOGIC;`
65			`SIGNAL usb_dn_s1 : STD_LOGIC;`
66			`SIGNAL usb_dp_last : STD_LOGIC;`
67	4	M_artin	`SIGNAL se0 : BOOLEAN;`
68	2	M_artin
69			`BEGIN`
70
71			`--==========================================================================================================--`
72			`-- Synchronize Inputs --`
73			`--==========================================================================================================--`
74
75	4	M_artin	`p_clk_60MHz : PROCESS`
76			`BEGIN`
77			`clk_60MHz <= '0';`
78			`While true loop`
79			`clk_60MHz <= '0';`
80			`WAIT FOR 8333 ps;`
81			`clk_60MHz <= '1';`
82			`WAIT FOR 8334 ps; -- 60 MHz`
83			`end loop;`
84			`END PROCESS;`
85
86	2	M_artin	`p_usb_dp_sync: process (clk_60MHz)`
87			`begin`
88			`if rising_edge(clk_60MHz) then`
89			`usb_dp_s0 <= usb_dp;`
90			`usb_dp_s1 <= usb_dp_s0;`
91			`if (usb_dp_s0 and usb_dp_s1) ='1' then`
92			`usb_dp_sync <= '1';`
93			`elsif (usb_dp_s0 OR usb_dp_s1) ='0' then`
94			`usb_dp_sync <= '0';`
95			`end if;`
96			`end if;`
97			`end process;`
98
99			`p_usb_dn_sync: process (clk_60MHz)`
100			`begin`
101			`if rising_edge(clk_60MHz) then`
102			`usb_dn_s0 <= usb_Dn;`
103			`usb_dn_s1 <= usb_dn_s0;`
104			`if (usb_dn_s0 and usb_dn_s1) ='1' then`
105			`usb_dn_sync <= '1';`
106			`elsif (usb_dn_s0 OR usb_dn_s1) ='0' then`
107			`usb_dn_sync <= '0';`
108			`end if;`
109			`end if;`
110			`end process;`
111
112	4	M_artin	`usb_bit <= usb_dp_sync AND NOT usb_dn_sync;`
113
114	2	M_artin	`p_usb_d_last: process (clk_60MHz)`
115			`begin`
116			`if rising_edge(clk_60MHz) THEN`
117			`usb_dp_last <= usb_dp_sync;`
118			`end if;`
119			`end process;`
120
121			`edge_detect <= usb_dp_last XOR usb_dp_sync;`
122
123	4	M_artin	`p_dll_cntr: PROCESS (clk_60MHz)`
124			`BEGIN`
125			`IF rising_edge(clk_60MHz) THEN`
126			`IF edge_detect ='1' THEN`
127			`IF dll_cntr >= 8 THEN`
128			`dll_cntr <= 2; -- clk_en to be centered in next count sequence`
129			`ELSE`
130			`dll_cntr <= 7; -- clk_en is now centered`
131			`END IF;`
132			`ELSIF dll_cntr >= 8 THEN -- normal count sequence is 8->4->5->6->7->8->4...`
133	2	M_artin	`dll_cntr <= 4;`
134	4	M_artin	`ELSE`
135	2	M_artin	`dll_cntr <= dll_cntr +1;`
136	4	M_artin	`END IF;`
137			`END IF;`
138			`END PROCESS;`
139	2	M_artin
140			`clk_en <= '1' WHEN dll_cntr >= 8 ELSE '0';`
141
142			`--==========================================================================================================--`
143			`-- Analyse USB Inputs --`
144			`--==========================================================================================================--`
145
146	4	M_artin	`--se0 <= usb_Dp_sync='0' AND usb_Dn_sync='0';`
147	2	M_artin
148	4	M_artin	`p_se0 : PROCESS(clk_60MHz)`
149	2	M_artin	`BEGIN`
150	4	M_artin	`IF rising_edge(clk_60MHz) THEN`
151			`IF clk_en ='1' THEN`
152			`se0 <= usb_Dp_sync='0' AND usb_Dn_sync='0';`
153			`END IF;`
154	2	M_artin	`END IF;`
155			`END PROCESS;`
156
157	4	M_artin	`p_reset_det : PROCESS(clk_60MHz)`
158	2	M_artin	`VARIABLE se0_lev : BOOLEAN;`
159			`VARIABLE se0_time : Time := 0 ns;`
160			`VARIABLE v_LineWr : line := NULL;`
161			`BEGIN`
162	4	M_artin	`IF rising_edge(clk_60MHz) THEN`
163			`IF clk_en ='1' THEN`
164			`IF se0 THEN`
165			`IF NOT se0_lev THEN`
166			`se0_lev := TRUE;`
167			`se0_time := now;`
168	2	M_artin	`END IF;`
169	4	M_artin	`ELSE`
170			`IF se0_lev THEN`
171			`se0_time := now - se0_time;`
172			`IF se0_time >= 200 ns THEN`
173			`write (v_LineWr, now, right,15);`
174			`IF se0_time >= 2500 ns THEN`
175			`write (v_LineWr, STRING'(" USB Reset detected for "));`
176			`ELSE`
177			`write (v_LineWr, STRING'(" USB lines at SE0 for "));`
178			`END IF;`
179			`write (v_LineWr, se0_time, right,15);`
180			`PrintLine(v_LineWr);`
181			`END IF;`
182			`END IF;`
183			`se0_lev := FALSE;`
184	2	M_artin	`END IF;`
185			`END IF;`
186			`END IF;`
187			`END PROCESS;`
188
189	4	M_artin	`p_usb_byte : PROCESS(usb_state, clk_60MHz)`
190	2	M_artin	`VARIABLE hold, usb_last : STD_LOGIC;`
191			`VARIABLE ones_cnt : NATURAL;`
192			`BEGIN`
193	4	M_artin	`IF rising_edge(clk_60MHz) THEN`
194			`IF usb_state = idle OR usb_state = eop THEN`
195			`usb_last := usb_bit;`
196			`bit_cntr <= 0;`
197			`ones_cnt := 0;`
198			`byte_valid <= '0';`
199			`usb_byte <= (OTHERS => 'H');`
200			`ELSIF clk_en ='1' THEN`
201			`IF usb_bit = usb_last THEN`
202			`usb_byte <= '1' & usb_byte(7 DOWNTO 1);`
203	2	M_artin	`bit_cntr <= (bit_cntr +1) MOD 8;`
204	4	M_artin	`ones_cnt := (ones_cnt +1);`
205			`IF ones_cnt > 6 THEN`
206			`ASSERT FALSE REPORT"Stuffing error" SEVERITY ERROR;`
207			`END IF;`
208	2	M_artin	`hold := '0';`
209			`ELSE`
210	4	M_artin	`IF ones_cnt /= 6 THEN`
211			`usb_byte <= '0' & usb_byte(7 DOWNTO 1);`
212			`bit_cntr <= (bit_cntr +1) MOD 8;`
213			`hold := '0';`
214			`ELSE`
215			`hold := '1';`
216			`END IF;`
217			`ones_cnt := 0;`
218	2	M_artin	`END IF;`
219	4	M_artin	`IF bit_cntr=7 THEN`
220			`byte_valid <= NOT hold;`
221			`ELSE`
222			`byte_valid <= '0';`
223			`END IF;`
224			`usb_last := usb_bit;`
225	2	M_artin	`END IF;`
226	4	M_artin	`stuffing_det <= hold;`
227	2	M_artin	`END IF;`
228			`END PROCESS;`
229
230	4	M_artin	`p_usb_state : PROCESS(clk_60MHz)`
231	2	M_artin	`VARIABLE address : STD_LOGIC_VECTOR(6 DOWNTO 0);`
232			`VARIABLE endpoint : STD_LOGIC_VECTOR(3 DOWNTO 0);`
233			`VARIABLE frame_no : STD_LOGIC_VECTOR(10 DOWNTO 0);`
234			`VARIABLE byte_cnt : NATURAL;`
235	4	M_artin	`VARIABLE sync_pattern : STD_LOGIC_VECTOR(7 DOWNTO 0);`
236	2	M_artin	`VARIABLE v_LineWr : line := NULL;`
237			`BEGIN`
238	4	M_artin	`IF rising_edge(clk_60MHz) THEN`
239			`IF clk_en ='1' THEN`
240			`IF se0 THEN`
241			`sync_pattern := (OTHERS => '0');`
242			`ELSE`
243			`sync_pattern := sync_pattern(6 DOWNTO 0) & usb_bit;`
244			`END IF;`
245			`CASE usb_state IS`
246			`WHEN idle => IF sync_pattern = "01010100" THEN`
247			`usb_state <= pid;`
248			`ELSE`
249			`usb_state <= idle;`
250			`END IF;`
251			`WHEN pid => IF byte_valid ='1' THEN`
252			`IF usb_byte(3 DOWNTO 0) /= NOT usb_byte(7 DOWNTO 4) THEN --+------+------+-------------+`
253			`ASSERT FALSE REPORT"PID error" SEVERITY ERROR; --\| PID \| usb- \| String \|`
254			`END IF; --\|Bit3:0\|state \| \|`
255			`write (v_LineWr, now, right,15); --\|------\|------\|-------------\|`
256			`IF master_oe ='1' THEN --\| x"1" \| token\| "OUT-Token" \|`
257			`write (v_LineWr, STRING'(" Send ")); --\| x"2" \| idle \| "ACK" \|`
258			`ELSE --\| x"3" \| data \| "Data0" \|`
259			`write (v_LineWr, STRING'(" Recv ")); --\| x"4" \| N/A \| "Ping" \|`
260			`END IF; --\| x"5" \| frame\| "SOF-Token" \|`
261			`byte_cnt := 0; --\| x"6" \| idle \| "NYET" \|`
262			`ASSERT usb_byte(3 DOWNTO 0) = NOT usb_byte(7 DOWNTO 4) --\| x"7" \| data \| "Data2" \|`
263			`REPORT"PID error detected" SEVERITY ERROR; --\| x"8" \| N/A \| "Split" \|`
264			`CASE usb_byte(3 DOWNTO 0) IS --\| x"9" \| token\| "IN-Token" \|`
265			`WHEN x"1" => write (v_LineWr, STRING'("OUT-Token")); --\| x"A" \| idle \| "NAK" \|`
266			`WHEN x"9" => write (v_LineWr, STRING'("IN-Token")); --\| x"B" \| data \| "Data1" \|`
267			`WHEN x"5" => write (v_LineWr, STRING'("SOF-Token")); --\| x"C" \| N/A \| "Preamble" \|`
268			`WHEN x"D" => write (v_LineWr, STRING'("Setup")); --\| x"D" \| token\| "Setup" \|`
269			`WHEN x"3" => write (v_LineWr, STRING'("Data0")); --\| x"E" \| idle \| "STALL" \|`
270			`WHEN x"B" => write (v_LineWr, STRING'("Data1")); --\| x"F" \| data \| "MData" \|`
271			`WHEN x"7" => write (v_LineWr, STRING'("Data2")); --\| x"0" \| idle \| "Error" \|`
272			`WHEN x"F" => write (v_LineWr, STRING'("MData")); --+------+------+-------------+`
273			`WHEN x"2" => write (v_LineWr, STRING'("ACK"));`
274			`WHEN x"A" => write (v_LineWr, STRING'("NAK"));`
275			`WHEN x"E" => write (v_LineWr, STRING'("STALL"));`
276			`WHEN x"6" => write (v_LineWr, STRING'("NYET"));`
277			`WHEN x"C" => write (v_LineWr, STRING'("Preamble"));`
278			`-- WHEN x"C" => write (v_LineWr, STRING'("SPLIT-ERR"));`
279			`WHEN x"8" => write (v_LineWr, STRING'("Split"));`
280			`WHEN x"4" => write (v_LineWr, STRING'("Ping"));`
281			`WHEN OTHERS => ASSERT FALSE REPORT"PID is zero" SEVERITY ERROR;`
282			`END CASE;`
283			`CASE usb_byte(3 DOWNTO 0) IS`
284			`WHEN x"1" \| x"9" \| x"D" => usb_state <= token1;`
285			`WHEN x"5" => usb_state <= frame1;`
286			`WHEN x"3" \| x"B" \| x"7" \| x"F" => usb_state <= data;`
287			`WHEN x"2" \| x"A" \| x"E" \| x"6" => usb_state <= eop;`
288			`PrintLine(v_LineWr); -- print as soon as possible`
289			`WHEN others => usb_state <= idle;`
290			`ASSERT FALSE REPORT "FS-Monitor: This PID is not impemented" SEVERITY WARNING;`
291			`END CASE;`
292			`END IF;`
293			`IF se0 THEN`
294			`usb_state <= err;`
295			`END IF;`
296			`WHEN token1 => IF byte_valid ='1' THEN`
297			`address := usb_byte(6 DOWNTO 0);`
298			`endpoint(0) := usb_byte(7);`
299			`usb_state <= token2;`
300			`END IF;`
301			`IF se0 THEN`
302			`usb_state <= err;`
303			`END IF;`
304			`WHEN token2 => IF byte_valid ='1' THEN`
305			`endpoint(3 DOWNTO 1) := usb_byte(2 DOWNTO 0);`
306			`write (v_LineWr, STRING'(": Address 0x"));`
307			`HexWrite (v_LineWr, address);`
308			`write (v_LineWr, STRING'(", Endpoint 0x"));`
309			`HexWrite (v_LineWr, endpoint);`
310			`write (v_LineWr, STRING'(", CRC5 0x"));`
311			`HexWrite (v_LineWr, usb_byte(7 DOWNTO 3));`
312			`usb_state <= eop;`
313			`PrintLine(v_LineWr);`
314			`END IF;`
315			`WHEN frame1 => IF byte_valid ='1' THEN`
316			`frame_no(7 DOWNTO 0) := usb_byte;`
317			`usb_state <= frame2;`
318			`END IF;`
319			`IF se0 THEN`
320			`usb_state <= err;`
321			`END IF;`
322			`WHEN frame2 => IF byte_valid ='1' THEN`
323			`frame_no(10 DOWNTO 8) := usb_byte(2 DOWNTO 0);`
324			`write (v_LineWr, STRING'(": Frame No 0x"));`
325			`HexWrite (v_LineWr, frame_no);`
326			`write (v_LineWr, STRING'(", CRC5 0x"));`
327			`HexWrite (v_LineWr, usb_byte(7 DOWNTO 3));`
328			`usb_state <= err;`
329			`usb_state <= eop;`
330			`PrintLine(v_LineWr);`
331			`END IF;`
332			`WHEN data => IF byte_valid ='1' THEN`
333			`byte_cnt := byte_cnt +1;`
334			`IF byte_cnt = 17 THEN`
335			`PrintLine(v_LineWr);`
336			`write (v_LineWr, now, right,15);`
337			`write (v_LineWr, STRING'(" ....."));`
338			`byte_cnt := 1;`
339			`END IF;`
340			`write (v_LineWr, STRING'(" 0x"));`
341			`HexWrite (v_LineWr, usb_byte);`
342			`ELSIF se0 THEN`
343			`PrintLine(v_LineWr);`
344			`IF bit_cntr <= 1 THEN`
345			`usb_state <= idle;`
346			`ELSE`
347			`usb_state <= err;`
348			`END IF;`
349			`END IF;`
350			`WHEN eop => IF se0 THEN`
351			`usb_state <= idle;`
352			`ELSIF stuffing_det = '0' THEN`
353			`usb_state <= err;`
354			`END IF;`
355			`WHEN OTHERS => PrintLine(v_LineWr); -- CASE err`
356			`ASSERT FALSE REPORT "FS monitor: protocol error" SEVERITY ERROR;`
357			`usb_state <= idle;`
358			`END CASE;`
359			`END IF;`
360			`END IF;`
361	2	M_artin	`END PROCESS;`
362
363	4	M_artin	`usb_busy <= NOT(usb_state = idle OR usb_state = eop); -- global signal, defiened and used in usb_commands --`
364	2	M_artin
365			`END SIM;`
366
367			`--======================================== END OF usb_fs_monitor.vhd =======================================--`

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