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/////////////////////////////////////////////////////////////////////
////                                                             ////
////  Test Bench Library                                         ////
////                                                             ////
////                                                             ////
////  Author: Rudolf Usselmann                                   ////
////          rudi@asics.ws                                      ////
////                                                             ////
////                                                             ////
////  Downloaded from: http://www.opencores.org/cores/usb1_funct/////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2000-2002 Rudolf Usselmann                    ////
////                         www.asics.ws                        ////
////                         rudi@asics.ws                       ////
////                                                             ////
//// This source file may be used and distributed without        ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
////                                                             ////
////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
//// POSSIBILITY OF SUCH DAMAGE.                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
 
//  CVS Log
//
//  $Id: tests_lib.v,v 1.1 2002-09-25 06:10:10 rudi Exp $
//
//  $Date: 2002-09-25 06:10:10 $
//  $Revision: 1.1 $
//  $Author: rudi $
//  $Locker:  $
//  $State: Exp $
//
// Change History:
//               $Log: not supported by cvs2svn $
//
//
//
//
//
//
 
 
task show_errors;
 
begin
 
$display("\n");
$display("     +--------------------+");
$display("     |  Total ERRORS: %0d   |", error_cnt);
$display("     +--------------------+");
 
end
endtask
 
task recv_packet;
output  [3:0]    pid;
output          size;
 
integer         del, size,n;
reg     [15:0]   crc16r;
reg     [7:0]    x,y;
 
begin
crc16r = 16'hffff;
utmi_recv_pack(size);
for(n=1;n<size-2;n=n+1)
   begin
        y = txmem[n];
        x[7] = y[0];
        x[6] = y[1];
        x[5] = y[2];
        x[4] = y[3];
        x[3] = y[4];
        x[2] = y[5];
        x[1] = y[6];
        x[0] = y[7];
        crc16r = crc16(crc16r, x);
   end
 
y = crc16r[15:8];
x[7] = y[0];
x[6] = y[1];
x[5] = y[2];
x[4] = y[3];
x[3] = y[4];
x[2] = y[5];
x[1] = y[6];
x[0] = y[7];
crc16r[15:8] = ~x;
 
y = crc16r[7:0];
x[7] = y[0];
x[6] = y[1];
x[5] = y[2];
x[4] = y[3];
x[3] = y[4];
x[2] = y[5];
x[1] = y[6];
x[0] = y[7];
crc16r[7:0] = ~x;
 
if(crc16r !== {txmem[n], txmem[n+1]})
$display("ERROR: CRC Mismatch: Expected: %h, Got: %h%h (%t)",
                crc16r, txmem[n], txmem[n+1], $time);
 
for(n=0;n<size-3;n=n+1)
        buffer1[buffer1_last+n] = txmem[n+1];
buffer1_last = buffer1_last+n;
 
// Check PID
x = txmem[0];
 
if(x[7:4] !== ~x[3:0])
$display("ERROR: Pid Checksum mismatch: Top: %h Bottom: %h (%t)",
                x[7:4], x[3:0], $time);
pid = x[3:0];
size=size-3;
end
endtask
 
 
 
task send_token;
input   [6:0]    fa;
input   [3:0]    ep;
input   [3:0]    pid;
 
reg     [15:0]   tmp_data;
reg     [10:0]   x,y;
integer         len;
 
begin
 
tmp_data = {fa, ep, 5'h0};
if(pid == `USBF_T_PID_ACK)      len = 1;
else                            len = 3;
 
y = {fa, ep};
x[10] = y[4];
x[9] = y[5];
x[8] = y[6];
x[7] = y[7];
x[6] = y[8];
x[5] = y[9];
x[4] = y[10];
x[3] = y[0];
x[2] = y[1];
x[1] = y[2];
x[0] = y[3];
 
y[4:0]  = crc5( 5'h1f, x );
tmp_data[4:0]  = ~y[4:0];
tmp_data[15:5] = x;
txmem[0] = {~pid, pid};  // PID
txmem[1] = {    tmp_data[8],tmp_data[9],tmp_data[10],tmp_data[11],
                tmp_data[12],tmp_data[13],tmp_data[14],tmp_data[15]};
txmem[2] = {    tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],
                tmp_data[4],tmp_data[5],tmp_data[6],tmp_data[7]};
utmi_send_pack(len);
end
endtask
 
 
task send_sof;
input   [10:0]   frmn;
 
reg     [15:0]   tmp_data;
reg     [10:0]   x,y;
begin
 
y = frmn;
x[10] = y[0];
x[9] = y[1];
x[8] = y[2];
x[7] = y[3];
x[6] = y[4];
x[5] = y[5];
x[4] = y[6];
x[3] = y[7];
x[2] = y[8];
x[1] = y[9];
x[0] = y[10];
 
tmp_data[15:5] = x;
y[4:0]  = crc5( 5'h1f, x );
tmp_data[4:0]  = ~y[4:0];
txmem[0] = {~`USBF_T_PID_SOF, `USBF_T_PID_SOF};  // PID
txmem[1] = {    tmp_data[8],tmp_data[9],tmp_data[10],tmp_data[11],
                tmp_data[12],tmp_data[13],tmp_data[14],tmp_data[15]};
txmem[2] = {    tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],
                tmp_data[4],tmp_data[5],tmp_data[6],tmp_data[7]};
txmem[1] =      frmn[7:0];
txmem[2] = {    tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],
                tmp_data[4], frmn[10:8] };
utmi_send_pack(3);
end
endtask
 
 
function [4:0] crc5;
input   [4:0]    crc_in;
input   [10:0]   din;
reg     [4:0]    crc_out;
 
begin
 
crc5[0] =        din[10] ^ din[9] ^ din[6] ^ din[5] ^ din[3] ^
                din[0] ^ crc_in[0] ^ crc_in[3] ^ crc_in[4];
crc5[1] =       din[10] ^ din[7] ^ din[6] ^ din[4] ^ din[1] ^
                crc_in[0] ^ crc_in[1] ^ crc_in[4];
crc5[2] =       din[10] ^ din[9] ^ din[8] ^ din[7] ^ din[6] ^
                din[3] ^ din[2] ^ din[0] ^ crc_in[0] ^ crc_in[1] ^
                crc_in[2] ^ crc_in[3] ^ crc_in[4];
crc5[3] =       din[10] ^ din[9] ^ din[8] ^ din[7] ^ din[4] ^ din[3] ^
                din[1] ^ crc_in[1] ^ crc_in[2] ^ crc_in[3] ^ crc_in[4];
crc5[4] =       din[10] ^ din[9] ^ din[8] ^ din[5] ^ din[4] ^ din[2] ^
                crc_in[2] ^ crc_in[3] ^ crc_in[4];
end
endfunction
 
 
task send_data;
input   [3:0]    pid;
input           len;
input           mode;
integer         n, len, mode, delay;
reg     [15:0]   crc16r;
reg     [7:0]    x,y;
 
begin
txmem[0] = {~pid, pid};  // PID
crc16r = 16'hffff;
for(n=0;n<len;n=n+1)
   begin
        if(mode==1)     y = buffer1[buffer1_last+n];
        else            y = n;
        x[7] = y[0];
        x[6] = y[1];
        x[5] = y[2];
        x[4] = y[3];
        x[3] = y[4];
        x[2] = y[5];
        x[1] = y[6];
        x[0] = y[7];
        txmem[n+1] = y;
        crc16r = crc16(crc16r, x);
   end
 
buffer1_last = buffer1_last + n;
y = crc16r[15:8];
x[7] = y[0];
x[6] = y[1];
x[5] = y[2];
x[4] = y[3];
x[3] = y[4];
x[2] = y[5];
x[1] = y[6];
x[0] = y[7];
txmem[n+1] = ~x;
 
y = crc16r[7:0];
x[7] = y[0];
x[6] = y[1];
x[5] = y[2];
x[4] = y[3];
x[3] = y[4];
x[2] = y[5];
x[1] = y[6];
x[0] = y[7];
txmem[n+2] = ~x;
utmi_send_pack(len+3);
end
endtask
 
 
function [15:0] crc16;
input   [15:0]   crc_in;
input   [7:0]    din;
reg     [15:0]   crc_out;
 
begin
crc_out[0] =     din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^
                din[2] ^ din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9] ^
                crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^
                crc_in[14] ^ crc_in[15];
crc_out[1] =    din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^
                din[1] ^ crc_in[9] ^ crc_in[10] ^ crc_in[11] ^
                crc_in[12] ^ crc_in[13] ^ crc_in[14] ^ crc_in[15];
crc_out[2] =    din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9];
crc_out[3] =    din[2] ^ din[1] ^ crc_in[9] ^ crc_in[10];
crc_out[4] =    din[3] ^ din[2] ^ crc_in[10] ^ crc_in[11];
crc_out[5] =    din[4] ^ din[3] ^ crc_in[11] ^ crc_in[12];
crc_out[6] =    din[5] ^ din[4] ^ crc_in[12] ^ crc_in[13];
crc_out[7] =    din[6] ^ din[5] ^ crc_in[13] ^ crc_in[14];
crc_out[8] =    din[7] ^ din[6] ^ crc_in[0] ^ crc_in[14] ^ crc_in[15];
crc_out[9] =    din[7] ^ crc_in[1] ^ crc_in[15];
crc_out[10] =   crc_in[2];
crc_out[11] =   crc_in[3];
crc_out[12] =   crc_in[4];
crc_out[13] =   crc_in[5];
crc_out[14] =   crc_in[6];
crc_out[15] =   din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^
                din[1] ^ din[0] ^ crc_in[7] ^ crc_in[8] ^ crc_in[9] ^
                crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^
                crc_in[14] ^ crc_in[15];
crc16 = crc_out;
end
endfunction
 
///////////////////////////////////////////////////////////////////
//
// UTMI Low level Tasks
//
 
task utmi_send_pack;
input   size;
integer n,size;
 
begin
@(posedge clk);
#1;
tb_tx_valid = 1'b1;
for(n=0;n<size;n=n+1)
   begin
        tb_txdata = txmem[n];
        @(posedge clk);
        #2;
        while(!tb_tx_ready)     @(posedge clk);
        #1;
   end
tb_tx_valid = 1'b0;
@(posedge clk);
end
endtask
 
task utmi_recv_pack;
output  size;
integer size;
 
begin
size = 0;
while(!tb_rx_active)    @(posedge clk);
while(tb_rx_active)
   begin
        #1;
        while(!tb_rx_valid & tb_rx_active)      @(posedge clk);
 
        if(tb_rx_valid & tb_rx_active)
           begin
                txmem[size] = tb_rxdata;
                size = size + 1;
           end
        @(posedge clk);
   end
end
endtask
 

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Subversion Repositories usb1_funct

[/] [usb1_funct/] [trunk/] [bench/] [verilog/] [tests_lib.v] - Blame information for rev 10

Line No.	Rev	Author	Line
1	6	rudi	`/////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// Test Bench Library ////`
4			`//// ////`
5			`//// ////`
6			`//// Author: Rudolf Usselmann ////`
7			`//// rudi@asics.ws ////`
8			`//// ////`
9			`//// ////`
10			`//// Downloaded from: http://www.opencores.org/cores/usb1_funct/////`
11			`//// ////`
12			`/////////////////////////////////////////////////////////////////////`
13			`//// ////`
14			`//// Copyright (C) 2000-2002 Rudolf Usselmann ////`
15			`//// www.asics.ws ////`
16			`//// rudi@asics.ws ////`
17			`//// ////`
18			`//// This source file may be used and distributed without ////`
19			`//// restriction provided that this copyright statement is not ////`
20			`//// removed from the file and that any derivative work contains ////`
21			`//// the original copyright notice and the associated disclaimer.////`
22			`//// ////`
23			//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
24			`//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////`
25			`//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////`
26			`//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////`
27			`//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////`
28			`//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////`
29			`//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////`
30			`//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////`
31			`//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////`
32			`//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////`
33			`//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////`
34			`//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////`
35			`//// POSSIBILITY OF SUCH DAMAGE. ////`
36			`//// ////`
37			`/////////////////////////////////////////////////////////////////////`
38
39			`// CVS Log`
40			`//`
41			`// $Id: tests_lib.v,v 1.1 2002-09-25 06:10:10 rudi Exp $`
42			`//`
43			`// $Date: 2002-09-25 06:10:10 $`
44			`// $Revision: 1.1 $`
45			`// $Author: rudi $`
46			`// $Locker: $`
47			`// $State: Exp $`
48			`//`
49			`// Change History:`
50			`// $Log: not supported by cvs2svn $`
51			`//`
52			`//`
53			`//`
54			`//`
55			`//`
56			`//`
57
58
59			`task show_errors;`
60
61			`begin`
62
63			`$display("\n");`
64			`$display(" +--------------------+");`
65			`$display(" \| Total ERRORS: %0d \|", error_cnt);`
66			`$display(" +--------------------+");`
67
68			`end`
69			`endtask`
70
71			`task recv_packet;`
72			`output [3:0] pid;`
73			`output size;`
74
75			`integer del, size,n;`
76			`reg [15:0] crc16r;`
77			`reg [7:0] x,y;`
78
79			`begin`
80			`crc16r = 16'hffff;`
81			`utmi_recv_pack(size);`
82			`for(n=1;n<size-2;n=n+1)`
83			`begin`
84			`y = txmem[n];`
85			`x[7] = y[0];`
86			`x[6] = y[1];`
87			`x[5] = y[2];`
88			`x[4] = y[3];`
89			`x[3] = y[4];`
90			`x[2] = y[5];`
91			`x[1] = y[6];`
92			`x[0] = y[7];`
93			`crc16r = crc16(crc16r, x);`
94			`end`
95
96			`y = crc16r[15:8];`
97			`x[7] = y[0];`
98			`x[6] = y[1];`
99			`x[5] = y[2];`
100			`x[4] = y[3];`
101			`x[3] = y[4];`
102			`x[2] = y[5];`
103			`x[1] = y[6];`
104			`x[0] = y[7];`
105			`crc16r[15:8] = ~x;`
106
107			`y = crc16r[7:0];`
108			`x[7] = y[0];`
109			`x[6] = y[1];`
110			`x[5] = y[2];`
111			`x[4] = y[3];`
112			`x[3] = y[4];`
113			`x[2] = y[5];`
114			`x[1] = y[6];`
115			`x[0] = y[7];`
116			`crc16r[7:0] = ~x;`
117
118			`if(crc16r !== {txmem[n], txmem[n+1]})`
119			`$display("ERROR: CRC Mismatch: Expected: %h, Got: %h%h (%t)",`
120			`crc16r, txmem[n], txmem[n+1], $time);`
121
122			`for(n=0;n<size-3;n=n+1)`
123			`buffer1[buffer1_last+n] = txmem[n+1];`
124			`buffer1_last = buffer1_last+n;`
125
126			`// Check PID`
127			`x = txmem[0];`
128
129			`if(x[7:4] !== ~x[3:0])`
130			`$display("ERROR: Pid Checksum mismatch: Top: %h Bottom: %h (%t)",`
131			`x[7:4], x[3:0], $time);`
132			`pid = x[3:0];`
133			`size=size-3;`
134			`end`
135			`endtask`
136
137
138
139			`task send_token;`
140			`input [6:0] fa;`
141			`input [3:0] ep;`
142			`input [3:0] pid;`
143
144			`reg [15:0] tmp_data;`
145			`reg [10:0] x,y;`
146			`integer len;`
147
148			`begin`
149
150			`tmp_data = {fa, ep, 5'h0};`
151			if(pid == `USBF_T_PID_ACK) len = 1;
152			`else len = 3;`
153
154			`y = {fa, ep};`
155			`x[10] = y[4];`
156			`x[9] = y[5];`
157			`x[8] = y[6];`
158			`x[7] = y[7];`
159			`x[6] = y[8];`
160			`x[5] = y[9];`
161			`x[4] = y[10];`
162			`x[3] = y[0];`
163			`x[2] = y[1];`
164			`x[1] = y[2];`
165			`x[0] = y[3];`
166
167			`y[4:0] = crc5( 5'h1f, x );`
168			`tmp_data[4:0] = ~y[4:0];`
169			`tmp_data[15:5] = x;`
170			`txmem[0] = {~pid, pid}; // PID`
171			`txmem[1] = { tmp_data[8],tmp_data[9],tmp_data[10],tmp_data[11],`
172			`tmp_data[12],tmp_data[13],tmp_data[14],tmp_data[15]};`
173			`txmem[2] = { tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],`
174			`tmp_data[4],tmp_data[5],tmp_data[6],tmp_data[7]};`
175			`utmi_send_pack(len);`
176			`end`
177			`endtask`
178
179
180			`task send_sof;`
181			`input [10:0] frmn;`
182
183			`reg [15:0] tmp_data;`
184			`reg [10:0] x,y;`
185			`begin`
186
187			`y = frmn;`
188			`x[10] = y[0];`
189			`x[9] = y[1];`
190			`x[8] = y[2];`
191			`x[7] = y[3];`
192			`x[6] = y[4];`
193			`x[5] = y[5];`
194			`x[4] = y[6];`
195			`x[3] = y[7];`
196			`x[2] = y[8];`
197			`x[1] = y[9];`
198			`x[0] = y[10];`
199
200			`tmp_data[15:5] = x;`
201			`y[4:0] = crc5( 5'h1f, x );`
202			`tmp_data[4:0] = ~y[4:0];`
203			txmem[0] = {~`USBF_T_PID_SOF, `USBF_T_PID_SOF}; // PID
204			`txmem[1] = { tmp_data[8],tmp_data[9],tmp_data[10],tmp_data[11],`
205			`tmp_data[12],tmp_data[13],tmp_data[14],tmp_data[15]};`
206			`txmem[2] = { tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],`
207			`tmp_data[4],tmp_data[5],tmp_data[6],tmp_data[7]};`
208			`txmem[1] = frmn[7:0];`
209			`txmem[2] = { tmp_data[0],tmp_data[1],tmp_data[2],tmp_data[3],`
210			`tmp_data[4], frmn[10:8] };`
211			`utmi_send_pack(3);`
212			`end`
213			`endtask`
214
215
216			`function [4:0] crc5;`
217			`input [4:0] crc_in;`
218			`input [10:0] din;`
219			`reg [4:0] crc_out;`
220
221			`begin`
222
223			`crc5[0] = din[10] ^ din[9] ^ din[6] ^ din[5] ^ din[3] ^`
224			`din[0] ^ crc_in[0] ^ crc_in[3] ^ crc_in[4];`
225			`crc5[1] = din[10] ^ din[7] ^ din[6] ^ din[4] ^ din[1] ^`
226			`crc_in[0] ^ crc_in[1] ^ crc_in[4];`
227			`crc5[2] = din[10] ^ din[9] ^ din[8] ^ din[7] ^ din[6] ^`
228			`din[3] ^ din[2] ^ din[0] ^ crc_in[0] ^ crc_in[1] ^`
229			`crc_in[2] ^ crc_in[3] ^ crc_in[4];`
230			`crc5[3] = din[10] ^ din[9] ^ din[8] ^ din[7] ^ din[4] ^ din[3] ^`
231			`din[1] ^ crc_in[1] ^ crc_in[2] ^ crc_in[3] ^ crc_in[4];`
232			`crc5[4] = din[10] ^ din[9] ^ din[8] ^ din[5] ^ din[4] ^ din[2] ^`
233			`crc_in[2] ^ crc_in[3] ^ crc_in[4];`
234			`end`
235			`endfunction`
236
237
238			`task send_data;`
239			`input [3:0] pid;`
240			`input len;`
241			`input mode;`
242			`integer n, len, mode, delay;`
243			`reg [15:0] crc16r;`
244			`reg [7:0] x,y;`
245
246			`begin`
247			`txmem[0] = {~pid, pid}; // PID`
248			`crc16r = 16'hffff;`
249			`for(n=0;n<len;n=n+1)`
250			`begin`
251			`if(mode==1) y = buffer1[buffer1_last+n];`
252			`else y = n;`
253			`x[7] = y[0];`
254			`x[6] = y[1];`
255			`x[5] = y[2];`
256			`x[4] = y[3];`
257			`x[3] = y[4];`
258			`x[2] = y[5];`
259			`x[1] = y[6];`
260			`x[0] = y[7];`
261			`txmem[n+1] = y;`
262			`crc16r = crc16(crc16r, x);`
263			`end`
264
265			`buffer1_last = buffer1_last + n;`
266			`y = crc16r[15:8];`
267			`x[7] = y[0];`
268			`x[6] = y[1];`
269			`x[5] = y[2];`
270			`x[4] = y[3];`
271			`x[3] = y[4];`
272			`x[2] = y[5];`
273			`x[1] = y[6];`
274			`x[0] = y[7];`
275			`txmem[n+1] = ~x;`
276
277			`y = crc16r[7:0];`
278			`x[7] = y[0];`
279			`x[6] = y[1];`
280			`x[5] = y[2];`
281			`x[4] = y[3];`
282			`x[3] = y[4];`
283			`x[2] = y[5];`
284			`x[1] = y[6];`
285			`x[0] = y[7];`
286			`txmem[n+2] = ~x;`
287			`utmi_send_pack(len+3);`
288			`end`
289			`endtask`
290
291
292			`function [15:0] crc16;`
293			`input [15:0] crc_in;`
294			`input [7:0] din;`
295			`reg [15:0] crc_out;`
296
297			`begin`
298			`crc_out[0] = din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^`
299			`din[2] ^ din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9] ^`
300			`crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^`
301			`crc_in[14] ^ crc_in[15];`
302			`crc_out[1] = din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^`
303			`din[1] ^ crc_in[9] ^ crc_in[10] ^ crc_in[11] ^`
304			`crc_in[12] ^ crc_in[13] ^ crc_in[14] ^ crc_in[15];`
305			`crc_out[2] = din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9];`
306			`crc_out[3] = din[2] ^ din[1] ^ crc_in[9] ^ crc_in[10];`
307			`crc_out[4] = din[3] ^ din[2] ^ crc_in[10] ^ crc_in[11];`
308			`crc_out[5] = din[4] ^ din[3] ^ crc_in[11] ^ crc_in[12];`
309			`crc_out[6] = din[5] ^ din[4] ^ crc_in[12] ^ crc_in[13];`
310			`crc_out[7] = din[6] ^ din[5] ^ crc_in[13] ^ crc_in[14];`
311			`crc_out[8] = din[7] ^ din[6] ^ crc_in[0] ^ crc_in[14] ^ crc_in[15];`
312			`crc_out[9] = din[7] ^ crc_in[1] ^ crc_in[15];`
313			`crc_out[10] = crc_in[2];`
314			`crc_out[11] = crc_in[3];`
315			`crc_out[12] = crc_in[4];`
316			`crc_out[13] = crc_in[5];`
317			`crc_out[14] = crc_in[6];`
318			`crc_out[15] = din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^`
319			`din[1] ^ din[0] ^ crc_in[7] ^ crc_in[8] ^ crc_in[9] ^`
320			`crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^`
321			`crc_in[14] ^ crc_in[15];`
322			`crc16 = crc_out;`
323			`end`
324			`endfunction`
325
326			`///////////////////////////////////////////////////////////////////`
327			`//`
328			`// UTMI Low level Tasks`
329			`//`
330
331			`task utmi_send_pack;`
332			`input size;`
333			`integer n,size;`
334
335			`begin`
336			`@(posedge clk);`
337			`#1;`
338			`tb_tx_valid = 1'b1;`
339			`for(n=0;n<size;n=n+1)`
340			`begin`
341			`tb_txdata = txmem[n];`
342			`@(posedge clk);`
343			`#2;`
344			`while(!tb_tx_ready) @(posedge clk);`
345			`#1;`
346			`end`
347			`tb_tx_valid = 1'b0;`
348			`@(posedge clk);`
349			`end`
350			`endtask`
351
352			`task utmi_recv_pack;`
353			`output size;`
354			`integer size;`
355
356			`begin`
357			`size = 0;`
358			`while(!tb_rx_active) @(posedge clk);`
359			`while(tb_rx_active)`
360			`begin`
361			`#1;`
362			`while(!tb_rx_valid & tb_rx_active) @(posedge clk);`
363
364			`if(tb_rx_valid & tb_rx_active)`
365			`begin`
366			`txmem[size] = tb_rxdata;`
367			`size = size + 1;`
368			`end`
369			`@(posedge clk);`
370			`end`
371			`end`
372			`endtask`
373