OpenCores
URL https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk

Subversion Repositories usb_fpga_1_11

[/] [usb_fpga_1_11/] [trunk/] [include/] [ezintavecs.h] - Blame information for rev 9

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 ZTEX
/*!
2 5 ZTEX
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 9 ZTEX
   Copyright (C) 2009-2014 ZTEX GmbH.
4 2 ZTEX
   http://www.ztex.de
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License version 3 as
8
   published by the Free Software Foundation.
9
 
10
   This program is distributed in the hope that it will be useful, but
11
   WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
   General Public License for more details.
14
 
15
   You should have received a copy of the GNU General Public License
16
   along with this program; if not, see http://www.gnu.org/licenses/.
17
!*/
18
 
19
/*
20
   EZ-USB Autovectors
21
*/
22
 
23
#ifndef[EZINTAVECS_H]
24
#define[EZINTAVECS_H]
25
 
26
#include[ztex-utils.h]
27
 
28
struct INTVEC {
29
    BYTE op;
30
    BYTE addrH;
31
    BYTE addrL;
32
};
33
 
34
#define[INTVECS;][DEFINE_INTVEC(0x0003,INT0VEC_IE0);
35
DEFINE_INTVEC(0x000b,INT1VEC_T0);
36
DEFINE_INTVEC(0x0013,INT2VEC_IE1);
37
DEFINE_INTVEC(0x001b,INT3VEC_T1);
38
DEFINE_INTVEC(0x0023,INT4VEC_USART0);
39
DEFINE_INTVEC(0x002b,INT5VEC_T2);
40
DEFINE_INTVEC(0x0033,INT6VEC_RESUME);
41
DEFINE_INTVEC(0x003b,INT7VEC_USART1);
42
DEFINE_INTVEC(0x0043,INT8VEC_USB);
43
DEFINE_INTVEC(0x004b,INT9VEC_I2C);
44
DEFINE_INTVEC(0x0053,INT10VEC_GPIF);
45
DEFINE_INTVEC(0x005b,INT11VEC_IE5);
46
DEFINE_INTVEC(0x0063,INT12VEC_IE6);
47
DEFINE_INTVEC(0x0100,INTVEC_SUDAV);
48
DEFINE_INTVEC(0x0104,INTVEC_SOF);
49
DEFINE_INTVEC(0x0108,INTVEC_SUTOK);
50
DEFINE_INTVEC(0x010C,INTVEC_SUSPEND);
51
DEFINE_INTVEC(0x0110,INTVEC_USBRESET);
52
DEFINE_INTVEC(0x0114,INTVEC_HISPEED);
53
DEFINE_INTVEC(0x0118,INTVEC_EP0ACK);
54
DEFINE_INTVEC(0x0120,INTVEC_EP0IN);
55
DEFINE_INTVEC(0x0124,INTVEC_EP0OUT);
56
DEFINE_INTVEC(0x0128,INTVEC_EP1IN);
57
DEFINE_INTVEC(0x012C,INTVEC_EP1OUT);
58
DEFINE_INTVEC(0x0130,INTVEC_EP2);
59
DEFINE_INTVEC(0x0134,INTVEC_EP4);
60
DEFINE_INTVEC(0x0138,INTVEC_EP6);
61
DEFINE_INTVEC(0x013C,INTVEC_EP8);
62
DEFINE_INTVEC(0x0140,INTVEC_IBN);
63
DEFINE_INTVEC(0x0148,INTVEC_EP0PING);
64
DEFINE_INTVEC(0x014C,INTVEC_EP1PING);
65
DEFINE_INTVEC(0x0150,INTVEC_EP2PING);
66
DEFINE_INTVEC(0x0154,INTVEC_EP4PING);
67
DEFINE_INTVEC(0x0158,INTVEC_EP6PING);
68
DEFINE_INTVEC(0x015C,INTVEC_EP8PING);
69
DEFINE_INTVEC(0x0160,INTVEC_ERRLIMIT);
70
DEFINE_INTVEC(0x0170,INTVEC_EP2ISOERR);
71
DEFINE_INTVEC(0x0174,INTVEC_EP4ISOERR);
72
DEFINE_INTVEC(0x0178,INTVEC_EP6ISOERR);
73
DEFINE_INTVEC(0x017C,INTVEC_EP8ISOERR);
74
DEFINE_INTVEC(0x0180,INTVEC_EP2PF);
75
DEFINE_INTVEC(0x0184,INTVEC_EP4PF);
76
DEFINE_INTVEC(0x0188,INTVEC_EP6PF);
77
DEFINE_INTVEC(0x018C,INTVEC_EP8PF);
78
DEFINE_INTVEC(0x0190,INTVEC_EP2EF);
79
DEFINE_INTVEC(0x0194,INTVEC_EP4EF);
80
DEFINE_INTVEC(0x0198,INTVEC_EP6EF);
81
DEFINE_INTVEC(0x019C,INTVEC_EP8EF);
82
DEFINE_INTVEC(0x01A0,INTVEC_EP2FF);
83
DEFINE_INTVEC(0x01A8,INTVEC_EP6FF);
84
DEFINE_INTVEC(0x01AC,INTVEC_EP8FF);
85
DEFINE_INTVEC(0x01B0,INTVEC_GPIFDONE);
86
DEFINE_INTVEC(0x01B4,INTVEC_GPIFWF);]
87
 
88 5 ZTEX
#define[DEFINE_INTVEC(][,$1);][__xdata __at $0 struct INTVEC $1;]
89 2 ZTEX
INTVECS;
90
#udefine[DEFINE_INTVEC(]
91
 
92 5 ZTEX
void abscode_intvec()// _naked
93 2 ZTEX
{
94
#define[DEFINE_INTVEC(][,$1);][    .org $0
95
        reti]
96 5 ZTEX
    __asm
97 2 ZTEX
    .area ABSCODE (ABS,CODE)
98
    .org 0x0000
99
ENTRY:
100
        ljmp #0x0200
101
INTVECS;
102
    .org 0x01b8
103
INTVEC_DUMMY:
104
        reti
105
    .area CSEG    (CODE)
106 5 ZTEX
    __endasm;
107 2 ZTEX
}
108
 
109
#udefine[INTVECS;]
110
#udefine[DEFINE_INTVEC(]
111
 
112
 
113
/* Init an interrupt vector */
114
#define[INIT_INTERRUPT_VECTOR(][,$1);][{
115
    $0.op=0x02;
116
    $0.addrH=((unsigned short)(&$1)) >> 8;
117
    $0.addrL=(unsigned short)(&$1);
118
}]
119
 
120
 
121
/* Enable USB autovectors */
122
#define[ENABLE_AVUSB;][{
123
    INT8VEC_USB.op=0x02;
124
    INT8VEC_USB.addrH = 0x01;
125
    INT8VEC_USB.addrL = 0xb8;
126
    INTSETUP |= 8;
127
}]
128
 
129
 
130
/* Disable USB autovectors */
131
#define[DISABLE_AVUSB;][INTSETUP &= ~8;]
132
 
133
 
134
/* Enable GPIF autovectors */
135
#define[ENABLE_AVGPIF;][{
136
    INT10VEC_GPIF.op=0x02;
137
    INT10VEC_GPIF.addrH = 0x01;
138
    INT10VEC_GPIF.addrL = 0xb8;
139
    INTSETUP |= 3;
140
}]
141
 
142
 
143
/* Disable GPIF autovectors */
144
#define[DISABLE_AVPGIF;][INTSETUP &= ~3;]
145
 
146
 
147
#endif   /* INTAVECS_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.