OpenCores
URL https://opencores.org/ocsvn/usb_fpga_1_2/usb_fpga_1_2/trunk

Subversion Repositories usb_fpga_1_2

[/] [usb_fpga_1_2/] [trunk/] [examples/] [usb-fpga-1.11/] [1.11a/] [memtest/] [fpga/] [ipcore_dir/] [mem0/] [user_design/] [mig.prj] - Blame information for rev 8

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Line No. Rev Author Line
1 8 ZTEX
2
3 
    mem0
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    xc6slx16-ftg256/-2
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    3.5
6
7 
        DDR_SDRAM/Components/MT46V32M16XX-5B-IT
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        5000
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        0
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        1
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        FALSE
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        13
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        10
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        2
16
17
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        4(010)
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        3
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        Enable-Normal
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        Normal
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        Class II
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        Class II
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        UNCALIB_TERM
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        50 Ohms
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28
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        1
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        Disable
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        Single-Ended
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        Two 32-bit bi-directional and four 32-bit unidirectional ports
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        M4
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        M5
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        Port0,Port1,Port2,Port3,Port4,Port5
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        Bi-directional,Bi-directional,Write,Read,Write,Read
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        ROW_BANK_COLUMN
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        Round Robin
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        012345
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        123450
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        234501
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        345012
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        450123
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        501234
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        012345
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        123450
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        234501
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        345012
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        450123
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        501234
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