1 |
7 |
ZTEX |
NET "FXCLK" TNM_NET = "FXCLK";
|
2 |
|
|
TIMESPEC "TS_FXCLK" = PERIOD "FXCLK" 20.833333 ns HIGH 50 %;
|
3 |
|
|
NET "FXCLK" LOC = "K14" | IOSTANDARD = LVCMOS33 ;
|
4 |
|
|
|
5 |
|
|
NET "IFCLK" TNM_NET = "IFCLK";
|
6 |
|
|
TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %;
|
7 |
|
|
NET "IFCLK" LOC = "J14" | IOSTANDARD = LVCMOS33 ;
|
8 |
|
|
|
9 |
|
|
NET "CLK" TNM_NET = "CLK";
|
10 |
|
|
TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY;
|
11 |
|
|
TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY;
|
12 |
|
|
|
13 |
|
|
NET "RESET_IN" LOC = "R3" | IOSTANDARD = LVCMOS33 ; # PA0
|
14 |
|
|
NET "SLOE" LOC = "T3" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2
|
15 |
|
|
NET "PA3" LOC = "R11" | IOSTANDARD = LVCMOS33 ; # PA3
|
16 |
|
|
NET "FIFOADR0" LOC = "T5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4
|
17 |
|
|
NET "FIFOADR1" LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5
|
18 |
|
|
NET "PKTEND" LOC = "T11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6
|
19 |
|
|
# NET "PA7" LOC = "T10" | IOSTANDARD = LVCMOS33 ;
|
20 |
|
|
|
21 |
|
|
NET "FD<0>" LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
22 |
|
|
NET "FD<1>" LOC = "C15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
23 |
|
|
NET "FD<2>" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
24 |
|
|
NET "FD<3>" LOC = "D14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
25 |
|
|
NET "FD<4>" LOC = "E13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
26 |
|
|
NET "FD<5>" LOC = "E12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
27 |
|
|
NET "FD<6>" LOC = "F16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
28 |
|
|
NET "FD<7>" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
29 |
|
|
NET "FD<8>" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
30 |
|
|
NET "FD<9>" LOC = "N12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
31 |
|
|
NET "FD<10>" LOC = "P12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
32 |
|
|
NET "FD<11>" LOC = "N5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
33 |
|
|
NET "FD<12>" LOC = "P5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
34 |
|
|
NET "FD<13>" LOC = "L8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
35 |
|
|
NET "FD<14>" LOC = "L7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
36 |
|
|
NET "FD<15>" LOC = "R5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
37 |
|
|
|
38 |
|
|
|
39 |
|
|
NET "PC<0>" LOC = "G12" | IOSTANDARD = LVCMOS33 ;
|
40 |
|
|
NET "PC<1>" LOC = "G11" | IOSTANDARD = LVCMOS33 ;
|
41 |
|
|
NET "PC<2>" LOC = "H15" | IOSTANDARD = LVCMOS33 ;
|
42 |
|
|
NET "PC<3>" LOC = "M14" | IOSTANDARD = LVCMOS33 ;
|
43 |
|
|
NET "pc<4>" LOC = "P11" | IOSTANDARD = LVCMOS33 ;
|
44 |
|
|
NET "pc<5>" LOC = "H14" | IOSTANDARD = LVCMOS33 ;
|
45 |
|
|
NET "pc<6>" LOC = "H11" | IOSTANDARD = LVCMOS33 ;
|
46 |
|
|
NET "pc<7>" LOC = "H13" | IOSTANDARD = LVCMOS33 ;
|
47 |
|
|
|
48 |
|
|
NET "FLAGB" LOC = "G16" | IOSTANDARD = LVCMOS33 ;
|
49 |
|
|
|
50 |
|
|
NET "SLRD" LOC = "K11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
51 |
|
|
NET "SLWR" LOC = "J11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
|
52 |
|
|
|
53 |
|
|
|
54 |
|
|
############################################################################
|
55 |
|
|
# VCC AUX VOLTAGE
|
56 |
|
|
############################################################################
|
57 |
|
|
CONFIG VCCAUX=2.5;
|
58 |
|
|
|
59 |
|
|
############################################################################
|
60 |
|
|
## Memory Controller 3
|
61 |
|
|
## Memory Device: DDR_SDRAM->MT46V32M16XX-5B-IT
|
62 |
|
|
## Frequency: 200 MHz
|
63 |
|
|
## Time Period: 5000 ps
|
64 |
|
|
## Supported Part Numbers: MT46V32M16BN-5B-IT
|
65 |
|
|
############################################################################
|
66 |
|
|
|
67 |
|
|
############################################################################
|
68 |
|
|
## I/O TERMINATION
|
69 |
|
|
############################################################################
|
70 |
|
|
NET "mcb3_dram_dq[*]" IN_TERM = UNTUNED_SPLIT_50;
|
71 |
|
|
NET "mcb3_dram_dqs" IN_TERM = UNTUNED_SPLIT_50;
|
72 |
|
|
NET "mcb3_dram_udqs" IN_TERM = UNTUNED_SPLIT_50;
|
73 |
|
|
|
74 |
|
|
NET "mcb3_dram_a[*]" OUT_TERM = UNTUNED_50;
|
75 |
|
|
NET "mcb3_dram_ba[*]" OUT_TERM = UNTUNED_50;
|
76 |
|
|
NET "mcb3_dram_ck" OUT_TERM = UNTUNED_50;
|
77 |
|
|
NET "mcb3_dram_ck_n" OUT_TERM = UNTUNED_50;
|
78 |
|
|
NET "mcb3_dram_cke" OUT_TERM = UNTUNED_50;
|
79 |
|
|
NET "mcb3_dram_ras_n" OUT_TERM = UNTUNED_50;
|
80 |
|
|
NET "mcb3_dram_cas_n" OUT_TERM = UNTUNED_50;
|
81 |
|
|
NET "mcb3_dram_we_n" OUT_TERM = UNTUNED_50;
|
82 |
|
|
NET "mcb3_dram_dm" OUT_TERM = UNTUNED_50;
|
83 |
|
|
NET "mcb3_dram_udm" OUT_TERM = UNTUNED_50;
|
84 |
|
|
|
85 |
|
|
############################################################################
|
86 |
|
|
# I/O STANDARDS
|
87 |
|
|
############################################################################
|
88 |
|
|
# NET "mcb3_dram_dq[*]" IOSTANDARD = LVCMOS25;
|
89 |
|
|
# NET "mcb3_dram_dqs" IOSTANDARD = LVCMOS25;
|
90 |
|
|
# NET "mcb3_dram_udqs" IOSTANDARD = LVCMOS25;
|
91 |
|
|
# NET "mcb3_rzq" IOSTANDARD = LVCMOS25;
|
92 |
|
|
# NET "mcb3_zio" IOSTANDARD = LVCMOS25;
|
93 |
|
|
NET "mcb3_dram_dq[*]" IOSTANDARD = SSTL2_II;
|
94 |
|
|
NET "mcb3_dram_dqs" IOSTANDARD = SSTL2_II;
|
95 |
|
|
NET "mcb3_dram_udqs" IOSTANDARD = SSTL2_II;
|
96 |
|
|
NET "mcb3_rzq" IOSTANDARD = SSTL2_II;
|
97 |
|
|
NET "mcb3_zio" IOSTANDARD = SSTL2_II;
|
98 |
|
|
|
99 |
|
|
NET "mcb3_dram_a[*]" IOSTANDARD = SSTL2_II;
|
100 |
|
|
NET "mcb3_dram_ba[*]" IOSTANDARD = SSTL2_II;
|
101 |
|
|
NET "mcb3_dram_ck" IOSTANDARD = DIFF_SSTL2_II;
|
102 |
|
|
NET "mcb3_dram_ck_n" IOSTANDARD = DIFF_SSTL2_II;
|
103 |
|
|
NET "mcb3_dram_cke" IOSTANDARD = SSTL2_II;
|
104 |
|
|
NET "mcb3_dram_ras_n" IOSTANDARD = SSTL2_II;
|
105 |
|
|
NET "mcb3_dram_cas_n" IOSTANDARD = SSTL2_II;
|
106 |
|
|
NET "mcb3_dram_we_n" IOSTANDARD = SSTL2_II;
|
107 |
|
|
NET "mcb3_dram_dm" IOSTANDARD = SSTL2_II;
|
108 |
|
|
NET "mcb3_dram_udm" IOSTANDARD = SSTL2_II;
|
109 |
|
|
|
110 |
|
|
|
111 |
|
|
############################################################################
|
112 |
|
|
# MCB 3
|
113 |
|
|
# Pin Location Constraints for Clock, Masks, Address, and Controls
|
114 |
|
|
############################################################################
|
115 |
|
|
|
116 |
|
|
NET "mcb3_dram_dq[4]" LOC = "F2" ;
|
117 |
|
|
NET "mcb3_dram_dq[5]" LOC = "F1" ;
|
118 |
|
|
NET "mcb3_dram_dq[6]" LOC = "G3" ;
|
119 |
|
|
NET "mcb3_dram_dq[7]" LOC = "G1" ;
|
120 |
|
|
NET "mcb3_dram_dq[2]" LOC = "J3" ;
|
121 |
|
|
NET "mcb3_dram_dq[3]" LOC = "J1" ;
|
122 |
|
|
NET "mcb3_dram_dq[0]" LOC = "K2" ;
|
123 |
|
|
NET "mcb3_dram_dq[1]" LOC = "K1" ;
|
124 |
|
|
|
125 |
|
|
NET "mcb3_dram_dq[8]" LOC = "L3" ;
|
126 |
|
|
NET "mcb3_dram_dq[9]" LOC = "L1" ;
|
127 |
|
|
NET "mcb3_dram_dq[10]" LOC = "M2" ;
|
128 |
|
|
NET "mcb3_dram_dq[11]" LOC = "M1" ;
|
129 |
|
|
NET "mcb3_dram_dq[12]" LOC = "P2" ;
|
130 |
|
|
NET "mcb3_dram_dq[13]" LOC = "P1" ;
|
131 |
|
|
NET "mcb3_dram_dq[14]" LOC = "R2" ;
|
132 |
|
|
NET "mcb3_dram_dq[15]" LOC = "R1" ;
|
133 |
|
|
|
134 |
|
|
NET "mcb3_dram_dqs" LOC = "H2" ;
|
135 |
|
|
NET "mcb3_dram_udqs" LOC = "N3" ;
|
136 |
|
|
|
137 |
|
|
NET "mcb3_dram_ba[0]" LOC = "C3" ;
|
138 |
|
|
NET "mcb3_dram_ba[1]" LOC = "C2" ;
|
139 |
|
|
|
140 |
|
|
NET "mcb3_dram_a[0]" LOC = "K5" ;
|
141 |
|
|
NET "mcb3_dram_a[1]" LOC = "K6" ;
|
142 |
|
|
NET "mcb3_dram_a[2]" LOC = "D1" ;
|
143 |
|
|
NET "mcb3_dram_a[3]" LOC = "L4" ;
|
144 |
|
|
NET "mcb3_dram_a[4]" LOC = "G5" ;
|
145 |
|
|
NET "mcb3_dram_a[5]" LOC = "H4" ;
|
146 |
|
|
NET "mcb3_dram_a[6]" LOC = "H3" ;
|
147 |
|
|
NET "mcb3_dram_a[7]" LOC = "D3" ;
|
148 |
|
|
NET "mcb3_dram_a[8]" LOC = "B2" ;
|
149 |
|
|
NET "mcb3_dram_a[9]" LOC = "A2" ;
|
150 |
|
|
NET "mcb3_dram_a[10]" LOC = "G6" ;
|
151 |
|
|
NET "mcb3_dram_a[11]" LOC = "E3" ;
|
152 |
|
|
NET "mcb3_dram_a[12]" LOC = "F3" ;
|
153 |
|
|
|
154 |
|
|
NET "mcb3_dram_dm" LOC = "J4" ;
|
155 |
|
|
NET "mcb3_dram_udm" LOC = "K3" ;
|
156 |
|
|
|
157 |
|
|
NET "mcb3_dram_ras_n" LOC = "J6" ;
|
158 |
|
|
NET "mcb3_dram_cas_n" LOC = "H5" ;
|
159 |
|
|
NET "mcb3_dram_we_n" LOC = "C1" ;
|
160 |
|
|
|
161 |
|
|
NET "mcb3_dram_ck" LOC = "E2" ;
|
162 |
|
|
NET "mcb3_dram_ck_n" LOC = "E1" ;
|
163 |
|
|
NET "mcb3_dram_cke" LOC = "F4" ;
|
164 |
|
|
|
165 |
|
|
# NC pins
|
166 |
|
|
NET "mcb3_rzq" LOC = "M4" ;
|
167 |
|
|
NET "mcb3_zio" LOC = "M5" ;
|
168 |
|
|
|
169 |
|
|
|