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[/] [usb_fpga_1_2/] [trunk/] [include/] [ztex-descriptors.h] - Blame information for rev 9

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1 2 ZTEX 
/*!
2 8 ZTEX 
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 
   Copyright (C) 2009-2011 ZTEX GmbH.
4 2 ZTEX 
   http://www.ztex.de
5 
 
6 
   This program is free software; you can redistribute it and/or modify
7 
   it under the terms of the GNU General Public License version 3 as
8 
   published by the Free Software Foundation.
9 
 
10 
   This program is distributed in the hope that it will be useful, but
11 
   WITHOUT ANY WARRANTY; without even the implied warranty of
12 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 
   General Public License for more details.
14 
 
15 
   You should have received a copy of the GNU General Public License
16 
   along with this program; if not, see http://www.gnu.org/licenses/.
17 
!*/
18 
 
19 
/*
20 
   Defines the USB descriptors
21 
*/
22 
 
23 
#ifndef[ZTEX_DESCRIPTORS_H]
24 
#define[ZTEX_DESCRIPTORS_H]
25 
 
26 
#define[ZTEX_DESCRIPTOR_OFFS][0x06c]
27 
#define[ZTEX_DESCRIPTOR_LEN][40]
28 
 
29 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS BYTE ZTEX_DESCRIPTOR;
30 2 ZTEX 
 
31 
/* ZTEX descriptor version. Must be 1. */
32 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+1 BYTE ZTEX_DESCRIPTOR_VERSION;
33 2 ZTEX 
 
34 
/* Must not be modified, ID="ZTEX" */
35 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+2 BYTE ZTEXID[4];
36 2 ZTEX 
 
37 
/*
38 
   Product ID and firmware compatibility information.
39 
 
40 
   A firmware can overwrite an installed one if
41 
   if ( INSTALLED.PRODUCTID[0]==0 || PRODUCTID[0]==0 || INSTALLED.PRODUCTID[0]==PRODUCTID[0] ) &&
42 
      ( INSTALLED.PRODUCTID[1]==0 || PRODUCTID[1]==0 || INSTALLED.PRODUCTID[1]==PRODUCTID[1] ) &&
43 
      ( INSTALLED.PRODUCTID[2]==0 || PRODUCTID[2]==0 || INSTALLED.PRODUCTID[2]==PRODUCTID[2] ) &&
44 
      ( INSTALLED.PRODUCTID[3]==0 || PRODUCTID[3]==0 || INSTALLED.PRODUCTID[3]==PRODUCTID[3] )
45 
 
46 
   Reserved Product ID's:
47 
 
48 
   0.0.0.0              // default Product ID (no product specified)
49 
   1.*.*.*              // may be used for experimental purposes
50 
   10.*.*.*             // used for ZTEX products
51 3 ZTEX 
   10.11.*.*            // ZTEX USB-FPGA-Module 1.2
52 5 ZTEX 
   10.12.*.*            // ZTEX USB-FPGA-Module 1.11
53 9 ZTEX 
   10.13.*.*            // ZTEX USB-FPGA-Module 1.15 (not 1.15y)
54 
   10.14.*.*            // ZTEX USB-FPGA-Module 1.15x
55 
   10.15.*.*            // ZTEX USB-FPGA-Module 1.15y
56 3 ZTEX 
   10.20.*.*            // ZTEX USB-Module 1.0
57 5 ZTEX 
   10.30.*.*            // ZTEX USB-XMEGA-Module 1.0
58 9 ZTEX 
   10.0.1.1             // ZTEX bitminer firmware
59 2 ZTEX 
 
60 
   Please contact me (http://www.ztex.de --> Impressum/Kontakt) if you want to register/reserve a Product ID (range).
61 
*/
62 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+6 BYTE PRODUCT_ID[4];
63 2 ZTEX 
 
64 
/* Firmware version, may be used to distinguish seveveral firmware versions */
65 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+10 BYTE FW_VERSION;
66 2 ZTEX 
 
67 
/* Interface version. Must be 1. */
68 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+11 BYTE INTERFACE_VERSION;
69 2 ZTEX 
 
70 
/*
71 
    Standard interface capabilities:
72 
        0.0  : EEPROM read/write, see ztex-eeprom.h
73 
        0.1  : FPGA configuration, see ztex-fpga.h
74 5 ZTEX 
        0.2  : Flash memory support, see ztex-flash1.h
75 
        0.3  : Debug helper, see ztex-debug.h
76 
        0.4  : AVR XMEGA support, see ztex-xmega.h
77 9 ZTEX 
        0.5  : High speed FPGA configuration support
78 
        0.6  : MAC EEPROM support
79 
        0.7  : Multi-FPGA support
80 2 ZTEX 
*/
81 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+12 BYTE INTERFACE_CAPABILITIES[6];
82 2 ZTEX 
 
83 
/* Space for settings which depends on PRODUCT_ID, e.g extra capabilities */
84 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+18 BYTE MODULE_RESERVED[12];
85 2 ZTEX 
 
86 
/*
87 
   Serial number string
88 
   default: "0000000000"
89 
   Should only be modified by the the firmware upload software
90 
*/
91 8 ZTEX 
__xdata __at ZTEX_DESCRIPTOR_OFFS+30 BYTE SN_STRING[10];
92 2 ZTEX 
 
93 
/* Are Vendor ID and Product ID defined? */
94 
#ifndef[USB_VENDOR_ID]
95 4 ZTEX 
#error[No USB Vendor ID defined]
96 2 ZTEX 
#endif
97 
 
98 
#ifndef[USB_PRODUCT_ID]
99 4 ZTEX 
#error[No USB Product ID defined]
100 2 ZTEX 
#endif
101 
 
102 
/* Prepare the Interfaces, i.e. check which interfaces are defined */
103 
#define[CONFIGURE_INTERFACE(][);][
104 
#define[CONFIG_INTERFACE$0]
105 
#ifeq[EP1IN_INTERFACE][$0]
106 
#elifeq[EP1OUT_INTERFACE][$0]
107 
#elifeq[EP2_INTERFACE][$0]
108 
#elifeq[EP4_INTERFACE][$0]
109 
#elifeq[EP6_INTERFACE][$0]
110 
#elifneq[EP8_INTERFACE][$0]
111 
#udefine[CONFIG_INTERFACE$0]
112 
#endif
113 
#ifdef[CONFIG_INTERFACE$0]
114 
//Interface $0: YES
115 
#else
116 
//Interface $0: NO
117 
#endif]
118 
 
119 
CONFIGURE_INTERFACE(0);
120 
CONFIGURE_INTERFACE(1);
121 
CONFIGURE_INTERFACE(2);
122 
CONFIGURE_INTERFACE(3);
123 
 
124 
/* define the ZTEX descriptor */
125 8 ZTEX 
void abscode_identity()// _naked
126 2 ZTEX 
{
127 8 ZTEX 
    __asm
128 2 ZTEX 
    .area ABSCODE (ABS,CODE)
129 
 
130 
    .org ZTEX_DESCRIPTOR_OFFS
131 
    .db ZTEX_DESCRIPTOR_LEN
132 
 
133 
    .org _ZTEX_DESCRIPTOR_VERSION
134 
    .db 1
135 
 
136 
    .org _ZTEXID
137 
    .ascii "ZTEX"
138 
 
139 
    .org _PRODUCT_ID
140 
    .db PRODUCT_ID_0
141 
    .db PRODUCT_ID_1
142 
    .db PRODUCT_ID_2
143 
    .db PRODUCT_ID_3
144 
 
145 
    .org _FW_VERSION
146 
    .db FWVER
147 
 
148 
    .org _INTERFACE_VERSION
149 
    .db 1
150 
 
151 
    .org _INTERFACE_CAPABILITIES
152 
    .db 0
153 
#ifdef[@CAPABILITY_EEPROM;]
154 
#nolf
155 
 + 1
156 
#endif
157 
#ifdef[@CAPABILITY_FPGA;]
158 
#nolf
159 
 + 2
160 
#endif
161 3 ZTEX 
#ifdef[@CAPABILITY_FLASH;]
162 
#nolf
163 
 + 4
164 
#endif
165 5 ZTEX 
#ifdef[@CAPABILITY_DEBUG;]
166 
#nolf
167 
 + 8
168 
#endif
169 
#ifdef[@CAPABILITY_XMEGA;]
170 
#nolf
171 
 + 16
172 
#endif
173 8 ZTEX 
#ifdef[@CAPABILITY_HS_FPGA;]
174 
#nolf
175 
 + 32
176 
#endif
177 
#ifdef[@CAPABILITY_MAC_EEPROM;]
178 
#nolf
179 
 + 64
180 
#endif
181 9 ZTEX 
#ifdef[@CAPABILITY_MULTI_FPGA;]
182 
#nolf
183 
 + 128
184 
#endif
185 2 ZTEX 
    .db 0
186 
    .db 0
187 
    .db 0
188 
    .db 0
189 
    .db 0
190 
 
191 
    .org _MODULE_RESERVED
192 
    .db MODULE_RESERVED_00
193 
    .db MODULE_RESERVED_01
194 
    .db MODULE_RESERVED_02
195 
    .db MODULE_RESERVED_03
196 
    .db MODULE_RESERVED_04
197 
    .db MODULE_RESERVED_05
198 
    .db MODULE_RESERVED_06
199 
    .db MODULE_RESERVED_07
200 
    .db MODULE_RESERVED_08
201 
    .db MODULE_RESERVED_09
202 
    .db MODULE_RESERVED_10
203 
    .db MODULE_RESERVED_11
204 
 
205 
    .org _SN_STRING
206 
    .ascii "0000000000"
207 
 
208 
    .area CSEG    (CODE)
209 8 ZTEX 
    __endasm;
210 2 ZTEX 
}
211 
 
212 
/* *********************************************************************
213 
   ***** strings *******************************************************
214 
   ********************************************************************* */
215 8 ZTEX 
__code char manufacturerString[] = MANUFACTURER_STRING;
216 
__code char productString[] = PRODUCT_STRING;
217 
__code char configurationString[] = CONFIGURATION_STRING;
218 2 ZTEX 
 
219 
 
220 
/* *********************************************************************
221 
   ***** descriptors ***************************************************
222 
   ********************************************************************* */
223 
#define[EP_DESCRIPTOR(][);][
224 
                                // Endpoint $0 descriptor
225 
        ,7                      // 0, Descriptor length
226 
        ,5                      // 1, Descriptor type
227 
#ifeq[$0][1IN]
228 
        ,0x81                   // 2, direction=output, address=1
229 
#elifeq[$0][1OUT]
230 
        ,0x01                   // 2, direction=output, address=1
231 
#elifeq[EP$0_DIR][IN]
232 
        ,0x80+$0                 // 2, direction=output, address=$0
233 
#elifeq[EP$0_DIR][OUT]
234 
        ,$0                      // 2, direction=input, address=$0
235 
#else
236 
#error[Invalid direction for endpoint $0 (`IN' or `ÒUT' expected)]
237 
#endif
238 
#ifeq[EP$0_TYPE][ISO]
239 
        ,1                      // 3, ISO transferns
240 
#elifeq[EP$0_TYPE][BULK]
241 
        ,2                      // 3, BULK transferns
242 
#elifeq[EP$0_TYPE][INT]
243 
        ,3                      // 3, INT transferns
244 
#else
245 
#error[Invalid type for endpoint $0: `EP$0_TYPE' (`ISO', 'BULK' or `INT' expected)]
246 
#endif
247 
#ifdef[HIGH_SPEED]
248 
        ,EP$0_SIZE & 0xff        // 4, max. packet size (L)
249 
        ,EP$0_SIZE >> 8  // 5, max. packet size (H)
250 4 ZTEX 
#ifneq[EP$0_TYPE][BULK]
251 
            | ( (EP$0_PPMF-1) << 3 )
252 
#endif
253 2 ZTEX 
#else
254 
        ,64                     // 4, max. packet size (L)
255 
        ,0                       // 5, max. packet size (H)
256 
#endif
257 4 ZTEX 
#ifeq[EP$0_TYPE][BULK]
258 
        ,0                       // 6, Polling interval
259 
#elifeq[EP$0_TYPE][ISO]
260 
        ,1                      // 6, Polling interval (1ms if Full Speed mode, 125µs in High Speed Mode)
261 2 ZTEX 
#else
262 4 ZTEX 
        ,EP$0_POLL               // 6, Polling interval (1ms if Full Speed mode, 125µs in High Speed Mode)
263 2 ZTEX 
#endif
264 
]
265 
 
266 
#define[INTERFACE_DESCRIPTOR(][);][
267 
                // Interface $0 descriptor
268 
        ,9      // 0, Descriptor length
269 
        ,0x04   // 1, Descriptor type
270 
        ,0       // 2, Zero-based index of this interface
271 
#ifneq[$0][0]
272 
#ifdef[CONFIG_INTERFACE0]
273 
          +1
274 
#endif
275 
#ifneq[$0][1]
276 
#ifdef[CONFIG_INTERFACE1]
277 
          +1
278 
#endif
279 
#ifneq[$0][2]
280 
#ifdef[CONFIG_INTERFACE2]
281 
          +1
282 
#endif
283 
#endif
284 
#endif
285 
#endif
286 4 ZTEX 
        ,0       // 3, Alternate setting 0
287 2 ZTEX 
        ,0       // 4, Number of end points
288 
#ifeq[EP1IN_INTERFACE][$0]
289 
          +1
290 
#endif
291 
#ifeq[EP1OUT_INTERFACE][$0]
292 
          +1
293 
#endif
294 
#ifeq[EP2_INTERFACE][$0]
295 
          +1
296 
#endif
297 
#ifeq[EP4_INTERFACE][$0]
298 
          +1
299 
#endif
300 
#ifeq[EP6_INTERFACE][$0]
301 
          +1
302 
#endif
303 
#ifeq[EP8_INTERFACE][$0]
304 
          +1
305 
#endif
306 
        ,0xff   // 5, Interface class
307 
        ,0xff   // 6, Interface sub class
308 
        ,0xff   // 7, Interface protocol
309 
        ,0       // 8, Index of interface string descriptor
310 
#ifeq[EP1IN_INTERFACE][$0]
311 
         EP_DESCRIPTOR(1IN);
312 
#endif
313 
#ifeq[EP1OUT_INTERFACE][$0]
314 
         EP_DESCRIPTOR(1OUT);
315 
#endif
316 
#ifeq[EP2_INTERFACE][$0]
317 
         EP_DESCRIPTOR(2);
318 
#endif
319 
#ifeq[EP4_INTERFACE][$0]
320 
         EP_DESCRIPTOR(4);
321 
#endif
322 
#ifeq[EP6_INTERFACE][$0]
323 
         EP_DESCRIPTOR(6);
324 
#endif
325 
#ifeq[EP8_INTERFACE][$0]
326 
         EP_DESCRIPTOR(8);
327 
#endif
328 
]
329 
 
330 8 ZTEX 
#define[APPEND_PADBYTE(][);][__code BYTE $0_PadByte[2-(sizeof($0) & 1)] = { 0 };]
331 2 ZTEX 
 
332 
#ifdef[PAD_BYTE]                // to ensure word alignment of the descriptors; PAD_BYTE is defined automatically by bmpsdcc script
333 8 ZTEX 
__code BYTE PadByte = 0;
334 2 ZTEX 
#endif
335 
 
336 8 ZTEX 
__code BYTE DeviceDescriptor[] =
337 2 ZTEX 
    {
338 
        18,     // 0, Descriptor length
339 
        0x01,   // 1, Descriptor type
340 
        0x00,   // 2, Specification Version (L)
341 
        0x02,   // 3, Specification Version (H)
342 
        0xff,   // 4, Device class
343 
        0xff,   // 5, Device sub-class
344 
        0xff,   // 6, Device protocol
345 
        64,     // 7, Maximum packet size for EP0
346 
        (USB_VENDOR_ID) & 255,  // 8, VENDOR_ID (L)
347 
        (USB_VENDOR_ID) >> 8,   // 9, VENDOR_ID (H)
348 
        (USB_PRODUCT_ID) & 255, // 10, PRODUCT_ID (L)
349 
        (USB_PRODUCT_ID) >> 8,  // 11, PRODUCT_ID (H)
350 
        0x00,   // 12, device release number (BCD, L)
351 
        0x00,   // 13, device release number (BCD, H)
352 
        1,      // 14, Manufacturer string index
353 
        2,      // 15, Product string index
354 
        3,      // 16, Serial number string index
355 
        1       // 17, Number of configurations
356 
    };
357 
 
358 8 ZTEX 
__code BYTE DeviceQualifierDescriptor[] =
359 2 ZTEX 
    {
360 
        10,     // 0, Descriptor length
361 
        0x06,   // 1, Decriptor type
362 
        0x00,   // 2, Specification Version (L)
363 
        0x02,   // 3, Specification Version (H)
364 
        0xff,   // 4, Device class
365 
        0xff,   // 5, Device sub-class
366 
        0xff,   // 6, Device protocol
367 
        64,     // 7, Maximum packet size (EP0?)
368 
        1,      // 8, Number of configurations
369 
        0,       // 9, Reserved, must be zero
370 
    };
371 
 
372 8 ZTEX 
__code BYTE HighSpeedConfigDescriptor[] =
373 2 ZTEX 
    {
374 
#define[HIGH_SPEED]
375 
        9       // 0, Descriptor length
376 
        ,0x02   // 1, Decriptor type
377 
        ,sizeof(HighSpeedConfigDescriptor) & 0xff       // 2, Total length (LSB)
378 
//      ,sizeof(HighSpeedConfigDescriptor) >> 8         // 3, Total length (MB)
379 
        ,0                                               // 3, To avoid warnings, descriptor length will never exceed 255 bytes
380 
        ,0       // 4, Number of Interfaces
381 
#ifdef[CONFIG_INTERFACE0]
382 
          +1
383 
#endif
384 
#ifdef[CONFIG_INTERFACE1]
385 
          +1
386 
#endif
387 
#ifdef[CONFIG_INTERFACE2]
388 
          +1
389 
#endif
390 
#ifdef[CONFIG_INTERFACE3]
391 
          +1
392 
#endif
393 
 
394 
        ,1      // 5, Configuration number
395 
        ,4      // 6, Configuration string
396 
        ,0xc0   // 7, Attributes: bus and self powered
397 
        ,50     // Maximum bus power 100 mA
398 
#ifdef[CONFIG_INTERFACE0]
399 
        INTERFACE_DESCRIPTOR(0);
400 
#endif
401 
#ifdef[CONFIG_INTERFACE1]
402 
        INTERFACE_DESCRIPTOR(1);
403 
#endif
404 
#ifdef[CONFIG_INTERFACE2]
405 
        INTERFACE_DESCRIPTOR(2);
406 
#endif
407 
#ifdef[CONFIG_INTERFACE3]
408 
        INTERFACE_DESCRIPTOR(3);
409 
#endif
410 
#udefine[HIGH_SPEED]
411 
    };
412 
APPEND_PADBYTE(HighSpeedConfigDescriptor);
413 
 
414 8 ZTEX 
__code BYTE FullSpeedConfigDescriptor[] =
415 2 ZTEX 
    {
416 
        9       // 0, Descriptor length
417 
        ,0x02   // 1, Decriptor type
418 4 ZTEX 
        ,sizeof(FullSpeedConfigDescriptor) & 0xff       // 2, Total length (LSB)
419 
//      ,sizeof(FullSpeedConfigDescriptor) >> 8         // 3, Total length (MSB)
420 2 ZTEX 
        ,0                                               // 3, To avoid warnings, descriptor length will never exceed 255 bytes
421 
        ,0       // 4, Number of Interfaces
422 
#ifdef[CONFIG_INTERFACE0]
423 
          +1
424 
#endif
425 
#ifdef[CONFIG_INTERFACE1]
426 
          +1
427 
#endif
428 
#ifdef[CONFIG_INTERFACE2]
429 
          +1
430 
#endif
431 
#ifdef[CONFIG_INTERFACE3]
432 
          +1
433 
#endif
434 
 
435 
        ,1      // 5, Configuration number
436 
        ,4      // 6, Configuration string
437 
        ,0xc0   // 7, Attributes: bus and self powered
438 
        ,50     // Maximum bus power 100 mA
439 
#ifdef[CONFIG_INTERFACE0]
440 
        INTERFACE_DESCRIPTOR(0);
441 
#endif
442 
#ifdef[CONFIG_INTERFACE1]
443 
        INTERFACE_DESCRIPTOR(1);
444 
#endif
445 
#ifdef[CONFIG_INTERFACE2]
446 
        INTERFACE_DESCRIPTOR(2);
447 
#endif
448 
#ifdef[CONFIG_INTERFACE3]
449 
        INTERFACE_DESCRIPTOR(3);
450 
#endif
451 
    };
452 
APPEND_PADBYTE(FullSpeedConfigDescriptor);
453 
 
454 8 ZTEX 
__code BYTE EmptyStringDescriptor[] =
455 2 ZTEX 
    {
456 
        sizeof(EmptyStringDescriptor),          // Length
457 
        0x03,                                   // Descriptor type
458 
        0, 0
459 
    };
460 
 
461 
#endif  /*ZTEX_DESCRIPTORS_H*/

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