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[/] [usb_fpga_1_2/] [trunk/] [include/] [ztex-flash1.h] - Blame information for rev 3

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Line No. Rev Author Line
1 2 ZTEX
/*!
2
   ZTEX Firmware Kit for EZ-USB Microcontrollers
3
   Copyright (C) 2008-2009 ZTEX e.K.
4
   http://www.ztex.de
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License version 3 as
8
   published by the Free Software Foundation.
9
 
10
   This program is distributed in the hope that it will be useful, but
11
   WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
   General Public License for more details.
14
 
15
   You should have received a copy of the GNU General Public License
16
   along with this program; if not, see http://www.gnu.org/licenses/.
17
!*/
18
 
19
/*
20 3 ZTEX
    SPI mode of MMC / *SD Cards
21 2 ZTEX
*/
22
 
23 3 ZTEX
#ifeq[MMC_PORT][E]
24
#define[MMC_bmMODE]
25
#elifeq[MMC_PORT][A]
26
#elifeq[MMC_PORT][B]
27
#elifeq[MMC_PORT][C]
28
#elifneq[MMC_PORT][D]
29
#error[Macro `MMC_PORT' is not defined correctly. Valid values are: `A', `B', `C', `D' and `E'.]
30
#endif
31 2 ZTEX
 
32 3 ZTEX
#ifndef[ZTEX_FLASH1_H]
33
#define[ZTEX_FLASH1_H]
34
 
35
#define[@CAPABILITY_FLASH;]
36
 
37
#ifndef[MMC_PORT]
38
#error[MMC_PORT not defined]
39 2 ZTEX
#endif
40
 
41 3 ZTEX
#ifndef[MMC_BIT_CS]
42
#error[MMC_BIT_CS not defined]
43
#endif
44 2 ZTEX
 
45 3 ZTEX
#ifndef[MMC_BIT_DI]
46
#error[MMC_BIT_DI not defined]
47
#endif
48
 
49
#ifndef[MMC_BIT_DO]
50
#error[MMC_BIT_DO not defined]
51
#endif
52
 
53
#ifndef[MMC_BIT_CLK]
54
#error[MMC_BIT_CLK not defined]
55
#endif
56
 
57
#define[MMC_bmCS][bmBITMMC_BIT_CS]
58
#define[MMC_bmDI][bmBITMMC_BIT_DI]
59
#define[MMC_bmDO][bmBITMMC_BIT_DO]
60
#define[MMC_bmCLK][bmBITMMC_BIT_CLK]
61
 
62
#define[MMC_IO][IOMMC_PORT]
63
 
64
#ifndef[MMC_bmMODE]
65
#define[MMC_CS][IOMMC_PORTMMC_BIT_CS]
66
#define[MMC_CLK][IOMMC_PORTMMC_BIT_CLK]
67
#define[MMC_DI][IOMMC_PORTMMC_BIT_DI]
68
#define[MMC_DO][IOMMC_PORTMMC_BIT_DO]
69
#endif
70
 
71
// may be redefined if the first sectors are reserved (e.g. for a FPGA bitstream)
72
#define[FLASH_FIRST_FREE_SECTOR][0]
73
 
74
xdata BYTE flash_enabled;       // 0    1: enabled, 0:disabled
75
xdata WORD flash_sector_size;   // 1    sector size
76
xdata DWORD flash_sectors;      // 3    number of sectors
77
xdata BYTE flash_ec;            // 7    error code
78
 
79
xdata BYTE mmc_last_cmd;        // 0
80
xdata BYTE mmc_response;        // 1
81
xdata BYTE mmc_buffer[16];      // 2
82
 
83
#define[FLASH_EC_CMD_ERROR][1]
84
#define[FLASH_EC_TIMEOUT][2]
85
#define[FLASH_EC_BUSY][3]
86
#define[FLASH_EC_PENDING][4]
87
#define[FLASH_EC_READ_ERROR][5]
88
#define[FLASH_EC_WRITE_ERROR][6]
89
 
90 2 ZTEX
/* *********************************************************************
91 3 ZTEX
   ***** mmc_clocks ****************************************************
92 2 ZTEX
   ********************************************************************* */
93 3 ZTEX
// perform c (256 if c=0) clocks
94
void mmc_clocks (BYTE c) {
95
        c;                                      // this avoids stupid warnings
96
_asm
97
        mov     r2,dpl
98
#ifdef[MMC_bmMODE]
99
        mov     a,_MMC_IO
100
        anl     a, #(~MMC_bmCLK)
101
        mov     r3, a
102
        orl     a, #(MMC_bmCLK)
103
        mov     r4, a
104
010014$:
105
        mov     _MMC_IO,r4
106
        nop
107
        mov     _MMC_IO,r3
108
#else
109
010014$:
110
        setb    _MMC_CLK
111
        nop
112
        clr     _MMC_CLK
113
#endif
114
        djnz    r2,010014$
115
_endasm;
116 2 ZTEX
}
117
 
118 3 ZTEX
 
119 2 ZTEX
/* *********************************************************************
120 3 ZTEX
   ***** flash_read_byte ***********************************************
121
   ********************************************************************* */
122
// read a single byte from the flash
123
BYTE flash_read_byte() { // uses r2,r3,r4
124
_asm
125
#ifdef[MMC_bmMODE]
126
        // 8 - 1 + 8*13 + 1 + 6 = 118 clocks
127
        mov     a,_MMC_IO
128
        anl     a, #(~MMC_bmCLK)
129
        mov     r2, a
130
        orl     a, #(MMC_bmCLK)
131
        mov     r3, a
132
 
133
        mov     a,_MMC_IO       // 7
134
        anl     a,#(MMC_bmDO)
135
        mov     _MMC_IO, r3
136
        subb    a,#1
137
        rlc     a
138
        mov     r4,a
139
        mov     _MMC_IO, r2
140
 
141
        mov     a,_MMC_IO       // 6
142
        anl     a,#(MMC_bmDO)
143
        mov     _MMC_IO, r3
144
        subb    a,#1
145
        mov     a,r4
146
        rlc     a
147
        mov     r4,a
148
        mov     _MMC_IO, r2
149
 
150
        mov     a,_MMC_IO       // 5
151
        anl     a,#(MMC_bmDO)
152
        mov     _MMC_IO, r3
153
        subb    a,#1
154
        mov     a,r4
155
        rlc     a
156
        mov     r4,a
157
        mov     _MMC_IO, r2
158
 
159
        mov     a,_MMC_IO       // 4
160
        anl     a,#(MMC_bmDO)
161
        mov     _MMC_IO, r3
162
        subb    a,#1
163
        mov     a,r4
164
        rlc     a
165
        mov     r4,a
166
        mov     _MMC_IO, r2
167
 
168
        mov     a,_MMC_IO       // 3
169
        anl     a,#(MMC_bmDO)
170
        mov     _MMC_IO, r3
171
        subb    a,#1
172
        mov     a,r4
173
        rlc     a
174
        mov     r4,a
175
        mov     _MMC_IO, r2
176
 
177
        mov     a,_MMC_IO       // 2
178
        anl     a,#(MMC_bmDO)
179
        mov     _MMC_IO, r3
180
        subb    a,#1
181
        mov     a,r4
182
        rlc     a
183
        mov     r4,a
184
        mov     _MMC_IO, r2
185
 
186
        mov     a,_MMC_IO       // 1
187
        anl     a,#(MMC_bmDO)
188
        mov     _MMC_IO, r3
189
        subb    a,#1
190
        mov     a,r4
191
        rlc     a
192
        mov     r4,a
193
        mov     _MMC_IO, r2
194
 
195
        mov     a,_MMC_IO       // 0
196
        anl     a,#(MMC_bmDO)
197
        mov     _MMC_IO, r3
198
        subb    a,#1
199
        mov     a,r4
200
        rlc     a
201
        xrl     a,#255
202
        mov     _MMC_IO, r2
203
 
204
#else
205
        // 8*7 + 6 = 62 clocks 
206
        mov     c,_MMC_DO       // 7
207
        setb    _MMC_CLK
208
        rlc     a
209
        clr     _MMC_CLK
210
 
211
        mov     c,_MMC_DO       // 6
212
        setb    _MMC_CLK
213
        rlc     a
214
        clr     _MMC_CLK
215
 
216
        mov     c,_MMC_DO       // 5
217
        setb    _MMC_CLK
218
        rlc     a
219
        clr     _MMC_CLK
220
 
221
        mov     c,_MMC_DO       // 4
222
        setb    _MMC_CLK
223
        rlc     a
224
        clr     _MMC_CLK
225
 
226
        mov     c,_MMC_DO       // 3
227
        setb    _MMC_CLK
228
        rlc     a
229
        clr     _MMC_CLK
230
 
231
        mov     c,_MMC_DO       // 2
232
        setb    _MMC_CLK
233
        rlc     a
234
        clr     _MMC_CLK
235
 
236
        mov     c,_MMC_DO       // 1
237
        setb    _MMC_CLK
238
        rlc     a
239
        clr     _MMC_CLK
240
 
241
        mov     c,_MMC_DO       // 0
242
        setb    _MMC_CLK
243
        rlc     a
244
        clr     _MMC_CLK
245
#endif
246
        mov     dpl,a
247
        ret
248
_endasm;
249
        return 0;                // never ever called (just to avoid warnings)
250
}
251
 
252
/* *********************************************************************
253
   ***** flash_read ****************************************************
254
   ********************************************************************* */
255
// read len (256 if len=0) bytes from the flash to the buffer
256
void flash_read(__xdata BYTE *buf, BYTE len) {
257
        *buf;                                   // this avoids stupid warnings
258
        len;                                    // this too
259
_asm                                            // *buf is in dptr, len is in _flash_read_PARM_2
260
        mov     r2,_flash_read_PARM_2
261
#ifdef[MMC_bmMODE]
262
        mov     a,_MMC_IO
263
        anl     a, #(~MMC_bmCLK)
264
        mov     r5, a
265
        orl     a, #(MMC_bmCLK)
266
        mov     r3, a
267
 
268
010012$:
269
        // 8 + len*(-1 + 8*13 - 1 + 2 + 9) + 4 = 12 + len*113 clocks
270
        mov     a,_MMC_IO       // 7
271
        anl     a,#(MMC_bmDO)
272
        mov     _MMC_IO, r3
273
        subb    a,#1
274
        rlc     a
275
        mov     r4,a
276
        mov     _MMC_IO, r5
277
 
278
        mov     a,_MMC_IO       // 6
279
        anl     a,#(MMC_bmDO)
280
        mov     _MMC_IO, r3
281
        subb    a,#1
282
        mov     a,r4
283
        rlc     a
284
        mov     r4,a
285
        mov     _MMC_IO, r5
286
 
287
        mov     a,_MMC_IO       // 5
288
        anl     a,#(MMC_bmDO)
289
        mov     _MMC_IO, r3
290
        subb    a,#1
291
        mov     a,r4
292
        rlc     a
293
        mov     r4,a
294
        mov     _MMC_IO, r5
295
 
296
        mov     a,_MMC_IO       // 4
297
        anl     a,#(MMC_bmDO)
298
        mov     _MMC_IO, r3
299
        subb    a,#1
300
        mov     a,r4
301
        rlc     a
302
        mov     r4,a
303
        mov     _MMC_IO, r5
304
 
305
        mov     a,_MMC_IO       // 3
306
        anl     a,#(MMC_bmDO)
307
        mov     _MMC_IO, r3
308
        subb    a,#1
309
        mov     a,r4
310
        rlc     a
311
        mov     r4,a
312
        mov     _MMC_IO, r5
313
 
314
        mov     a,_MMC_IO       // 2
315
        anl     a,#(MMC_bmDO)
316
        mov     _MMC_IO, r3
317
        subb    a,#1
318
        mov     a,r4
319
        rlc     a
320
        mov     r4,a
321
        mov     _MMC_IO, r5
322
 
323
        mov     a,_MMC_IO       // 1
324
        anl     a,#(MMC_bmDO)
325
        mov     _MMC_IO, r3
326
        subb    a,#1
327
        mov     a,r4
328
        rlc     a
329
        mov     r4,a
330
        mov     _MMC_IO, r5
331
 
332
        mov     a,_MMC_IO       // 0
333
        anl     a,#(MMC_bmDO)
334
        mov     _MMC_IO, r3
335
        subb    a,#1
336
        mov     a,r4
337
        rlc     a
338
        xrl     a,#255
339
        mov     _MMC_IO, r5
340
#else
341
010012$:
342
        // 2 + len*(8*7 + 9) + 4 = 6 + len*65 clocks
343
        mov     c,_MMC_DO       // 7
344
        setb    _MMC_CLK
345
        rlc     a
346
        clr     _MMC_CLK
347
 
348
        mov     c,_MMC_DO       // 6
349
        setb    _MMC_CLK
350
        rlc     a
351
        clr     _MMC_CLK
352
 
353
        mov     c,_MMC_DO       // 5
354
        setb    _MMC_CLK
355
        rlc     a
356
        clr     _MMC_CLK
357
 
358
        mov     c,_MMC_DO       // 4
359
        setb    _MMC_CLK
360
        rlc     a
361
        clr     _MMC_CLK
362
 
363
        mov     c,_MMC_DO       // 3
364
        setb    _MMC_CLK
365
        rlc     a
366
        clr     _MMC_CLK
367
 
368
        mov     c,_MMC_DO       // 2
369
        setb    _MMC_CLK
370
        rlc     a
371
        clr     _MMC_CLK
372
 
373
        mov     c,_MMC_DO       // 1
374
        setb    _MMC_CLK
375
        rlc     a
376
        clr     _MMC_CLK
377
 
378
        mov     c,_MMC_DO       // 0
379
        setb    _MMC_CLK
380
        rlc     a
381
        clr     _MMC_CLK
382
#endif
383
        movx    @dptr,a
384
        inc     dptr
385
        djnz    r2,010012$
386
_endasm;
387
}
388
 
389
/* *********************************************************************
390
   ***** flash_write_byte **********************************************
391
   ********************************************************************* */
392
// send one bytes from buffer buf to the card
393
void flash_write_byte (BYTE b) {        // b is in dpl
394
        b;                              // this avoids stupid warnings
395
_asm
396
#ifdef[MMC_bmMODE]
397
        // up to 7 + 8*12 + 6 = 109 clocks
398
        mov     a,_MMC_IO
399
        anl     a, #(255 - MMC_bmCLK - MMC_bmDI )
400
        mov     r3, a
401
        mov     a,dpl
402
 
403
        rlc     a               // 7
404
        mov     _MMC_IO,r3
405
        jnc     0100157$
406
        orl     _MMC_IO, #(MMC_bmDI)
407
0100157$:
408
        orl     _MMC_IO, #(MMC_bmCLK)
409
 
410
        rlc     a               // 6
411
        mov     _MMC_IO,r3
412
        jnc     0100156$
413
        orl     _MMC_IO, #(MMC_bmDI)
414
0100156$:
415
        orl     _MMC_IO, #(MMC_bmCLK)
416
 
417
        rlc     a               // 5
418
        mov     _MMC_IO,r3
419
        jnc     0100155$
420
        orl     _MMC_IO, #(MMC_bmDI)
421
0100155$:
422
        orl     _MMC_IO, #(MMC_bmCLK)
423
 
424
        rlc     a               // 4
425
        mov     _MMC_IO,r3
426
        jnc     0100154$
427
        orl     _MMC_IO, #(MMC_bmDI)
428
0100154$:
429
        orl     _MMC_IO, #(MMC_bmCLK)
430
 
431
        rlc     a               // 3
432
        mov     _MMC_IO,r3
433
        jnc     0100153$
434
        orl     _MMC_IO, #(MMC_bmDI)
435
0100153$:
436
        orl     _MMC_IO, #(MMC_bmCLK)
437
 
438
        rlc     a               // 2
439
        mov     _MMC_IO,r3
440
        jnc     0100152$
441
        orl     _MMC_IO, #(MMC_bmDI)
442
0100152$:
443
        orl     _MMC_IO, #(MMC_bmCLK)
444
 
445
        rlc     a               // 1
446
        mov     _MMC_IO,r3
447
        jnc     0100151$
448
        orl     _MMC_IO, #(MMC_bmDI)
449
0100151$:
450
        orl     _MMC_IO, #(MMC_bmCLK)
451
 
452
        rlc     a               // 0
453
        mov     _MMC_IO,r3
454
        jnc     0100150$
455
        orl     _MMC_IO, #(MMC_bmDI)
456
0100150$:
457
        orl     _MMC_IO, #(MMC_bmCLK)
458
 
459
        mov     _MMC_IO,r3
460
#else
461
        // 3 + 8*7 + 4 = 63 clocks 
462
        mov     a,dpl
463
        rlc     a               // 7
464
 
465
        mov     _MMC_DI,c
466
        setb    _MMC_CLK
467
        rlc     a               // 6
468
        clr     _MMC_CLK
469
 
470
        mov     _MMC_DI,c
471
        setb    _MMC_CLK
472
        rlc     a               // 5
473
        clr     _MMC_CLK
474
 
475
        mov     _MMC_DI,c
476
        setb    _MMC_CLK
477
        rlc     a               // 4
478
        clr     _MMC_CLK
479
 
480
        mov     _MMC_DI,c
481
        setb    _MMC_CLK
482
        rlc     a               // 3
483
        clr     _MMC_CLK
484
 
485
        mov     _MMC_DI,c
486
        setb    _MMC_CLK
487
        rlc     a               // 2
488
        clr     _MMC_CLK
489
 
490
        mov     _MMC_DI,c
491
        setb    _MMC_CLK
492
        rlc     a               // 1
493
        clr     _MMC_CLK
494
 
495
        mov     _MMC_DI,c
496
        setb    _MMC_CLK
497
        rlc     a               // 0
498
        clr     _MMC_CLK
499
 
500
        mov     _MMC_DI,c
501
        setb    _MMC_CLK
502
        nop
503
        clr     _MMC_CLK
504
#endif  
505
_endasm;
506
}
507
 
508
/* *********************************************************************
509 2 ZTEX
   ***** flash_write ***************************************************
510
   ********************************************************************* */
511 3 ZTEX
// write len (256 id len=0) bytes from the buffer to the flash
512
void flash_write(__xdata BYTE *buf, BYTE len) {
513
        *buf;                                   // this avoids stupid warnings
514
        len;                                    // this too
515
_asm                                            // *buf is in dptr, len is in _flash_read_PARM_2
516
        mov     r2,_flash_read_PARM_2
517
#ifdef[MMC_bmMODE]
518
        // 7 + len*(2 + 8*12 + 7 ) + 6 = 13 + len*105 clocks
519
        mov     a,_MMC_IO
520
        anl     a, #(255 - MMC_bmCLK - MMC_bmDI )
521
        mov     r3, a
522
010013$:
523
        movx    a,@dptr
524
 
525
        rlc     a               // 7
526
        mov     _MMC_IO,r3
527
        jnc     0100167$
528
        orl     _MMC_IO, #(MMC_bmDI)
529
0100167$:
530
        orl     _MMC_IO, #(MMC_bmCLK)
531
 
532
        rlc     a               // 6
533
        mov     _MMC_IO,r3
534
        jnc     0100166$
535
        orl     _MMC_IO, #(MMC_bmDI)
536
0100166$:
537
        orl     _MMC_IO, #(MMC_bmCLK)
538
 
539
        rlc     a               // 5
540
        mov     _MMC_IO,r3
541
        jnc     0100165$
542
        orl     _MMC_IO, #(MMC_bmDI)
543
0100165$:
544
        orl     _MMC_IO, #(MMC_bmCLK)
545
 
546
        rlc     a               // 4
547
        mov     _MMC_IO,r3
548
        jnc     0100164$
549
        orl     _MMC_IO, #(MMC_bmDI)
550
0100164$:
551
        orl     _MMC_IO, #(MMC_bmCLK)
552
 
553
        rlc     a               // 3
554
        mov     _MMC_IO,r3
555
        jnc     0100163$
556
        orl     _MMC_IO, #(MMC_bmDI)
557
0100163$:
558
        orl     _MMC_IO, #(MMC_bmCLK)
559
 
560
        rlc     a               // 2
561
        mov     _MMC_IO,r3
562
        jnc     0100162$
563
        orl     _MMC_IO, #(MMC_bmDI)
564
0100162$:
565
        orl     _MMC_IO, #(MMC_bmCLK)
566
 
567
        rlc     a               // 1
568
        mov     _MMC_IO,r3
569
        jnc     0100161$
570
        orl     _MMC_IO, #(MMC_bmDI)
571
0100161$:
572
        orl     _MMC_IO, #(MMC_bmCLK)
573
 
574
        rlc     a               // 0
575
        mov     _MMC_IO,r3
576
        jnc     0100160$
577
        orl     _MMC_IO, #(MMC_bmDI)
578
0100160$:
579
        orl     _MMC_IO, #(MMC_bmCLK)
580
 
581
        inc     dptr
582
        djnz    r2,010013$
583
 
584
        mov     _MMC_IO,r3
585
#else
586
010013$:
587
        // 2 + len*(3 + 8*7 - 1 + 7 ) + 4 = 6 + len*65 clocks
588
        movx    a,@dptr
589
        rlc     a               // 7
590
 
591
        mov     _MMC_DI,c
592
        setb    _MMC_CLK
593
        rlc     a               // 6
594
        clr     _MMC_CLK
595
 
596
        mov     _MMC_DI,c
597
        setb    _MMC_CLK
598
        rlc     a               // 5
599
        clr     _MMC_CLK
600
 
601
        mov     _MMC_DI,c
602
        setb    _MMC_CLK
603
        rlc     a               // 4
604
        clr     _MMC_CLK
605
 
606
        mov     _MMC_DI,c
607
        setb    _MMC_CLK
608
        rlc     a               // 3
609
        clr     _MMC_CLK
610
 
611
        mov     _MMC_DI,c
612
        setb    _MMC_CLK
613
        rlc     a               // 2
614
        clr     _MMC_CLK
615
 
616
        mov     _MMC_DI,c
617
        setb    _MMC_CLK
618
        rlc     a               // 1
619
        clr     _MMC_CLK
620
 
621
        mov     _MMC_DI,c
622
        setb    _MMC_CLK
623
        rlc     a               // 0
624
        clr     _MMC_CLK
625
 
626
        mov     _MMC_DI,c
627
        setb    _MMC_CLK
628
        inc     dptr
629
        clr     _MMC_CLK
630
 
631
        djnz    r2,010013$
632
#endif
633
_endasm;
634
}
635
 
636
/* *********************************************************************
637
   ***** mmc_wait_busy *************************************************
638
   ********************************************************************* */
639
BYTE mmc_wait_busy () {
640
    WORD i;
641
    flash_ec = FLASH_EC_BUSY;
642
    MMC_IO |= MMC_bmDI;                         // avoids that in-data is interpreted as command
643
    for (i=0; (flash_read_byte()!=255) && i<65535; i++ ) ;
644
    if ( MMC_IO & MMC_bmDO ) {
645
        flash_ec = 0;
646
        return 0;
647
    }
648
    return 1;
649
}
650
 
651
/* *********************************************************************
652
   ***** mmc_select ****************************************************
653
   ********************************************************************* */
654
/*
655
   select the card (CS) and waits if busy
656
   returns 1 if busy
657 2 ZTEX
*/
658 3 ZTEX
BYTE mmc_select() {
659
    MMC_IO |= MMC_bmCS;                         // CS = 1
660
    mmc_clocks(8);                              // 8 dummy clocks to finish a previous command
661
    MMC_IO &= ~MMC_bmCS;                        // CS = 0
662
 
663
    return mmc_wait_busy();
664 2 ZTEX
}
665
 
666
/* *********************************************************************
667 3 ZTEX
   ***** mmc_deselect **************************************************
668 2 ZTEX
   ********************************************************************* */
669 3 ZTEX
// de-select the card (CS) and waits if busy
670
void mmc_deselect() {
671
    MMC_IO |= MMC_bmDI;                         // CS = 1
672
    mmc_clocks(8);                              // 8 dummy clocks to finish a previous command
673
    MMC_IO |= MMC_bmCS;                         // CS = 1
674
    mmc_clocks(8);                              // 8 more dummy clocks
675
}
676
 
677
/* *********************************************************************
678
   ***** mmc_read_response *********************************************
679
   ********************************************************************* */
680
// read the first response byte
681
BYTE mmc_read_response() {
682
        MMC_IO |= MMC_bmDI;                     // avoids that in-data is interpreted as command
683
_asm
684
        mov     r2,#0x255
685
010010$:
686
        lcall   _flash_read_byte
687
        mov     a,dpl
688
        jnb     acc.7,010011$
689
        djnz    r2, 010010$
690 2 ZTEX
 
691 3 ZTEX
010011$:
692
        mov     dptr,#_mmc_response
693
        movx    @dptr,a
694
        mov     dpl,a
695
        ret
696
_endasm;
697
        return 0;                                // never ever called, just to avoid stupid warnings
698
}
699
 
700
/* *********************************************************************
701
   ***** mmc_wait_start ************************************************
702
   ********************************************************************* */
703
/*
704
   wait for the start byte
705
   returns 1 on error
706
*/
707
BYTE mmc_wait_start() {
708
    WORD to;
709
    to=0;
710
    MMC_IO |= MMC_bmDI;                         // avoids that in-data is interpreted as command
711
    while ( flash_read_byte() != 0xfe ) {       // wait for the start byte
712
        if ( ++to == 0 )                         // 65536 * 8 clocks
713
            return 1;
714 2 ZTEX
    }
715 3 ZTEX
    return 0;
716
}
717
 
718
/* *********************************************************************
719
   ***** flash_read_init ***********************************************
720
   ********************************************************************* */
721
/*
722
   Start the initialization sequence for reading sector s-
723
   The whole sector must be read.
724
   returns an error code (FLASH_EC_*). 0 means no error.
725
*/
726
BYTE flash_read_init(DWORD s) {
727
    if ( (MMC_IO & MMC_bmCS) == 0 ) {
728
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
729
    }
730
    if ( mmc_select() ) {                       // select the card
731
        mmc_deselect();
732
        return FLASH_EC_BUSY;
733
    }
734
    mmc_last_cmd = 17;
735
    mmc_buffer[0] = 17 | 64;
736
    s = s << 1;
737
    mmc_buffer[1] = s >> 16;
738
    mmc_buffer[2] = s >> 8;
739
    mmc_buffer[3] = s;
740
    mmc_buffer[4] = 0;
741
    mmc_buffer[5] = 1;
742
    flash_write(mmc_buffer,6);
743
    mmc_read_response();
744
    if ( mmc_response != 0 ) {
745
        mmc_deselect();
746
        return FLASH_EC_CMD_ERROR;
747
    }
748
 
749
    if ( mmc_wait_start() ) {                   // wait for the start byte
750
        mmc_deselect();
751
        return FLASH_EC_TIMEOUT;
752
    }
753
    return 0;
754
}
755
 
756
/* *********************************************************************
757
   ***** flash_read_finish *********************************************
758
   ********************************************************************* */
759
/*
760
   Reads n dummy bytes (the whole sector has to be read out)
761
   and runs the finalization sequence for a sector read.
762
*/
763
void flash_read_finish(WORD n) {
764
    while ( n > 32 ) {
765
        mmc_clocks(0);                           // 256 clocks = 32 dummy bytes
766
        n-=32;
767
    }
768
    mmc_clocks(n << 3);
769
    mmc_clocks(24);                             // 16 CRC + 8 dummy clocks
770
    mmc_deselect();
771
}
772
 
773
 
774
/* *********************************************************************
775
   ***** flash_write_init **********************************************
776
   ********************************************************************* */
777
/*
778
   Start the initialization sequence for writing sector s
779
   The whole sectir must be written.
780
   returns an error code (FLASH_EC_*). 0 means no error.
781
*/
782
BYTE flash_write_init(DWORD s) {
783
    if ( (MMC_IO & MMC_bmCS) == 0 ) {
784
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
785
    }
786
    if ( mmc_select() ) {                       // select the card
787
        mmc_deselect();
788
        return FLASH_EC_BUSY;
789
    }
790
    mmc_clocks(8);
791
    mmc_last_cmd = 24;
792
    mmc_buffer[0] = 24 | 64;
793
    s = s << 1;
794
    mmc_buffer[1] = s >> 16;
795
    mmc_buffer[2] = s >> 8;
796
    mmc_buffer[3] = s;
797
    mmc_buffer[4] = 0;
798
    mmc_buffer[5] = 1;
799
    flash_write(mmc_buffer,6);
800
    mmc_read_response();
801
    if ( mmc_response != 0 ) {
802
        mmc_deselect();
803
        return FLASH_EC_CMD_ERROR;
804
    }
805
 
806
    MMC_IO |= MMC_bmDI;                                 // send one dummy byte plus the start byte 0xfe
807
    mmc_clocks(15);
808
    MMC_IO &= ~MMC_bmDI;
809
    MMC_IO |= MMC_bmCLK;
810
    MMC_IO &= ~MMC_bmCLK;
811
    return 0;
812
}
813
 
814
/* *********************************************************************
815
   ***** flash_write_finish ********************************************
816
   ********************************************************************* */
817
/*
818
   Writes n dummy bytes (the whole sector has to be written)
819
   and runs the finalization sequence for a sector write
820
   returns an error code (FLASH_EC_*). 0 means no error.
821
*/
822
BYTE flash_write_finish(WORD n) {
823
    BYTE b;
824
    MMC_IO &= ~MMC_bmDI;                        // value of the dummy data is 0
825
    while ( n > 32 ) {
826
        mmc_clocks(0);                           // 256 clocks = 32 dummy bytes
827
        n-=32;
828
    }
829
    mmc_clocks(n << 3);
830
 
831
    MMC_IO |= MMC_bmDI;
832
    mmc_clocks(16);                             // 16 CRC clocks
833
    b = flash_read_byte() & 7;
834
//    mmc_wait_busy();                          // not required here, programming continues if card is deslected
835
    mmc_deselect();
836
    if ( b != 5 ) {                             // data response, last three bits must be 5
837
        return FLASH_EC_WRITE_ERROR;
838
    }
839
    return 0;
840
}
841
 
842
/* *********************************************************************
843
   ***** mmc_send_cmd **************************************************
844
   ********************************************************************* */
845
// send a command   
846
#define[mmc_send_cmd(][,$1);][{                 // send a command, argument=0
847
    mmc_last_cmd = $0;
848
    mmc_buffer[0] = 64 | ($0 & 127);
849
    mmc_buffer[1] = 0;
850
    mmc_buffer[2] = 0;
851
    mmc_buffer[3] = 0;
852
    mmc_buffer[4] = 0;
853
    mmc_buffer[5] = $1 | 1;
854
    flash_write(mmc_buffer,6);
855
    mmc_read_response();
856
}]
857
 
858
/* *********************************************************************
859
   ***** flash_init ****************************************************
860
   ********************************************************************* */
861
// init the card
862
void flash_init() {
863
    BYTE i;
864
 
865
    flash_enabled = 1;
866
    flash_sector_size = 512;
867 2 ZTEX
 
868 3 ZTEX
    OEMMC_PORT = (OEMMC_PORT & ~MMC_bmDO) | ( MMC_bmCS | MMC_bmDI | MMC_bmCLK );
869
    MMC_IO |= MMC_bmDI;
870
    MMC_IO |= MMC_bmCS;
871
    mmc_clocks(0);                               // 256 clocks
872
 
873
    mmc_select();                               // select te card
874
    flash_ec = FLASH_EC_BUSY;
875
 
876
    mmc_send_cmd(0, 0x95);                       // send reset command
877
    if ( mmc_response & ~1 ) {                  // check for errors
878
        goto mmc_init_cmd_err;
879 2 ZTEX
    }
880
 
881 3 ZTEX
    for ( i=0; mmc_response != 0 && i<255; i++ ) {        // send the init command and wait wait (up to 1s) until ready
882
        wait(4);
883
        mmc_send_cmd(1, 0xff);
884
    }
885
    if ( mmc_response != 0 ) {                   // check for errors
886
        goto mmc_init_cmd_err;
887
    }
888
 
889
    mmc_send_cmd(9, 0);                          // read the CSD
890
    if ( mmc_wait_start() ) {
891
        flash_ec = FLASH_EC_TIMEOUT;
892
        goto mmc_init_err;
893
    }
894
    flash_read(mmc_buffer,16);
895
    mmc_clocks(16);                             // CRC is clocked out to nirvana
896
 
897
    i = (mmc_buffer[5] & 15) + ((mmc_buffer[10] >> 7) | ((mmc_buffer[9] & 3) << 1)) - 7;
898
    flash_sectors = ((mmc_buffer[8] >> 6) | (mmc_buffer[7] << 2) | ((mmc_buffer[6] & 3) << 10)) + 1;
899
    flash_sectors = flash_sectors << i;
900
 
901
    flash_ec = 0;
902
    mmc_deselect();
903
 
904
    return;
905
 
906
mmc_init_cmd_err:
907
    flash_ec = FLASH_EC_CMD_ERROR;
908
mmc_init_err:
909
    flash_enabled = 0;
910
    mmc_deselect();
911 2 ZTEX
}
912
 
913
 
914
/* *********************************************************************
915
   ***** EP0 vendor request 0x40 ***************************************
916
   ********************************************************************* */
917 3 ZTEX
// send mmc information structure (card size, error status,  ...) to the host
918 2 ZTEX
ADD_EP0_VENDOR_REQUEST((0x40,,
919 3 ZTEX
    MEM_COPY1(flash_enabled,EP0BUF,8);
920 2 ZTEX
    EP0BCH = 0;
921 3 ZTEX
    EP0BCL = 8;
922
,,
923
));;
924 2 ZTEX
 
925 3 ZTEX
/* *********************************************************************
926
   ***** EP0 vendor request 0x41 ***************************************
927
   ********************************************************************* */
928
void mmc_read_ep0 () {
929
    flash_read(EP0BUF, ep0_payload_transfer);
930
    if ( ep0_payload_remaining == 0 ) {
931
        mmc_clocks(24);                         // 16 CRC + 8 dummy clocks
932
        mmc_deselect();
933
    }
934
}
935
 
936
ADD_EP0_VENDOR_REQUEST((0x41,,                  // read (exactly) one sector
937
    if ( (MMC_IO & MMC_bmCS) == 0 ) {
938
        flash_ec = FLASH_EC_PENDING;            // we interrupted a pending Flash operation
939
        EP0_STALL;
940
    }
941
    if ( mmc_select() ) {                       // select the card
942
        mmc_deselect();
943
        EP0_STALL;
944
    }
945
    mmc_last_cmd = 17;
946
    mmc_buffer[0] = 17 | 64;
947
_asm
948
    clr c
949
    mov dptr,#(_SETUPDAT + 2)
950
    movx a,@dptr
951
    mov dptr,#(_mmc_buffer + 3)
952
    rlc a
953
    movx @dptr,a
954
 
955
    mov dptr,#(_SETUPDAT + 3)
956
    movx a,@dptr
957
    mov dptr,#(_mmc_buffer + 2)
958
    rlc a
959
    movx @dptr,a
960
 
961
    mov dptr,#(_SETUPDAT + 4)
962
    movx a,@dptr
963
    mov dptr,#(_mmc_buffer + 1)
964
    rlc a
965
    movx @dptr,a
966
_endasm;
967
    mmc_buffer[4] = 0;
968
    mmc_buffer[5] = 1;
969
    flash_write(mmc_buffer,6);
970
    mmc_read_response();
971
    if ( mmc_response != 0 ) {
972
        flash_ec = FLASH_EC_CMD_ERROR;
973
        mmc_deselect();
974
        EP0_STALL;
975
    }
976
 
977
    if ( mmc_wait_start() ) {                   // wait for the start byte
978
        flash_ec = FLASH_EC_TIMEOUT;
979
        mmc_deselect();
980
        EP0_STALL;
981
    }
982
 
983
    mmc_read_ep0();
984
    EP0BCH = 0;
985
    EP0BCL = ep0_payload_transfer;
986
,,
987
    if ( ep0_payload_transfer != 0 ) {
988
        mmc_read_ep0();
989
    }
990
    EP0BCH = 0;
991
    EP0BCL = ep0_payload_transfer;
992
));;
993
 
994
/* *********************************************************************
995
   ***** EP0 vendor command 0x42 ***************************************
996
   ********************************************************************* */
997
void mmc_send_ep0 () {
998
    flash_write(EP0BUF, ep0_payload_transfer);
999
    if ( ep0_payload_remaining == 0 ) {
1000
        MMC_IO |= MMC_bmDI;
1001
        mmc_clocks(16);                         // 16 CRC clocks
1002
        if ( (flash_read_byte() & 7) != 5 ) {   // data response, last three bits must be 5
1003
            flash_ec = FLASH_EC_WRITE_ERROR;
1004
        }
1005
//      mmc_wait_busy();                        // not required here, programming continues if card is deselected
1006
        mmc_deselect();
1007
    }
1008
}
1009
 
1010
ADD_EP0_VENDOR_COMMAND((0x42,,                  // write (exactly!) one sector
1011
    if ( (MMC_IO & MMC_bmCS) == 0 ) {
1012
        flash_ec = FLASH_EC_PENDING;            // we interrupted a pending Flash operation
1013
        EP0_STALL;
1014
    }
1015
    if ( mmc_select() ) {                       // select the card
1016
        mmc_deselect();
1017
        EP0_STALL;
1018
    }
1019
    mmc_last_cmd = 24;
1020
    mmc_buffer[0] = 24 | 64;
1021
_asm
1022
    clr c
1023
    mov dptr,#(_SETUPDAT + 2)
1024
    movx a,@dptr
1025
    mov dptr,#(_mmc_buffer + 3)
1026
    rlc a
1027
    movx @dptr,a
1028
 
1029
    mov dptr,#(_SETUPDAT + 3)
1030
    movx a,@dptr
1031
    mov dptr,#(_mmc_buffer + 2)
1032
    rlc a
1033
    movx @dptr,a
1034
 
1035
    mov dptr,#(_SETUPDAT + 4)
1036
    movx a,@dptr
1037
    mov dptr,#(_mmc_buffer + 1)
1038
    rlc a
1039
    movx @dptr,a
1040
_endasm;
1041
    mmc_buffer[4] = 0;
1042
    mmc_buffer[5] = 1;
1043
    flash_write(mmc_buffer,6);
1044
    mmc_read_response();
1045
    if ( mmc_response != 0 ) {
1046
        flash_ec = FLASH_EC_CMD_ERROR;
1047
        mmc_deselect();
1048
        EP0_STALL;
1049
    }
1050
 
1051
    MMC_IO |= MMC_bmDI;                                 // send one dummy byte plus the start byte 0xfe
1052
    mmc_clocks(15);
1053
    MMC_IO &= ~MMC_bmDI;
1054
    MMC_IO |= MMC_bmCLK;
1055
    MMC_IO &= ~MMC_bmCLK;
1056
,,
1057
    if ( ep0_payload_transfer != 0 ) {
1058
        flash_ec = 0;
1059
        mmc_send_ep0();
1060
        if ( flash_ec != 0 ) {
1061
            EP0_STALL;
1062
        }
1063
    }
1064
));;
1065
 
1066
/* *********************************************************************
1067
   ***** EP0 vendor request 0x43 ***************************************
1068
   ********************************************************************* */
1069
// send detailed MMC status plus debug information
1070
ADD_EP0_VENDOR_REQUEST((0x43,,                  // this may interrupt a pending operation
1071
    MEM_COPY1(flash_ec,EP0BUF+2,19);
1072
    EP0BUF[21] = (MMC_IO & MMC_bmDO) == 0;
1073
    mmc_select();
1074
    mmc_send_cmd(13, 0);
1075
    EP0BUF[0] = mmc_response;
1076
    EP0BUF[1] = flash_read_byte();
1077
    mmc_deselect();
1078
    EP0BCH = 0;
1079
    EP0BCL = 22;
1080
,,
1081
));;
1082
 
1083
#endif  /*ZTEX_FLASH1_H*/

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