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Subversion Repositories usb_fpga_1_2

[/] [usb_fpga_1_2/] [trunk/] [include/] [ztex.h] - Blame information for rev 5

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1 2 ZTEX 
/*!
2 
   ZTEX Firmware Kit for EZ-USB Microcontrollers
3 4 ZTEX 
   Copyright (C) 2009-2010 ZTEX e.K.
4 2 ZTEX 
   http://www.ztex.de
5 
 
6 
   This program is free software; you can redistribute it and/or modify
7 
   it under the terms of the GNU General Public License version 3 as
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   published by the Free Software Foundation.
9 
 
10 
   This program is distributed in the hope that it will be useful, but
11 
   WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 
   General Public License for more details.
14 
 
15 
   You should have received a copy of the GNU General Public License
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   along with this program; if not, see http://www.gnu.org/licenses/.
17 
!*/
18 
 
19 
/*
20 3 ZTEX 
   Puts everything together.
21 2 ZTEX 
*/
22 
 
23 
#ifndef[ZTEX_H]
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#define[ZTEX_H]
25 
 
26 4 ZTEX 
#define[INIT_CMDS;][]
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28 2 ZTEX 
/* *********************************************************************
29 
   ***** include the basic functions ***********************************
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   ********************************************************************* */
31 
#include[ztex-utils.h]
32 
 
33 
/* *********************************************************************
34 5 ZTEX 
   ***** EEPROM support and some I2C helper functions ******************
35 3 ZTEX 
   ********************************************************************* */
36 
#ifneq[EEPROM_DISABLED][1]
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#include[ztex-eeprom.h]
38 
#endif
39 
 
40 
/* *********************************************************************
41 2 ZTEX 
   ***** Flash memory support ******************************************
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   ********************************************************************* */
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#ifeq[FLASH_ENABLED][1]
44 3 ZTEX 
 
45 2 ZTEX 
#ifeq[PRODUCT_IS][UFM-1_1]
46 3 ZTEX 
#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
51 2 ZTEX 
#include[ztex-flash1.h]
52 3 ZTEX 
 
53 2 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_2]
54 3 ZTEX 
#define[MMC_PORT][E]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
59 2 ZTEX 
#include[ztex-flash1.h]
60 3 ZTEX 
 
61 
#elifeq[PRODUCT_IS][UM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
68 
 
69 5 ZTEX 
#elifeq[PRODUCT_IS][UM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
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77 4 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_10]
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#define[MMC_PORT][A]
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#define[MMC__PORT_DO][D]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_CLK][7]
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#include[ztex-flash1.h]
85 
 
86 
#elifeq[PRODUCT_IS][UFM-1_11]
87 3 ZTEX 
#define[MMC_PORT][C]
88 4 ZTEX 
#define[MMC__PORT_DO][D]
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#define[MMC_BIT_DO][0]
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#define[MMC_BIT_CS][5]
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#define[MMC_BIT_DI][7]
92 3 ZTEX 
#define[MMC_BIT_CLK][6]
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#include[ztex-flash1.h]
94 
 
95 5 ZTEX 
#elifeq[PRODUCT_IS][UXM-1_0]
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#define[MMC_PORT][C]
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#define[MMC_BIT_CS][7]
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#define[MMC_BIT_DI][6]
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#define[MMC_BIT_DO][4]
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#define[MMC_BIT_CLK][5]
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#include[ztex-flash1.h]
102 
 
103 2 ZTEX 
#else
104 5 ZTEX 
#warning[Flash memory access is not supported by this product]
105 2 ZTEX 
#define[FLASH_ENABLED][0]
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#endif
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#endif
108 
 
109 
/* *********************************************************************
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   ***** FPGA configuration support ************************************
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   ********************************************************************* */
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#ifeq[PRODUCT_IS][UFM-1_0]
113 4 ZTEX 
#include[ztex-fpga1.h]
114 2 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_1]
115 4 ZTEX 
#include[ztex-fpga1.h]
116 2 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_2]
117 4 ZTEX 
#include[ztex-fpga1.h]
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#elifeq[PRODUCT_IS][UFM-1_10]
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#include[ztex-fpga2.h]
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#elifeq[PRODUCT_IS][UFM-1_11]
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#include[ztex-fpga3.h]
122 2 ZTEX 
#endif
123 
 
124 5 ZTEX 
 
125 2 ZTEX 
/* *********************************************************************
126 5 ZTEX 
   ***** DEBUG helper functions ****************************************
127 
   ********************************************************************* */
128 
#ifeq[DEBUG_ENABLED][1]
129 
#include[ztex-debug.h]
130 
#endif
131 
 
132 
 
133 
/* *********************************************************************
134 
   ***** XMEGA support *************************************************
135 
   ********************************************************************* */
136 
#ifneq[XMEGA_DISABLED][1]
137 
#ifeq[PRODUCT_IS][UXM-1_0]
138 
#include[ztex-xmega.h]
139 
#endif
140 
#endif
141 
 
142 
 
143 
/* *********************************************************************
144 2 ZTEX 
   ***** define the descriptors and the interrupt routines *************
145 
   ********************************************************************* */
146 
#include[ztex-descriptors.h]
147 
#include[ztex-isr.h]
148 
 
149 
 
150 
/* *********************************************************************
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   ***** init_USB ******************************************************
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   ********************************************************************* */
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#define[EPXCFG(][);][    EP$0CFG =
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#ifeq[EP$0_DIR][IN]
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        bmBIT7 | bmBIT6
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#elifeq[EP$0_DIR][OUT]
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        bmBIT7
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#else
159 
 
160 
#endif
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#ifeq[EP$0_TYPE][BULK]
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        | bmBIT5
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#elifeq[EP$0_TYPE][ISO]
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        | bmBIT4
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#elifeq[EP$0_TYPE][INT]
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        | bmBIT5 | bmBIT4
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#endif
168 
#ifeq[EP$0_SIZE][1024]
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        | bmBIT3
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#endif
171 
#ifeq[EP$0_BUFFERS][2]
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        | bmBIT1
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#elifeq[EP$0_BUFFERS][3]
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        | bmBIT1 | bmBIT0
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#endif
176 
        ;
177 
        SYNCDELAY;
178 
]
179 
 
180 
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
181 
        EP$0CFG = bmBIT7 | bmBIT5;
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#elifeq[EP$0_TYPE][ISO]
183 
        EP$0CFG = bmBIT7 | bmBIT4;
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#elifeq[EP$0_TYPE][INT]
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        EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
186 
#else
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        EP$0CFG = 0;
188 
#endif
189 
        SYNCDELAY;
190 
]
191 
 
192 
void init_USB ()
193 
{
194 3 ZTEX 
    USBCS |= 0x08;
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196 2 ZTEX 
    CPUCS = bmBIT4 | bmBIT1;
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    CKCON &= ~7;
198 
 
199 3 ZTEX 
#ifeq[PRODUCT_IS][UFM-1_0]
200 2 ZTEX 
    IOA1 = 1;
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    OEA |= bmBIT1;
202 3 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_1]
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    IOA1 = 1;
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    OEA |= bmBIT1;
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#elifeq[PRODUCT_IS][UFM-1_2]
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    IOA1 = 1;
207 
    OEA |= bmBIT1;
208 4 ZTEX 
#elifeq[PRODUCT_IS][UFM-1_10]
209 
    IOA1 = 1;
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    OEA |= bmBIT1;
211 
#elifeq[PRODUCT_IS][UFM-1_11]
212 
    IOA1 = 1;
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    OEA |= bmBIT1;
214 3 ZTEX 
#endif
215 4 ZTEX 
 
216 
    INIT_CMDS;
217 
 
218 2 ZTEX 
    EA = 0;
219 3 ZTEX 
    EUSB = 0;
220 2 ZTEX 
 
221 
    ENABLE_AVUSB;
222 
 
223 
    INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
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    INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
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    INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
226 
    INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
227 
    INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
228 
    INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
229 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
230 
 
231 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
232 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
233 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
234 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
235 
    INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
236 
    INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
237 
    INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
238 
    INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
239 
 
240 
    EXIF &= ~bmBIT4;
241 
    USBIRQ = 0x7f;
242 
    USBIE |= 0x7f;
243 
    EPIRQ = 0xff;
244 
    EPIE = 0xff;
245 
 
246 
    EUSB = 1;
247 
    EA = 1;
248 
 
249 
    EP1XCFG(1IN);
250 
    EP1XCFG(1OUT);
251 
    EPXCFG(2);
252 
    EPXCFG(4);
253 
    EPXCFG(6);
254 
    EPXCFG(8);
255 3 ZTEX 
 
256 
#ifeq[FLASH_ENABLED][1]
257 
    flash_init();
258 
#endif
259 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
260 
    fpga_configure_from_flash_init();
261 
#endif
262 5 ZTEX 
#ifeq[DEBUG_ENABLED][1]
263 
    debug_init();
264 
#endif
265 
#ifeq[XMEGA_ENABLED][1]
266 
//    xmega_init();
267 
#endif
268 3 ZTEX 
 
269 5 ZTEX 
 
270 3 ZTEX 
    USBCS |= bmBIT7 | bmBIT1;
271 
    wait(250);
272 
    USBCS &= ~0x08;
273 2 ZTEX 
}
274 
 
275 3 ZTEX 
 
276 2 ZTEX 
#endif   /* ZTEX_H */

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