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[/] [usb_fpga_1_2/] [trunk/] [include/] [ztex.h] - Blame information for rev 8

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/*!
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
   Copyright (C) 2009-2011 ZTEX GmbH.
   http://www.ztex.de
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License version 3 as
   published by the Free Software Foundation.
 
   This program is distributed in the hope that it will be useful, but
   WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
   General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
   Puts everything together.
*/
 
#ifndef[ZTEX_H]
#define[ZTEX_H]
 
#define[INIT_CMDS;][]
 
/* *********************************************************************
   ***** include the basic functions ***********************************
   ********************************************************************* */
#include[ztex-utils.h]
 
/* *********************************************************************
   ***** EEPROM support and some I2C helper functions ******************
   ********************************************************************* */
#ifneq[EEPROM_DISABLED][1]
 
#ifneq[EEPROM_MAC_DISABLED][1]
#ifeq[PRODUCT_IS][UFM-1_15]
#define[MAC_EEPROM_ENABLED]
#endif // PRODUCT_IS=UFM-1_15
#endif // EEPROM_MAC_DISABLED
 
#include[ztex-eeprom.h]
 
#endif // EEPROM_DISABLED
 
 
/* *********************************************************************
   ***** Flash memory support ******************************************
   ********************************************************************* */
#ifeq[FLASH_ENABLED][1]
 
#ifeq[PRODUCT_IS][UFM-1_1]
#define[MMC_PORT][E]
#define[MMC_BIT_CS][7]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UFM-1_2]
#define[MMC_PORT][E]
#define[MMC_BIT_CS][7]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UM-1_0]
#define[MMC_PORT][C]
#define[MMC_BIT_CS][7]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UM-1_0]
#define[MMC_PORT][C]
#define[MMC_BIT_CS][7]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UFM-1_10]
#define[MMC_PORT][A]
#define[MMC__PORT_DO][D]
#define[MMC_BIT_DO][0]
#define[MMC_BIT_CS][5]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_CLK][7]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UFM-1_11]
#define[MMC_PORT][C]
#define[MMC__PORT_DO][D]
#define[MMC_BIT_DO][0]
#define[MMC_BIT_CS][5]
#define[MMC_BIT_DI][7]
#define[MMC_BIT_CLK][6]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UFM-1_15]
#define[MMC_PORT][C]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CS][5]
#define[MMC_BIT_DI][7]
#define[MMC_BIT_CLK][6]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UXM-1_0]
#define[MMC_PORT][C]
#define[MMC_BIT_CS][7]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_DO][4]
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#else
#warning[Flash memory access is not supported by this product]
#define[FLASH_ENABLED][0]
#endif
#endif
 
/* *********************************************************************
   ***** FPGA configuration support ************************************
   ********************************************************************* */
#ifeq[PRODUCT_IS][UFM-1_0]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_1]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_2]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_10]
#include[ztex-fpga2.h]
#elifeq[PRODUCT_IS][UFM-1_11]
#include[ztex-fpga3.h]
#elifeq[PRODUCT_IS][UFM-1_15]
#include[ztex-fpga4.h]
#endif
 
 
/* *********************************************************************
   ***** DEBUG helper functions ****************************************
   ********************************************************************* */
#ifeq[DEBUG_ENABLED][1]
#include[ztex-debug.h]
#endif
 
 
/* *********************************************************************
   ***** XMEGA support *************************************************
   ********************************************************************* */
#ifneq[XMEGA_DISABLED][1]
 
#ifeq[PRODUCT_IS][UXM-1_0]
#define[PDI_PORT][A]
#define[PDI_BIT_CLK][0]
#define[PDI_BIT_DATA][1]
#include[ztex-xmega.h]
#endif
 
#ifeq[EXP_1_10_ENABLED][1]
#ifneq[PRODUCT_IS][UFM-1_0]
#elifneq[PRODUCT_IS][UFM-1_1]
#elifneq[PRODUCT_IS][UFM-1_2]
#elifneq[PRODUCT_IS][UFM-1_10]
#elifneq[PRODUCT_IS][UFM-1_11]
#elifneq[PRODUCT_IS][UFM-1_15]
#warning[ZTEX Experimental Board 1.10 is not supported by this product.]
#endif
#define[PDI_PORT][E]
#define[PDI_BIT_CLK][5]
#define[PDI_BIT_DATA][4]
#include[ztex-xmega.h]
#endif
 
#endif
 
/* *********************************************************************
   ***** define the descriptors and the interrupt routines *************
   ********************************************************************* */
#include[ztex-descriptors.h]
#include[ztex-isr.h]
 
 
#ifdef[@CAPABILITY_MAC_EEPROM;]
/* *********************************************************************
   ***** mac_eeprom_init ***********************************************
   ********************************************************************* */
void mac_eeprom_init ( ) {
    BYTE b,c,d;
    xdata BYTE buf[5];
    __code char hexdigits[] = "0123456789ABCDEF";
 
    for (b=0; b<10; b++) {       // abort if SN != "0000000000"
        if ( SN_STRING[b] != '0' )
            return;
    }
 
    mac_eeprom_read ( buf, 0xfb, 5 );   // read the last 5 MAC digits
 
    c=0;
    for (b=0; b<5; b++) {        // convert to MAC to SN string
        d = buf[b];
        SN_STRING[c] = hexdigits[d>>4];
        c++;
        SN_STRING[c] = hexdigits[d & 15];
        c++;
    }
}
#endif
 
 
/* *********************************************************************
   ***** init_USB ******************************************************
   ********************************************************************* */
#define[EPXCFG(][);][    EP$0CFG = 
#ifeq[EP$0_DIR][IN]
        bmBIT7 | bmBIT6
#elifeq[EP$0_DIR][OUT]
        bmBIT7
#else
 
#endif
#ifeq[EP$0_TYPE][BULK]
        | bmBIT5
#elifeq[EP$0_TYPE][ISO]
        | bmBIT4
#elifeq[EP$0_TYPE][INT]
        | bmBIT5 | bmBIT4
#endif
#ifeq[EP$0_SIZE][1024]
        | bmBIT3
#endif
#ifeq[EP$0_BUFFERS][2]
        | bmBIT1
#elifeq[EP$0_BUFFERS][3]
        | bmBIT1 | bmBIT0
#endif  
        ;
        SYNCDELAY;
]
 
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
        EP$0CFG = bmBIT7 | bmBIT5;
#elifeq[EP$0_TYPE][ISO]
        EP$0CFG = bmBIT7 | bmBIT4;
#elifeq[EP$0_TYPE][INT]
        EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
#else   
        EP$0CFG = 0;
#endif
        SYNCDELAY;
]
 
void init_USB ()
{
    USBCS |= 0x08;
 
    CPUCS = bmBIT4 | bmBIT1;
    wait(2);
    CKCON &= ~7;
 
#ifeq[PRODUCT_IS][UFM-1_0]
    IOA1 = 1;
    OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_1]
    IOA1 = 1;
    OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_2]
    IOA1 = 1;
    OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_10]
    IOA1 = 1;
    OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_11]
    IOA1 = 1;
    OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_15]
    IOA1 = 1;
    OEA |= bmBIT1;
#endif
 
    INIT_CMDS;
 
    EA = 0;
    EUSB = 0;
 
    ENABLE_AVUSB;
 
    INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
    INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
 
    EXIF &= ~bmBIT4;
    USBIRQ = 0x7f;
    USBIE |= 0x7f;
    EPIRQ = 0xff;
    EPIE = 0xff;
 
    EUSB = 1;
    EA = 1;
 
    EP1XCFG(1IN);
    EP1XCFG(1OUT);
    EPXCFG(2);
    EPXCFG(4);
    EPXCFG(6);
    EPXCFG(8);
 
#ifeq[FLASH_ENABLED][1]
    flash_init();
#endif
#ifeq[FLASH_BITSTREAM_ENABLED][1]
    fpga_configure_from_flash_init();
#endif
#ifeq[DEBUG_ENABLED][1]
    debug_init();
#endif
#ifeq[XMEGA_ENABLED][1]
    xmega_init();
#endif
#ifdef[@CAPABILITY_MAC_EEPROM;]
    mac_eeprom_init();
#endif
 
 
    USBCS |= bmBIT7 | bmBIT1;
    wait(10);
//    wait(250);
    USBCS &= ~0x08;
}
 
 
#endif   /* ZTEX_H */

Line No.	Rev	Author	Line
1	2	ZTEX	`/*!`
2	8	ZTEX	`ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers`
3			`Copyright (C) 2009-2011 ZTEX GmbH.`
4	2	ZTEX	`http://www.ztex.de`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License version 3 as`
8			`published by the Free Software Foundation.`
9
10			`This program is distributed in the hope that it will be useful, but`
11			`WITHOUT ANY WARRANTY; without even the implied warranty of`
12			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
13			`General Public License for more details.`
14
15			`You should have received a copy of the GNU General Public License`
16			`along with this program; if not, see http://www.gnu.org/licenses/.`
17			`!*/`
18
19			`/*`
20	3	ZTEX	`Puts everything together.`
21	2	ZTEX	`*/`
22
23			`#ifndef[ZTEX_H]`
24			`#define[ZTEX_H]`
25
26	4	ZTEX	`#define[INIT_CMDS;][]`
27
28	2	ZTEX	`/* *********************************************************************`
29			`*** include the basic functions *********************************`
30			`********************************************************************* */`
31			`#include[ztex-utils.h]`
32
33			`/* *********************************************************************`
34	5	ZTEX	`*** EEPROM support and some I2C helper functions ****************`
35	3	ZTEX	`********************************************************************* */`
36			`#ifneq[EEPROM_DISABLED][1]`
37	8	ZTEX
38			`#ifneq[EEPROM_MAC_DISABLED][1]`
39			`#ifeq[PRODUCT_IS][UFM-1_15]`
40			`#define[MAC_EEPROM_ENABLED]`
41			`#endif // PRODUCT_IS=UFM-1_15`
42			`#endif // EEPROM_MAC_DISABLED`
43
44	3	ZTEX	`#include[ztex-eeprom.h]`
45
46	8	ZTEX	`#endif // EEPROM_DISABLED`
47
48
49	3	ZTEX	`/* *********************************************************************`
50	2	ZTEX	`*** Flash memory support ****************************************`
51			`********************************************************************* */`
52			`#ifeq[FLASH_ENABLED][1]`
53	3	ZTEX
54	2	ZTEX	`#ifeq[PRODUCT_IS][UFM-1_1]`
55	3	ZTEX	`#define[MMC_PORT][E]`
56			`#define[MMC_BIT_CS][7]`
57			`#define[MMC_BIT_DI][6]`
58			`#define[MMC_BIT_DO][4]`
59			`#define[MMC_BIT_CLK][5]`
60	2	ZTEX	`#include[ztex-flash1.h]`
61	3	ZTEX
62	2	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_2]`
63	3	ZTEX	`#define[MMC_PORT][E]`
64			`#define[MMC_BIT_CS][7]`
65			`#define[MMC_BIT_DI][6]`
66			`#define[MMC_BIT_DO][4]`
67			`#define[MMC_BIT_CLK][5]`
68	2	ZTEX	`#include[ztex-flash1.h]`
69	3	ZTEX
70			`#elifeq[PRODUCT_IS][UM-1_0]`
71			`#define[MMC_PORT][C]`
72			`#define[MMC_BIT_CS][7]`
73			`#define[MMC_BIT_DI][6]`
74			`#define[MMC_BIT_DO][4]`
75			`#define[MMC_BIT_CLK][5]`
76			`#include[ztex-flash1.h]`
77
78	5	ZTEX	`#elifeq[PRODUCT_IS][UM-1_0]`
79			`#define[MMC_PORT][C]`
80			`#define[MMC_BIT_CS][7]`
81			`#define[MMC_BIT_DI][6]`
82			`#define[MMC_BIT_DO][4]`
83			`#define[MMC_BIT_CLK][5]`
84			`#include[ztex-flash1.h]`
85
86	4	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_10]`
87			`#define[MMC_PORT][A]`
88			`#define[MMC__PORT_DO][D]`
89			`#define[MMC_BIT_DO][0]`
90			`#define[MMC_BIT_CS][5]`
91			`#define[MMC_BIT_DI][6]`
92			`#define[MMC_BIT_CLK][7]`
93			`#include[ztex-flash1.h]`
94
95			`#elifeq[PRODUCT_IS][UFM-1_11]`
96	3	ZTEX	`#define[MMC_PORT][C]`
97	4	ZTEX	`#define[MMC__PORT_DO][D]`
98			`#define[MMC_BIT_DO][0]`
99			`#define[MMC_BIT_CS][5]`
100			`#define[MMC_BIT_DI][7]`
101	3	ZTEX	`#define[MMC_BIT_CLK][6]`
102			`#include[ztex-flash1.h]`
103
104	8	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_15]`
105			`#define[MMC_PORT][C]`
106			`#define[MMC_BIT_DO][4]`
107			`#define[MMC_BIT_CS][5]`
108			`#define[MMC_BIT_DI][7]`
109			`#define[MMC_BIT_CLK][6]`
110			`#include[ztex-flash1.h]`
111
112	5	ZTEX	`#elifeq[PRODUCT_IS][UXM-1_0]`
113			`#define[MMC_PORT][C]`
114			`#define[MMC_BIT_CS][7]`
115			`#define[MMC_BIT_DI][6]`
116			`#define[MMC_BIT_DO][4]`
117			`#define[MMC_BIT_CLK][5]`
118			`#include[ztex-flash1.h]`
119
120	2	ZTEX	`#else`
121	5	ZTEX	`#warning[Flash memory access is not supported by this product]`
122	2	ZTEX	`#define[FLASH_ENABLED][0]`
123			`#endif`
124			`#endif`
125
126			`/* *********************************************************************`
127			`*** FPGA configuration support **********************************`
128			`********************************************************************* */`
129			`#ifeq[PRODUCT_IS][UFM-1_0]`
130	4	ZTEX	`#include[ztex-fpga1.h]`
131	2	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_1]`
132	4	ZTEX	`#include[ztex-fpga1.h]`
133	2	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_2]`
134	4	ZTEX	`#include[ztex-fpga1.h]`
135			`#elifeq[PRODUCT_IS][UFM-1_10]`
136			`#include[ztex-fpga2.h]`
137			`#elifeq[PRODUCT_IS][UFM-1_11]`
138			`#include[ztex-fpga3.h]`
139	8	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_15]`
140			`#include[ztex-fpga4.h]`
141	2	ZTEX	`#endif`
142
143	5	ZTEX
144	2	ZTEX	`/* *********************************************************************`
145	5	ZTEX	`*** DEBUG helper functions **************************************`
146			`********************************************************************* */`
147			`#ifeq[DEBUG_ENABLED][1]`
148			`#include[ztex-debug.h]`
149			`#endif`
150
151
152			`/* *********************************************************************`
153			`*** XMEGA support ***********************************************`
154			`********************************************************************* */`
155			`#ifneq[XMEGA_DISABLED][1]`
156	8	ZTEX
157	5	ZTEX	`#ifeq[PRODUCT_IS][UXM-1_0]`
158	8	ZTEX	`#define[PDI_PORT][A]`
159			`#define[PDI_BIT_CLK][0]`
160			`#define[PDI_BIT_DATA][1]`
161	5	ZTEX	`#include[ztex-xmega.h]`
162			`#endif`
163	8	ZTEX
164			`#ifeq[EXP_1_10_ENABLED][1]`
165			`#ifneq[PRODUCT_IS][UFM-1_0]`
166			`#elifneq[PRODUCT_IS][UFM-1_1]`
167			`#elifneq[PRODUCT_IS][UFM-1_2]`
168			`#elifneq[PRODUCT_IS][UFM-1_10]`
169			`#elifneq[PRODUCT_IS][UFM-1_11]`
170			`#elifneq[PRODUCT_IS][UFM-1_15]`
171			`#warning[ZTEX Experimental Board 1.10 is not supported by this product.]`
172	5	ZTEX	`#endif`
173	8	ZTEX	`#define[PDI_PORT][E]`
174			`#define[PDI_BIT_CLK][5]`
175			`#define[PDI_BIT_DATA][4]`
176			`#include[ztex-xmega.h]`
177			`#endif`
178	5	ZTEX
179	8	ZTEX	`#endif`
180	5	ZTEX
181			`/* *********************************************************************`
182	2	ZTEX	`*** define the descriptors and the interrupt routines ***********`
183			`********************************************************************* */`
184			`#include[ztex-descriptors.h]`
185			`#include[ztex-isr.h]`
186
187
188	8	ZTEX	`#ifdef[@CAPABILITY_MAC_EEPROM;]`
189	2	ZTEX	`/* *********************************************************************`
190	8	ZTEX	`*** mac_eeprom_init *********************************************`
191			`********************************************************************* */`
192			`void mac_eeprom_init ( ) {`
193			`BYTE b,c,d;`
194			`xdata BYTE buf[5];`
195			`__code char hexdigits[] = "0123456789ABCDEF";`
196
197			`for (b=0; b<10; b++) { // abort if SN != "0000000000"`
198			`if ( SN_STRING[b] != '0' )`
199			`return;`
200			`}`
201
202			`mac_eeprom_read ( buf, 0xfb, 5 ); // read the last 5 MAC digits`
203
204			`c=0;`
205			`for (b=0; b<5; b++) { // convert to MAC to SN string`
206			`d = buf[b];`
207			`SN_STRING[c] = hexdigits[d>>4];`
208			`c++;`
209			`SN_STRING[c] = hexdigits[d & 15];`
210			`c++;`
211			`}`
212			`}`
213			`#endif`
214
215
216			`/* *********************************************************************`
217	2	ZTEX	`*** init_USB ****************************************************`
218			`********************************************************************* */`
219			`#define[EPXCFG(][);][ EP$0CFG =`
220			`#ifeq[EP$0_DIR][IN]`
221			`bmBIT7 \| bmBIT6`
222			`#elifeq[EP$0_DIR][OUT]`
223			`bmBIT7`
224			`#else`
225
226			`#endif`
227			`#ifeq[EP$0_TYPE][BULK]`
228			`\| bmBIT5`
229			`#elifeq[EP$0_TYPE][ISO]`
230			`\| bmBIT4`
231			`#elifeq[EP$0_TYPE][INT]`
232			`\| bmBIT5 \| bmBIT4`
233			`#endif`
234			`#ifeq[EP$0_SIZE][1024]`
235			`\| bmBIT3`
236			`#endif`
237			`#ifeq[EP$0_BUFFERS][2]`
238			`\| bmBIT1`
239			`#elifeq[EP$0_BUFFERS][3]`
240			`\| bmBIT1 \| bmBIT0`
241			`#endif`
242			`;`
243			`SYNCDELAY;`
244			`]`
245
246			`#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]`
247			`EP$0CFG = bmBIT7 \| bmBIT5;`
248			`#elifeq[EP$0_TYPE][ISO]`
249			`EP$0CFG = bmBIT7 \| bmBIT4;`
250			`#elifeq[EP$0_TYPE][INT]`
251			`EP$0CFG = bmBIT7 \| bmBIT5 \| bmBIT4;`
252			`#else`
253			`EP$0CFG = 0;`
254			`#endif`
255			`SYNCDELAY;`
256			`]`
257
258			`void init_USB ()`
259			`{`
260	3	ZTEX	`USBCS \|= 0x08;`
261
262	2	ZTEX	`CPUCS = bmBIT4 \| bmBIT1;`
263	8	ZTEX	`wait(2);`
264	2	ZTEX	`CKCON &= ~7;`
265
266	3	ZTEX	`#ifeq[PRODUCT_IS][UFM-1_0]`
267	2	ZTEX	`IOA1 = 1;`
268			`OEA \|= bmBIT1;`
269	3	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_1]`
270			`IOA1 = 1;`
271			`OEA \|= bmBIT1;`
272			`#elifeq[PRODUCT_IS][UFM-1_2]`
273			`IOA1 = 1;`
274			`OEA \|= bmBIT1;`
275	4	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_10]`
276			`IOA1 = 1;`
277			`OEA \|= bmBIT1;`
278			`#elifeq[PRODUCT_IS][UFM-1_11]`
279			`IOA1 = 1;`
280			`OEA \|= bmBIT1;`
281	8	ZTEX	`#elifeq[PRODUCT_IS][UFM-1_15]`
282			`IOA1 = 1;`
283			`OEA \|= bmBIT1;`
284	3	ZTEX	`#endif`
285	4	ZTEX
286			`INIT_CMDS;`
287
288	2	ZTEX	`EA = 0;`
289	3	ZTEX	`EUSB = 0;`
290	2	ZTEX
291			`ENABLE_AVUSB;`
292
293			`INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);`
294			`INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);`
295			`INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);`
296			`INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);`
297			`INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);`
298			`INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);`
299			`INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);`
300
301			`INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);`
302			`INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);`
303			`INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);`
304			`INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);`
305			`INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);`
306			`INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);`
307			`INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);`
308			`INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);`
309
310			`EXIF &= ~bmBIT4;`
311			`USBIRQ = 0x7f;`
312			`USBIE \|= 0x7f;`
313			`EPIRQ = 0xff;`
314			`EPIE = 0xff;`
315
316			`EUSB = 1;`
317			`EA = 1;`
318
319			`EP1XCFG(1IN);`
320			`EP1XCFG(1OUT);`
321			`EPXCFG(2);`
322			`EPXCFG(4);`
323			`EPXCFG(6);`
324			`EPXCFG(8);`
325	3	ZTEX
326			`#ifeq[FLASH_ENABLED][1]`
327			`flash_init();`
328			`#endif`
329			`#ifeq[FLASH_BITSTREAM_ENABLED][1]`
330			`fpga_configure_from_flash_init();`
331			`#endif`
332	5	ZTEX	`#ifeq[DEBUG_ENABLED][1]`
333			`debug_init();`
334			`#endif`
335			`#ifeq[XMEGA_ENABLED][1]`
336	8	ZTEX	`xmega_init();`
337	5	ZTEX	`#endif`
338	8	ZTEX	`#ifdef[@CAPABILITY_MAC_EEPROM;]`
339			`mac_eeprom_init();`
340			`#endif`
341	3	ZTEX
342	5	ZTEX
343	3	ZTEX	`USBCS \|= bmBIT7 \| bmBIT1;`
344	8	ZTEX	`wait(10);`
345			`// wait(250);`
346	3	ZTEX	`USBCS &= ~0x08;`
347	2	ZTEX	`}`
348
349	3	ZTEX
350	2	ZTEX	`#endif /* ZTEX_H */`

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[/] [usb_fpga_1_2/] [trunk/] [include/] [ztex.h] - Blame information for rev 8