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[/] [usb_fpga_2_14/] [trunk/] [default/] [fpga-fx3/] [ezusb_io.cydsn/] [cyfxgpif2config.h] - Blame information for rev 2

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1 2 ZTEX 
/*
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 * Project Name: ezusb_io.cyfx
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 * Time : 01/24/2016 12:01:18
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 * Device Type: FX3
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 * Project Type: GPIF2
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 *
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 *
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 *
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 *
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 * This is a generated file and should not be modified
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 * This file need to be included only once in the firmware
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 * This file is generated by Gpif2 designer tool version - 1.0.837.1
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 *
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 */
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#ifndef _INCLUDED_CYFXGPIF2CONFIG_
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#define _INCLUDED_CYFXGPIF2CONFIG_
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#include "cyu3types.h"
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#include "cyu3gpif.h"
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/* Summary
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   Number of states in the state machine
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 */
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#define CY_NUMBER_OF_STATES 6
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/* Summary
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   Mapping of user defined state names to state indices
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 */
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#define RESET 0
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#define IDLE 1
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#define READ 2
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#define WRITE 3
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#define SHORT_PKT 4
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#define ZLP 5
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/* Summary
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   Initial value of early outputs from the state machine.
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 */
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#define ALPHA_RESET 0x0
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/* Summary
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   Transition function values used in the state machine.
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 */
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uint16_t CyFxGpifTransition[]  = {
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    0x0000, 0xAAAA, 0x5555, 0x1111, 0x8888, 0x7777
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};
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/* Summary
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   Table containing the transition information for various states.
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   This table has to be stored in the WAVEFORM Registers.
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   This array consists of non-replicated waveform descriptors and acts as a
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   waveform table.
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 */
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CyU3PGpifWaveData CyFxGpifWavedata[]  = {
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    {{0x1E738301,0x040100C4,0x80000000},{0x00000000,0x00000000,0x00000000}},
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    {{0x2E738302,0x04000000,0x80000000},{0x00000000,0x00000000,0x00000000}},
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    {{0x1E738301,0x040100C4,0x80000000},{0x5E702004,0x20000000,0xC0100000}},
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    {{0x00000000,0x00000000,0x00000000},{0x00000000,0x00000000,0x00000000}},
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    {{0x00000000,0x00000000,0x00000000},{0x2E738005,0x00000000,0xC0100000}},
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    {{0x00000000,0x00000000,0x00000000},{0x3E702003,0x20010008,0x80000000}},
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    {{0x00000000,0x00000000,0x00000000},{0x5E702004,0x20000000,0xC0100000}}
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};
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/* Summary
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   Table that maps state indices to the descriptor table indices.
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 */
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uint8_t CyFxGpifWavedataPosition[]  = {
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    0,1,0,2,0,0,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    0,4,0,2,0,0,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    0,5,0,2,0,0,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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    0,6,0,2,0,0
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};
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/* Summary
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   GPIF II configuration register values.
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 */
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uint32_t CyFxGpifRegValue[]  = {
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    0x800083B0,  /*  CY_U3P_PIB_GPIF_CONFIG */
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    0x00001467,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG */
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    0x01000002,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG2 */
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    0x00000044,  /*  CY_U3P_PIB_GPIF_AD_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_STATUS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR_MASK */
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    0x00000082,  /*  CY_U3P_PIB_GPIF_SERIAL_IN_CONFIG */
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    0x00000782,  /*  CY_U3P_PIB_GPIF_SERIAL_OUT_CONFIG */
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    0x00000500,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DIRECTION */
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    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DEFAULT */
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    0x0000003F,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_POLARITY */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_TOGGLE */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000011,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000010,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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    0x00000006,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_RESET */
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    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_LIMIT */
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    0x0000010A,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_RESET */
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    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_LIMIT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_CONFIG */
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    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_LIMIT */
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    0x0000010A,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_RESET */
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    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_LIMIT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_VALUE */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_MASK */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_VALUE */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_MASK */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_VALUE */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_MASK */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_CTRL */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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    0x80010400,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
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    0x80010401,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
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    0x80010402,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
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    0x80010403,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_LAMBDA_STAT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_ALPHA_STAT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_BETA_STAT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_CTRL_STAT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH_TIMEOUT */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_CONFIG */
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    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_DATA */
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    0xFFFFFFC1  /*  CY_U3P_PIB_GPIF_BETA_DEASSERT */
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};
160 
 
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/* Summary
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   This structure holds all the configuration inputs for the GPIF II.
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 */
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const CyU3PGpifConfig_t CyFxGpifConfig  = {
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    (uint16_t)(sizeof(CyFxGpifWavedataPosition)/sizeof(uint8_t)),
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    CyFxGpifWavedata,
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    CyFxGpifWavedataPosition,
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    (uint16_t)(sizeof(CyFxGpifTransition)/sizeof(uint16_t)),
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    CyFxGpifTransition,
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    (uint16_t)(sizeof(CyFxGpifRegValue)/sizeof(uint32_t)),
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    CyFxGpifRegValue
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};
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#endif   /* _INCLUDED_CYFXGPIF2CONFIG_ */

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