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[/] [usb_fpga_2_14/] [trunk/] [examples/] [ucecho/] [Readme] - Blame information for rev 2

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1 2 ZTEX
ucecho
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This example demonstrates the usage of the low speed interface of
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default firmware (i.e. it runs with default firmware).
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The core of the low speed interface can be found in
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../../default/fpga-fx3/ezusb_io.v (for FX3) and
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../../default/fpga-fx2/ezusb_io.v (for FX2), respectively.
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It has an SRAM like port with a 8 bit address and 32 bit data width.
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The host software writes data to this interface, the FPGA converts it to
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uppercase and stores it such that it can be read back from the host.

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