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[/] [usb_fpga_2_14/] [trunk/] [fx2/] [ztex.h] - Blame information for rev 2

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1 2 ZTEX 
/*%
2 
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 
   Copyright (C) 2009-2017 ZTEX GmbH.
4 
   http://www.ztex.de
5 
 
6 
   This Source Code Form is subject to the terms of the Mozilla Public
7 
   License, v. 2.0. If a copy of the MPL was not distributed with this file,
8 
   You can obtain one at http://mozilla.org/MPL/2.0/.
9 
 
10 
   Alternatively, the contents of this file may be used under the terms
11 
   of the GNU General Public License Version 3, as described below:
12 
 
13 
   This program is free software; you can redistribute it and/or modify
14 
   it under the terms of the GNU General Public License version 3 as
15 
   published by the Free Software Foundation.
16 
 
17 
   This program is distributed in the hope that it will be useful, but
18 
   WITHOUT ANY WARRANTY; without even the implied warranty of
19 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 
   General Public License for more details.
21 
 
22 
   You should have received a copy of the GNU General Public License
23 
   along with this program; if not, see http://www.gnu.org/licenses/.
24 
%*/
25 
 
26 
/*
27 
   Puts everything together.
28 
*/
29 
 
30 
#ifndef[ZTEX_H]
31 
#define[ZTEX_H]
32 
 
33 
#define[INIT_CMDS;][]
34 
 
35 
#ifneq[PRODUCT_IS][UFM-1_15]
36 
#define[UFM_1_15X_DETECTION_ENABLED][0]
37 
#endif
38 
 
39 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
40 
__xdata BYTE is_ufm_1_15x;
41 
#endif
42 
 
43 
/* *********************************************************************
44 
   ***** include the basic functions ***********************************
45 
   ********************************************************************* */
46 
#include[ztex-utils.h]
47 
 
48 
/* *********************************************************************
49 
   ***** I2C helper functions, EEPROM and MAC EEPROM support ***********
50 
   ********************************************************************* */
51 
#ifneq[EEPROM_DISABLED][1]
52 
 
53 
#ifneq[EEPROM_MAC_DISABLED][1]
54 
#ifeq[PRODUCT_IS][UFM-1_15]
55 
#define[MAC_EEPROM_ENABLED]
56 
#endif // PRODUCT_IS=UFM-1_15
57 
#ifeq[PRODUCT_IS][UFM-1_15Y]
58 
#define[MAC_EEPROM_ENABLED]
59 
#endif // PRODUCT_IS=UFM-1_15Y
60 
#ifeq[PRODUCT_IS][UFM-2_16]
61 
#define[MAC_EEPROM_ENABLED]
62 
#endif // PRODUCT_IS=UFM-2_16
63 
#ifeq[PRODUCT_IS][UFM-2_13]
64 
#define[MAC_EEPROM_ENABLED]
65 
#endif // PRODUCT_IS=UFM-2_13
66 
#ifeq[PRODUCT_IS][UFM-2_01]
67 
#define[MAC_EEPROM_ENABLED]
68 
#endif // PRODUCT_IS=UFM-2_01
69 
#ifeq[PRODUCT_IS][UFM-2_04]
70 
#define[MAC_EEPROM_ENABLED]
71 
#endif // PRODUCT_IS=UFM-2_04
72 
#endif // EEPROM_MAC_DISABLED
73 
 
74 
#include[ztex-eeprom.h]
75 
 
76 
#endif // EEPROM_DISABLED
77 
 
78 
 
79 
/* *********************************************************************
80 
   ***** Flash memory support ******************************************
81 
   ********************************************************************* */
82 
#ifeq[FLASH_ENABLED][1]
83 
 
84 
#ifeq[FLASH_OVERRIDE][1]
85 
#include[ztex-flash1.h]
86 
 
87 
#elifeq[FLASH_OVERRIDE][2]
88 
#include[ztex-flash2.h]
89 
 
90 
#elifeq[PRODUCT_IS][UFM-1_1]
91 
#define[MMC_PORT][E]
92 
#define[MMC_BIT_CS][7]
93 
#define[MMC_BIT_DI][6]
94 
#define[MMC_BIT_DO][4]
95 
#define[MMC_BIT_CLK][5]
96 
#include[ztex-flash1.h]
97 
 
98 
#elifeq[PRODUCT_IS][UFM-1_2]
99 
#define[MMC_PORT][E]
100 
#define[MMC_BIT_CS][7]
101 
#define[MMC_BIT_DI][6]
102 
#define[MMC_BIT_DO][4]
103 
#define[MMC_BIT_CLK][5]
104 
#include[ztex-flash1.h]
105 
 
106 
#elifeq[PRODUCT_IS][UM-1_0]
107 
#define[MMC_PORT][C]
108 
#define[MMC_BIT_CS][7]
109 
#define[MMC_BIT_DI][6]
110 
#define[MMC_BIT_DO][4]
111 
#define[MMC_BIT_CLK][5]
112 
#include[ztex-flash1.h]
113 
 
114 
#elifeq[PRODUCT_IS][UFM-1_10]
115 
#define[MMC_PORT][A]
116 
#define[MMC__PORT_DO][D]
117 
#define[MMC_BIT_DO][0]
118 
#define[MMC_BIT_CS][5]
119 
#define[MMC_BIT_DI][6]
120 
#define[MMC_BIT_CLK][7]
121 
#include[ztex-flash1.h]
122 
 
123 
#elifeq[PRODUCT_IS][UFM-1_11]
124 
#define[MMC_PORT][C]
125 
#define[MMC__PORT_DO][D]
126 
#define[MMC_BIT_DO][0]
127 
#define[MMC_BIT_CS][5]
128 
#define[MMC_BIT_DI][7]
129 
#define[MMC_BIT_CLK][6]
130 
#include[ztex-flash1.h]
131 
 
132 
#elifeq[PRODUCT_IS][UFM-1_15]
133 
#define[MMC_PORT][C]
134 
#define[MMC_BIT_DO][4]
135 
#define[MMC_BIT_CS][5]
136 
#define[MMC_BIT_DI][7]
137 
#define[MMC_BIT_CLK][6]
138 
#include[ztex-flash1.h]
139 
 
140 
#elifeq[PRODUCT_IS][UXM-1_0]
141 
#define[MMC_PORT][C]
142 
#define[MMC_BIT_CS][7]
143 
#define[MMC_BIT_DI][6]
144 
#define[MMC_BIT_DO][4]
145 
#define[MMC_BIT_CLK][5]
146 
#include[ztex-flash1.h]
147 
 
148 
#elifeq[PRODUCT_IS][UFM-2_16]
149 
#define[SPI_PORT][C]
150 
#define[SPI_BIT_DO][4]
151 
#define[SPI_BIT_CS][5]
152 
#define[SPI_BIT_CLK][6]
153 
#define[SPI_BIT_DI][7]
154 
#include[ztex-flash2.h]
155 
 
156 
#elifeq[PRODUCT_IS][UFM-2_13]
157 
#define[SPI_PORT][C]
158 
#define[SPI_BIT_DO][4]
159 
#define[SPI_BIT_CS][5]
160 
#define[SPI_BIT_CLK][6]
161 
#define[SPI_BIT_DI][7]
162 
#include[ztex-flash2.h]
163 
 
164 
#elifeq[PRODUCT_IS][UFM-2_01]
165 
#define[SPI_PORT][A]
166 
#define[SPI_OPORT][C]
167 
#define[SPI_BIT_DO][0]
168 
#define[SPI_BIT_CS][3]
169 
#define[SPI_BIT_CLK][0]
170 
#define[SPI_BIT_DI][1]
171 
#include[ztex-flash2.h]
172 
 
173 
#elifeq[PRODUCT_IS][UFM-2_04]
174 
#define[SPI_PORT][A]
175 
#define[SPI_OPORT][C]
176 
#define[SPI_BIT_DO][0]
177 
#define[SPI_BIT_CS][3]
178 
#define[SPI_BIT_CLK][0]
179 
#define[SPI_BIT_DI][1]
180 
#include[ztex-flash2.h]
181 
 
182 
#else
183 
#warning[Flash memory access is not supported by this product]
184 
#define[FLASH_ENABLED][0]
185 
#endif
186 
#endif
187 
 
188 
#ifeq[FLASH2_ENABLED][1]
189 
#ifdef[ZTEX_FLASH1_H]
190 
#warning[MMC/SD Flash interfaace already used by primary Flash]
191 
#else
192 
#define[FLASHX][flash2]
193 
#include[ztex-flash1.h]
194 
#endif
195 
#endif
196 
 
197 
 
198 
/* *********************************************************************
199 
   ***** FPGA configuration support ************************************
200 
   ********************************************************************* */
201 
#ifeq[PRODUCT_IS][UFM-1_0]
202 
#include[ztex-fpga1.h]
203 
#elifeq[PRODUCT_IS][UFM-1_1]
204 
#include[ztex-fpga1.h]
205 
#elifeq[PRODUCT_IS][UFM-1_2]
206 
#include[ztex-fpga1.h]
207 
#elifeq[PRODUCT_IS][UFM-1_10]
208 
#include[ztex-fpga2.h]
209 
#elifeq[PRODUCT_IS][UFM-1_11]
210 
#include[ztex-fpga3.h]
211 
#elifeq[PRODUCT_IS][UFM-1_15]
212 
#include[ztex-fpga4.h]
213 
#elifeq[PRODUCT_IS][UFM-1_15Y]
214 
#include[ztex-fpga5.h]
215 
#elifeq[PRODUCT_IS][UFM-2_16]
216 
#include[ztex-fpga6.h]
217 
#elifeq[PRODUCT_IS][UFM-2_13]
218 
#include[ztex-fpga6.h]
219 
#elifeq[PRODUCT_IS][UFM-2_01]
220 
#include[ztex-fpga7.h]
221 
#elifeq[PRODUCT_IS][UFM-2_04]
222 
#include[ztex-fpga7.h]
223 
#endif
224 
 
225 
 
226 
/* *********************************************************************
227 
   ***** DEBUG helper functions ****************************************
228 
   ********************************************************************* */
229 
#ifeq[DEBUG_ENABLED][1]
230 
#include[ztex-debug.h]
231 
#endif
232 
 
233 
 
234 
/* *********************************************************************
235 
   ***** XMEGA support *************************************************
236 
   ********************************************************************* */
237 
#ifneq[XMEGA_DISABLED][1]
238 
 
239 
#ifeq[PRODUCT_IS][UXM-1_0]
240 
#define[PDI_PORT][A]
241 
#define[PDI_BIT_CLK][0]
242 
#define[PDI_BIT_DATA][1]
243 
#include[ztex-xmega.h]
244 
#endif
245 
 
246 
#ifeq[EXP_1_10_ENABLED][1]
247 
#ifneq[PRODUCT_IS][UFM-1_0]
248 
#elifneq[PRODUCT_IS][UFM-1_1]
249 
#elifneq[PRODUCT_IS][UFM-1_2]
250 
#elifneq[PRODUCT_IS][UFM-1_10]
251 
#elifneq[PRODUCT_IS][UFM-1_11]
252 
#elifneq[PRODUCT_IS][UFM-1_15]
253 
#warning[ZTEX Experimental Board 1.10 is not supported by this product.]
254 
#endif
255 
#define[PDI_PORT][E]
256 
#define[PDI_BIT_CLK][5]
257 
#define[PDI_BIT_DATA][4]
258 
#include[ztex-xmega.h]
259 
#endif
260 
 
261 
#endif
262 
 
263 
/* *********************************************************************
264 
   ***** define the descriptors ****************************************
265 
   ********************************************************************* */
266 
#include[ztex-descriptors.h]
267 
 
268 
 
269 
/* *********************************************************************
270 
   ***** Temperature sensor support ************************************
271 
   ********************************************************************* */
272 
#ifneq[EEPROM_DISABLED][1]
273 
#ifneq[TEMP_SENSOR_DISABLED][1]
274 
#ifeq[PRODUCT_IS][UFM-1_15Y]
275 
#include[ztex-temp1.h]
276 
#endif
277 
 
278 
#endif // TEMP_SENSOR_DISABLED
279 
#endif // EEPROM_DISABLED
280 
 
281 
 
282 
/* *********************************************************************
283 
   ***** interrupt routines ********************************************
284 
   ********************************************************************* */
285 
#include[ztex-isr.h]
286 
 
287 
 
288 
/* *********************************************************************
289 
   ***** mac_eeprom_init ***********************************************
290 
   ********************************************************************* */
291 
#ifdef[@CAPABILITY_MAC_EEPROM;]
292 
void mac_eeprom_init ( ) {
293 
    BYTE b,c,d;
294 
    __xdata BYTE buf[5];
295 
    __code char hexdigits[] = "0123456789ABCDEF";
296 
 
297 
    mac_eeprom_read ( buf, 0, 3 );       // read signature
298 
    if ( buf[0]==67 && buf[1]==68 && buf[2]==48 ) {
299 
        config_data_valid = 1;
300 
        mac_eeprom_read ( SN_STRING, 16, 10 );          // copy serial number
301 
        mac_eeprom_read ( buf, 32, 5 );                 // USB ID's plus 1st char of product string
302 
        if ( (buf[0]!=0) && (buf[0]!=255) && (buf[1]!=0) && (buf[1]!=255) ) {
303 
            MEM_COPY1(buf,DeviceDescriptor+8,4);        // copy USB IS's
304 
        }
305 
        if (buf[4]!=0) {
306 
            mac_eeprom_read ( (__xdata BYTE*)productString, 36, 32 );   // copy product string
307 
            ((__xdata BYTE*)productString)[32]=0;
308 
        }
309 
    }
310 
    else {
311 
        config_data_valid = 0;
312 
    }
313 
 
314 
    for (b=0; b<10; b++) {       // abort if SN != "0000000000"
315 
        if ( SN_STRING[b] != 48 )
316 
            return;
317 
    }
318 
 
319 
    mac_eeprom_read ( buf, 0xfb, 5 );   // read the last 5 MAC digits
320 
 
321 
    c=0;
322 
    for (b=0; b<5; b++) {        // convert to MAC to SN string
323 
        d = buf[b];
324 
        SN_STRING[c] = hexdigits[d>>4];
325 
        c++;
326 
        SN_STRING[c] = hexdigits[d & 15];
327 
        c++;
328 
    }
329 
}
330 
#endif
331 
 
332 
 
333 
/* *********************************************************************
334 
   ***** init_USB ******************************************************
335 
   ********************************************************************* */
336 
#define[EPXCFG(][);][    EP$0CFG =
337 
#ifeq[EP$0_DIR][IN]
338 
        bmBIT7 | bmBIT6
339 
#elifeq[EP$0_DIR][OUT]
340 
        bmBIT7
341 
#else
342 
 
343 
#endif
344 
#ifeq[EP$0_TYPE][BULK]
345 
        | bmBIT5
346 
#elifeq[EP$0_TYPE][ISO]
347 
        | bmBIT4
348 
#elifeq[EP$0_TYPE][INT]
349 
        | bmBIT5 | bmBIT4
350 
#endif
351 
#ifeq[EP$0_SIZE][1024]
352 
        | bmBIT3
353 
#endif
354 
#ifeq[EP$0_BUFFERS][2]
355 
        | bmBIT1
356 
#elifeq[EP$0_BUFFERS][3]
357 
        | bmBIT1 | bmBIT0
358 
#endif
359 
        ;
360 
        SYNCDELAY;
361 
]
362 
 
363 
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
364 
        EP$0CFG = bmBIT7 | bmBIT5;
365 
#elifeq[EP$0_TYPE][ISO]
366 
        EP$0CFG = bmBIT7 | bmBIT4;
367 
#elifeq[EP$0_TYPE][INT]
368 
        EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
369 
#else
370 
        EP$0CFG = 0;
371 
#endif
372 
        SYNCDELAY;
373 
]
374 
 
375 
 
376 
void init_USB ()
377 
{
378 
    USBCS |= bmBIT3;
379 
 
380 
    CPUCS = bmBIT4 | bmBIT1;
381 
    wait(2);
382 
    CKCON &= ~7;
383 
 
384 
#ifeq[PRODUCT_IS][UFM-1_0]
385 
    IOA1 = 1;
386 
    OEA |= bmBIT1;
387 
#elifeq[PRODUCT_IS][UFM-1_1]
388 
    IOA1 = 1;
389 
    OEA |= bmBIT1;
390 
#elifeq[PRODUCT_IS][UFM-1_2]
391 
    IOA1 = 1;
392 
    OEA |= bmBIT1;
393 
#elifeq[PRODUCT_IS][UFM-1_10]
394 
    IOA1 = 1;
395 
    OEA |= bmBIT1;
396 
#elifeq[PRODUCT_IS][UFM-1_11]
397 
    IOA1 = 1;
398 
    OEA |= bmBIT1;
399 
#elifeq[PRODUCT_IS][UFM-1_15]
400 
    IOA1 = 1;
401 
    OEA |= bmBIT1;
402 
#elifeq[PRODUCT_IS][UFM-1_15Y]
403 
    init_fpga();
404 
#elifeq[PRODUCT_IS][UFM-2_16]
405 
    init_fpga();
406 
#elifeq[PRODUCT_IS][UFM-2_13]
407 
    init_fpga();
408 
#elifeq[PRODUCT_IS][UFM-2_01]
409 
    init_fpga();
410 
#elifeq[PRODUCT_IS][UFM-2_04]
411 
    init_fpga();
412 
#endif
413 
 
414 
    INIT_CMDS;
415 
 
416 
    EA = 0;
417 
    EUSB = 0;
418 
 
419 
    ENABLE_AVUSB;
420 
 
421 
    INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
422 
    INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
423 
    INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
424 
    INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
425 
    INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
426 
    INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
427 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
428 
 
429 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
430 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
431 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
432 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
433 
    INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
434 
    INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
435 
    INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
436 
    INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
437 
 
438 
    EXIF &= ~bmBIT4;
439 
    USBIRQ = 0x7f;
440 
    USBIE |= 0x7f;
441 
    EPIRQ = 0xff;
442 
    EPIE = 0xff;
443 
 
444 
    EUSB = 1;
445 
    EA = 1;
446 
 
447 
    EP1XCFG(1IN);
448 
    EP1XCFG(1OUT);
449 
    EPXCFG(2);
450 
    EPXCFG(4);
451 
    EPXCFG(6);
452 
    EPXCFG(8);
453 
 
454 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
455 
    OEA &= ~bmBIT3;
456 
    if ( IOA3 ) {
457 
        is_ufm_1_15x = 0;
458 
    } else {
459 
        is_ufm_1_15x = 1;
460 
//      INTERFACE_CAPABILITIES[0] &= ~32;
461 
    }
462 
#endif
463 
 
464 
#ifeq[FLASH_ENABLED][1]
465 
    flash_init();
466 
    if ( !flash_enabled ) {
467 
        wait(250);
468 
        flash_init();
469 
    }
470 
#endif
471 
#ifeq[DEBUG_ENABLED][1]
472 
    debug_init();
473 
#endif
474 
#ifeq[XMEGA_ENABLED][1]
475 
    xmega_init();
476 
#endif
477 
#ifdef[@CAPABILITY_MAC_EEPROM;]
478 
    mac_eeprom_init();
479 
#endif
480 
#ifeq[TEMP1_ENABLED][1]
481 
    temp1_init();
482 
#endif
483 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
484 
    fpga_configure_from_flash_init();
485 
#endif
486 
 
487 
#ifeq[FLASH2_ENABLED][1]
488 
    flash2_init();
489 
    if ( !flash2_enabled ) {
490 
        wait(250);
491 
        flash2_init();
492 
    }
493 
#endif
494 
 
495 
    USBCS |= bmBIT7 | bmBIT1;
496 
    wait(10);
497 
//    wait(250);
498 
    USBCS &= ~bmBIT3;
499 
}
500 
 
501 
 
502 
#endif   /* ZTEX_H */

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