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# Copyright (C) 1991-2004 Altera Corporation
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# Any megafunction design, and related netlist (encrypted or decrypted),
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# support information, device programming or simulation file, and any other
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# associated documentation or information provided by Altera or a partner
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# under Altera's Megafunction Partnership Program may be used only
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# to program PLD devices (but not masked PLD devices) from Altera. Any
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# other use of such megafunction design, netlist, support information,
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# device programming or simulation file, or any other related documentation
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# or information is prohibited for any other purpose, including, but not
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# limited to modification, reverse engineering, de-compiling, or use with
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# any other silicon devices, unless such use is explicitly licensed under
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# a separate agreement with Altera or a megafunction partner. Title to the
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# intellectual property, including patents, copyrights, trademarks, trade
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# secrets, or maskworks, embodied in any such megafunction design, netlist,
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# support information, device programming or simulation file, or any other
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# related documentation or information provided by Altera or a megafunction
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# partner, remains with Altera, the megafunction partner, or their respective
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# licensors. No other licenses, including any licenses needed under any third
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# party's intellectual property, are provided herein.
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# The default values for assignments are stored in the file
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# usbHostSlave_assignment_defaults.qdf
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# If this file doesn't exist, and for assignments not listed, see file
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# assignment_defaults.qdf
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# Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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# Project-Wide Assignments
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# ========================
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.1 SP2"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "05:36:22 OCTOBER 02, 2004"
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set_global_assignment -name LAST_QUARTUS_VERSION "4.1 SP2"
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set_global_assignment -name VERILOG_FILE ../../RTL/wrapper/usbHostSlave.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/USBSlaveControlBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/endpMux.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/fifoMux.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/sctxportarbiter.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/slavecontroller.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/slaveDirectcontrol.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/slaveGetpacket.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/slaveRxStatusMonitor.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/slaveSendpacket.v
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set_global_assignment -name VERILOG_FILE ../../RTL/slaveController/usbSlaveControl.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/writeUSBWireData.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/lineControlUpdate.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/processRxBit.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/processRxByte.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/processTxByte.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/readUSBWireData.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/siereceiver.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/SIETransmitter.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/updateCRC5.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/updateCRC16.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/usbSerialInterfaceEngine.v
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set_global_assignment -name VERILOG_FILE ../../RTL/serialInterfaceEngine/usbTxWireArbiter.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostSlaveMux/hostSlaveMuxBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostSlaveMux/hostSlaveMux.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/USBHostControlBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/directcontrol.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/getpacket.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/hctxportarbiter.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/hostcontroller.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/rxStatusMonitor.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/sendpacket.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/sendpacketarbiter.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/sendpacketcheckpreamble.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/sofcontroller.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/softransmit.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/speedCtrlMux.v
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set_global_assignment -name VERILOG_FILE ../../RTL/hostController/usbHostControl.v
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set_global_assignment -name VERILOG_FILE ../../RTL/busInterface/wishBoneBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/TxFifoBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/fifoMem.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/fifoRTL.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/RxFifo.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/RxFifoBI.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/simFifoMem.v
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set_global_assignment -name VERILOG_FILE ../../RTL/buffers/TxFifo.v
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# Analysis & Synthesis Assignments
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# ================================
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
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set_global_assignment -name FAMILY Cyclone
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set_global_assignment -name TOP_LEVEL_ENTITY usbHostSlave
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set_global_assignment -name USER_LIBRARIES "c:\\projects\\usbhostslaveforoc\\rtl\\include/"
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# Fitter Assignments
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# ==================
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set_global_assignment -name DEVICE EP1C20F400C6
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