1 |
22 |
sfielding |
VERSION=1.21
|
2 |
|
|
HEADER
|
3 |
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FILE="siereceiver.asf"
|
4 |
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FID=408ab644
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5 |
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LANGUAGE=VERILOG
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6 |
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ENTITY="SIEReceiver"
|
7 |
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FREEOID=262
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8 |
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"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// SIEReceiver\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n`include \"usbSerialInterfaceEngine_h.v\"\n\n"
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9 |
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MULTIPLEARCHSTATUS=FALSE
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10 |
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SYNTHESISATTRIBUTES=TRUE
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11 |
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HEADER_PARAM="AUTHOR,"
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12 |
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HEADER_PARAM="COMPANY,"
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13 |
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HEADER_PARAM="CREATIONDATE,"
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14 |
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HEADER_PARAM="TITLE,No Title"
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15 |
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BLOCKTABLE_FILE=""
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16 |
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BLOCKTABLE_TEMPL="0"
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17 |
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BLOCKTABLE_VISIBLE="1"
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18 |
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END
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19 |
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BUNDLES
|
20 |
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B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
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21 |
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B T "Conditions" 236,0,236 0 0 0 255,255,255 0 3333 0 0110 0 "Arial" 0
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22 |
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B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0 "Arial" 0
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23 |
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B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
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24 |
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B T "Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 0 "Arial" 0
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25 |
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B L "Transitions" 0,0,0 0 0 1 0,0,0 1 3527 1480 0000 0 "Arial" 0
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26 |
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B F "Ports" 0,0,0 0 0 1 0,255,255 1 3527 1480 0000 0 "Arial" 0
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27 |
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B L "Errors" 255,0,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
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28 |
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B T "State Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 0 "Arial" 4
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29 |
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B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0 "Arial" 0
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30 |
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B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
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31 |
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B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
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32 |
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B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0 "Arial" 0
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33 |
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B F "Initial State Indicator" 0,0,0 0 0 1 240,140,40 1 3527 1480 0000 0 "Arial" 0
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34 |
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B T "Alias" 0,128,0 0 0 1 255,255,255 0 3527 1480 0000 0 "Arial" 0
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35 |
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B F "Delay" 0,0,0 0 0 1 180,180,180 1 3527 1480 0000 0 "Arial" 0
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36 |
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END
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37 |
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INSTHEADER 1
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38 |
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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END
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INSTHEADER 23
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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END
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INSTHEADER 46
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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END
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INSTHEADER 55
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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END
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INSTHEADER 64
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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END
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INSTHEADER 73
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58 |
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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60 |
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END
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61 |
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INSTHEADER 82
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PAGE 0,0 215900,279400
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63 |
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MARGINS 12700,0 0,12700
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64 |
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END
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65 |
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INSTHEADER 91
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66 |
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PAGE 0,0 215900,279400
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MARGINS 12700,0 0,12700
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68 |
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END
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69 |
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INSTHEADER 235
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70 |
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PAGE 0,0 215900,279400
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71 |
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MARGINS 12700,0 0,12700
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72 |
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END
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73 |
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INSTHEADER 241
|
74 |
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PAGE 0,0 215900,279400
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75 |
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MARGINS 12700,0 0,12700
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76 |
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END
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77 |
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OBJECTS
|
78 |
33 |
sfielding |
W 15 6 0 11 241 BEZIER "Transitions" | 54697,173492 54895,169631 55070,150652 55268,146791
|
79 |
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W 14 6 0 9 11 BEZIER "Transitions" | 53793,199620 54090,195957 54044,190130 54341,186467
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80 |
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S 11 6 16384 ELLIPSE "States" | 54795,179990 6500 6500
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81 |
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L 10 11 0 TEXT "State Labels" | 54795,179990 1 0 0 "WAIT_BIT\n/4/"
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82 |
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S 9 6 20480 ELLIPSE "States" | 54004,206093 6500 6500
|
83 |
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L 8 9 0 TEXT "State Labels" | 54004,206093 1 0 0 "START_SRX\n/5/"
|
84 |
|
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G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 97950,251000 1 0 0 "Module: SIEReceiver"
|
85 |
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F 6 0 671089152 228 0 "" 0 RECT 0,0,0 0 0 1 255,255,255 0 | 14253,-45 205887,221511
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86 |
22 |
sfielding |
L 7 6 0 TEXT "Labels" | 17253,218511 1 0 0 "rcvr"
|
87 |
33 |
sfielding |
S 23 6 24580 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 143681,19706 6500 6500
|
88 |
|
|
L 22 23 0 TEXT "State Labels" | 143681,19706 1 0 0 "DISCNCT"
|
89 |
|
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A 21 15 16 TEXT "Actions" | 50061,163770 1 0 0 "RxBits <= RxWireDataIn;"
|
90 |
|
|
C 19 15 0 TEXT "Conditions" | 55867,173345 1 0 0 "RxWireDataWEn == 1'b1"
|
91 |
|
|
W 17 6 0 16 9 BEZIER "Transitions" | 25106,208721 30781,206721 43306,212217 48981,210217
|
92 |
22 |
sfielding |
I 16 6 0 Builtin Reset | 25106,208721
|
93 |
33 |
sfielding |
H 39 23 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
94 |
|
|
S 40 39 12288 ELLIPSE "States" | 64508,213851 6500 6500
|
95 |
|
|
L 41 40 0 TEXT "State Labels" | 64508,213851 1 0 0 "CHK_RXBITS\n/3/"
|
96 |
|
|
I 42 39 0 Builtin Entry | 42918,241791
|
97 |
|
|
I 43 39 0 Builtin Exit | 147281,109121
|
98 |
|
|
W 44 39 0 42 40 BEZIER "Transitions" | 46780,241791 51379,234967 56275,226064 60875,219240
|
99 |
|
|
S 46 6 28676 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 142838,37283 6500 6500
|
100 |
22 |
sfielding |
L 47 46 0 TEXT "State Labels" | 142838,37283 1 0 0 "WAIT_FS_CONN"
|
101 |
33 |
sfielding |
H 54 46 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
102 |
|
|
W 48 54 4096 53 50 BEZIER "Transitions" | 111761,134435 116730,128048 137380,101490 142350,94624
|
103 |
|
|
W 49 54 0 51 53 BEZIER "Transitions" | 90086,167640 94685,160816 99717,151913 104317,145089
|
104 |
|
|
I 50 54 0 Builtin Exit | 145248,94624
|
105 |
|
|
I 51 54 0 Builtin Entry | 86360,167640
|
106 |
|
|
L 52 53 0 TEXT "State Labels" | 107950,139700 1 0 0 "CHK_RX_BITS\n/0/"
|
107 |
|
|
S 53 54 0 ELLIPSE "States" | 107950,139700 6500 6500
|
108 |
|
|
H 63 55 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
109 |
|
|
S 55 6 32772 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 141452,56093 6500 6500
|
110 |
|
|
L 56 55 0 TEXT "State Labels" | 141452,56093 1 0 0 "WAIT_LS_CONN"
|
111 |
|
|
W 57 63 0 62 59 BEZIER "Transitions" | 111761,134435 116730,127570 121672,118626 126642,111760
|
112 |
|
|
W 58 63 0 60 62 BEZIER "Transitions" | 90086,167640 94685,160816 99717,151913 104317,145089
|
113 |
|
|
I 59 63 0 Builtin Exit | 129540,111760
|
114 |
|
|
I 60 63 0 Builtin Entry | 86360,167640
|
115 |
|
|
L 61 62 0 TEXT "State Labels" | 107950,139700 1 0 0 "CHK_RX_BITS\n/1/"
|
116 |
22 |
sfielding |
S 62 63 4096 ELLIPSE "States" | 107950,139700 6500 6500
|
117 |
33 |
sfielding |
H 72 64 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
118 |
|
|
S 64 6 36868 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 140066,73913 6500 6500
|
119 |
|
|
L 65 64 0 TEXT "State Labels" | 140066,73913 1 0 0 "LS_CONN"
|
120 |
|
|
W 67 72 0 69 71 BEZIER "Transitions" | 69044,194920 73643,188096 77893,179193 82493,172369
|
121 |
|
|
I 68 72 0 Builtin Exit | 131860,37310
|
122 |
|
|
I 69 72 0 Builtin Entry | 64536,194920
|
123 |
|
|
L 70 71 0 TEXT "State Labels" | 86126,166980 1 0 0 "CHK_RX_BITS\n/2/"
|
124 |
|
|
S 71 72 8192 ELLIPSE "States" | 86126,166980 6500 6500
|
125 |
|
|
S 73 6 40964 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 139274,93515 6500 6500
|
126 |
22 |
sfielding |
L 74 73 0 TEXT "State Labels" | 139274,93515 1 0 0 "FS_CONN"
|
127 |
33 |
sfielding |
H 81 73 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
128 |
|
|
H 90 82 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
129 |
|
|
S 82 6 45060 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 137888,113711 6500 6500
|
130 |
|
|
L 83 82 0 TEXT "State Labels" | 137888,113711 1 0 0 "WAIT_LS_DIS"
|
131 |
|
|
S 91 6 49156 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 136700,135544 6500 6500
|
132 |
22 |
sfielding |
L 92 91 0 TEXT "State Labels" | 136700,135544 1 0 0 "WAIT_FS_DIS"
|
133 |
|
|
H 99 91 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
134 |
33 |
sfielding |
W 129 39 8194 40 43 BEZIER "Transitions" | 67288,207977 90867,158271 121076,158827 144655,109121
|
135 |
|
|
W 130 39 8193 40 43 BEZIER "Transitions" | 69252,218293 110985,257468 165038,129446 149907,109121
|
136 |
|
|
C 131 129 0 TEXT "Conditions" | 55856,199298 1 0 0 "RxBits == `ONE_ZERO"
|
137 |
|
|
C 132 130 0 TEXT "Conditions" | 98621,230429 1 0 0 "RxBits == `ZERO_ONE"
|
138 |
|
|
A 133 130 16 TEXT "Actions" | 102033,204788 1 0 0 "RXStMachCurrState <= `WAIT_LOW_SPEED_CONN_ST;\nRXWaitCount <= 8'h00;"
|
139 |
|
|
A 134 129 16 TEXT "Actions" | 41551,160050 1 0 0 "RXStMachCurrState <= `WAIT_FULL_SPEED_CONN_ST;\nRXWaitCount <= 8'h00;"
|
140 |
|
|
W 138 6 0 241 91 BEZIER "Transitions" | 55726,139826 55825,138040 55689,135712 56830,134571\
|
141 |
|
|
57971,133430 62339,132437 65812,132288 69286,132139\
|
142 |
|
|
125497,134459 130261,134657
|
143 |
|
|
W 139 6 0 241 82 BEZIER "Transitions" | 54775,139869 53765,132112 51800,118824 53198,115107\
|
144 |
|
|
54597,111390 58369,109113 62636,108765 66904,108418\
|
145 |
|
|
125138,112272 131490,112569
|
146 |
|
|
W 140 6 0 241 73 BEZIER "Transitions" | 54816,139862 53725,129143 49733,108915 49138,102613\
|
147 |
|
|
48543,96311 48344,92538 49038,91000 49733,89462\
|
148 |
|
|
52773,87554 56507,87043 60241,86532 74292,88983\
|
149 |
|
|
79033,89071 83774,89159 131499,91327 132998,91825
|
150 |
|
|
W 141 6 0 241 64 BEZIER "Transitions" | 54966,139843 53478,121879 47748,87973 48939,78743\
|
151 |
|
|
50130,69513 57873,68520 62984,68470 68095,68421\
|
152 |
|
|
127305,72434 133657,72831
|
153 |
22 |
sfielding |
W 142 6 0 241 55 BEZIER "Transitions" | 55084,139831 53397,116408 47947,71200 50081,59587\
|
154 |
|
|
52215,47975 60863,50377 65955,50576 71048,50775\
|
155 |
|
|
83004,50822 85042,51300 87080,51779 134402,54517\
|
156 |
|
|
135100,54716
|
157 |
33 |
sfielding |
W 143 6 0 241 46 BEZIER "Transitions" | 54918,139846 51842,114240 43778,63855 43182,50159\
|
158 |
|
|
42587,36463 46360,32889 52513,32244 58666,31599\
|
159 |
|
|
125961,36036 136382,36532
|
160 |
|
|
W 159 6 0 23 235 BEZIER "Transitions" | 148132,24441 151647,28728 158891,36033 161548,42721\
|
161 |
|
|
164206,49409 167707,70913 169507,80002
|
162 |
|
|
W 158 6 0 46 235 BEZIER "Transitions" | 146210,42837 151355,51840 163238,71417 168383,80420
|
163 |
|
|
W 157 6 0 55 235 BEZIER "Transitions" | 145872,60857 150759,65744 162584,76303 167471,81190
|
164 |
|
|
W 155 6 0 64 235 BEZIER "Transitions" | 146100,76328 150732,78730 162771,81413 166713,82783
|
165 |
|
|
W 154 6 0 73 235 BEZIER "Transitions" | 145399,91341 150201,89969 162025,85907 166827,84535
|
166 |
|
|
W 153 6 0 82 235 BEZIER "Transitions" | 142566,109200 148139,103712 162016,91312 167589,85824
|
167 |
|
|
W 152 6 0 91 235 BEZIER "Transitions" | 140515,130282 147718,119649 161212,97111 168415,86478
|
168 |
|
|
C 151 138 0 TEXT "Conditions" | 53061,127639 1 0 0 "RXStMachCurrState == `WAIT_FULL_SP_DISCONNECT_ST"
|
169 |
|
|
C 150 139 0 TEXT "Conditions" | 52495,106306 1 0 0 "RXStMachCurrState == `WAIT_LOW_SP_DISCONNECT_ST"
|
170 |
|
|
C 149 140 0 TEXT "Conditions" | 50344,86446 1 0 0 "RXStMachCurrState == `CONNECT_FULL_SPEED_ST"
|
171 |
|
|
C 148 141 0 TEXT "Conditions" | 51096,67393 1 0 0 "RXStMachCurrState == `CONNECT_LOW_SPEED_ST"
|
172 |
|
|
C 147 142 0 TEXT "Conditions" | 46355,49637 1 0 0 "RXStMachCurrState == `WAIT_LOW_SPEED_CONN_ST"
|
173 |
|
|
C 146 143 0 TEXT "Conditions" | 46100,30812 1 0 0 "RXStMachCurrState == `WAIT_FULL_SPEED_CONN_ST"
|
174 |
22 |
sfielding |
W 144 6 0 241 23 BEZIER "Transitions" | 54917,139844 50947,108878 41893,48571 41744,32741\
|
175 |
|
|
41595,16911 48940,15520 55540,15371 62140,15223\
|
176 |
|
|
127685,18671 137213,19068
|
177 |
33 |
sfielding |
C 145 144 0 TEXT "Conditions" | 62881,14004 1 0 0 "RXStMachCurrState == `DISCONNECT_ST"
|
178 |
|
|
W 161 39 8195 40 43 BEZIER "Transitions" | 58578,211192 49548,206204 31147,197012 26632,187509\
|
179 |
|
|
22117,178006 22117,149970 33211,139263 44305,128556\
|
180 |
|
|
88681,113764 103817,110238 118953,106712 136571,108777\
|
181 |
|
|
144655,109121
|
182 |
22 |
sfielding |
W 160 6 0 235 11 BEZIER "Transitions" | 171556,86642 175414,98475 187017,120754 187960,135288\
|
183 |
|
|
188903,149822 181196,155909 172535,165512 163875,175116\
|
184 |
|
|
140506,184713 125270,186027 110035,187342 80303,183385\
|
185 |
|
|
61192,181141
|
186 |
33 |
sfielding |
A 165 62 4 TEXT "Actions" | 104545,213104 1 0 0 "if (RxBits == `ZERO_ONE)\nbegin \n RXWaitCount <= RXWaitCount + 1'b1;\n if (RXWaitCount == `CONNECT_WAIT_TIME) \n begin\n connectState <= `LOW_SPEED_CONNECT;\n RXStMachCurrState <= `CONNECT_LOW_SPEED_ST;\n end\nend\nelse\nbegin\n RXStMachCurrState <= `DISCONNECT_ST;\nend"
|
187 |
|
|
A 166 53 4 TEXT "Actions" | 101814,215348 1 0 0 "if (RxBits == `ONE_ZERO)\nbegin \n RXWaitCount <= RXWaitCount + 1'b1;\n if (RXWaitCount == `CONNECT_WAIT_TIME) \n begin\n connectState <= `FULL_SPEED_CONNECT;\n RXStMachCurrState <= `CONNECT_FULL_SPEED_ST;\n end\nend\nelse\nbegin\n RXStMachCurrState <= `DISCONNECT_ST;\nend"
|
188 |
|
|
W 169 72 0 71 68 BEZIER "Transitions" | 86442,160488 87123,152997 131179,46721 131860,39230
|
189 |
|
|
S 174 81 53248 ELLIPSE "States" | 85374,175380 6500 6500
|
190 |
|
|
L 175 174 0 TEXT "State Labels" | 85374,175380 1 0 0 "CHK_RX_BITS1\n/6/"
|
191 |
|
|
I 176 81 0 Builtin Entry | 63784,203320
|
192 |
|
|
I 177 81 0 Builtin Exit | 137732,35774
|
193 |
|
|
W 178 81 0 176 174 BEZIER "Transitions" | 67935,203320 72534,196496 77141,187593 81741,180769
|
194 |
|
|
W 183 81 0 174 177 BEZIER "Transitions" | 85690,168888 83487,163706 122612,52505 134843,35774
|
195 |
|
|
S 185 90 57344 ELLIPSE "States" | 81562,170615 6500 6500
|
196 |
|
|
L 186 185 0 TEXT "State Labels" | 81562,170615 1 0 0 "CHK_RX_BITS\n/7/"
|
197 |
|
|
I 187 90 0 Builtin Entry | 59972,198555
|
198 |
|
|
I 188 90 0 Builtin Exit | 126468,30181
|
199 |
22 |
sfielding |
W 189 90 0 187 185 BEZIER "Transitions" | 64008,198555 68607,191731 73329,182828 77929,176004
|
200 |
33 |
sfielding |
W 194 90 0 185 188 BEZIER "Transitions" | 81878,164123 82559,156632 125787,39638 126468,32147
|
201 |
|
|
W 198 99 0 200 201 BEZIER "Transitions" | 57503,190526 62102,183702 67134,174799 71734,167975
|
202 |
|
|
I 199 99 0 Builtin Exit | 120480,22566
|
203 |
|
|
I 200 99 0 Builtin Entry | 53777,190526
|
204 |
|
|
S 201 99 61440 ELLIPSE "States" | 75367,162586 6500 6500
|
205 |
|
|
L 202 201 0 TEXT "State Labels" | 75367,162586 1 0 0 "CHK_RX_BITS2\n/8/"
|
206 |
22 |
sfielding |
W 204 99 0 201 199 BEZIER "Transitions" | 75683,156094 76364,148603 119799,32127 120480,24636
|
207 |
33 |
sfielding |
I 219 0 130 Builtin Signal | 20132,240754 "" ""
|
208 |
|
|
L 218 219 0 TEXT "Labels" | 23132,240754 1 0 0 "RXWaitCount[7:0]"
|
209 |
|
|
I 215 0 130 Builtin Signal | 20439,246180 "" ""
|
210 |
|
|
L 214 215 0 TEXT "Labels" | 23439,246180 1 0 0 "RXStMachCurrState[3:0]"
|
211 |
|
|
L 208 209 0 TEXT "Labels" | 83032,232182 1 0 0 "RxWireDataIn[1:0]"
|
212 |
|
|
I 209 0 130 Builtin InPort | 77032,232182 "" ""
|
213 |
|
|
L 212 213 0 TEXT "Labels" | 82921,227792 1 0 0 "RxWireDataWEn"
|
214 |
22 |
sfielding |
I 213 0 2 Builtin InPort | 76921,227792 "" ""
|
215 |
33 |
sfielding |
I 233 0 130 Builtin Signal | 19714,230494 "" ""
|
216 |
|
|
L 232 233 0 TEXT "Labels" | 22714,230494 1 0 0 "RxBits[1:0]"
|
217 |
|
|
C 231 17 0 TEXT "Conditions" | 33631,208784 1 0 0 "rst"
|
218 |
|
|
L 230 229 0 TEXT "Labels" | 184517,243951 1 0 0 "rst"
|
219 |
|
|
I 229 0 2 Builtin InPort | 178517,243951 "" ""
|
220 |
|
|
I 228 0 3 Builtin InPort | 178182,250843 "" ""
|
221 |
|
|
L 227 228 0 TEXT "Labels" | 184182,250843 1 0 0 "clk"
|
222 |
|
|
A 226 9 4 TEXT "Actions" | 91342,218617 1 0 0 "RXStMachCurrState <= `DISCONNECT_ST;\nRXWaitCount <= 8'h00;\nconnectState <= `DISCONNECT;\nRxBits <= 2'b00;"
|
223 |
|
|
L 234 235 0 TEXT "State Labels" | 170150,83440 1 0 0 "J1"
|
224 |
|
|
S 235 6 65556 ELLIPSE "Junction" | 170150,83440 3500 3500
|
225 |
|
|
H 236 235 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
226 |
|
|
I 237 236 0 Builtin Entry | 86360,167640
|
227 |
|
|
I 238 236 0 Builtin Exit | 129540,111760
|
228 |
22 |
sfielding |
W 239 236 0 237 238 BEZIER "Transitions" | 90868,167640 103038,150317 114242,129084 126412,111760
|
229 |
33 |
sfielding |
A 255 194 16 TEXT "Actions" | 77086,121516 1 0 0 "if (RxBits == `SE0)\nbegin\n RXWaitCount <= RXWaitCount + 1'b1;\n if (RXWaitCount == `DISCONNECT_WAIT_TIME) \n begin\n RXStMachCurrState <= `DISCONNECT_ST;\n connectState <= `DISCONNECT;\n end\nend\nelse\nbegin\n RXStMachCurrState <= `CONNECT_LOW_SPEED_ST;\nend"
|
230 |
|
|
A 252 204 16 TEXT "Actions" | 71150,119778 1 0 0 "if (RxBits == `SE0)\nbegin\n RXWaitCount <= RXWaitCount + 1'b1;\n if (RXWaitCount == `DISCONNECT_WAIT_TIME) \n begin\n RXStMachCurrState <= `DISCONNECT_ST;\n connectState <= `DISCONNECT;\n end\nend\nelse\nbegin\n RXStMachCurrState <= `CONNECT_FULL_SPEED_ST;\nend"
|
231 |
|
|
L 240 241 0 TEXT "State Labels" | 55410,143308 1 0 0 "J2"
|
232 |
|
|
S 241 6 69652 ELLIPSE "Junction" | 55410,143308 3500 3500
|
233 |
|
|
H 242 241 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
|
234 |
|
|
I 243 242 0 Builtin Entry | 86360,167640
|
235 |
|
|
I 244 242 0 Builtin Exit | 129540,111760
|
236 |
22 |
sfielding |
W 245 242 0 243 244 BEZIER "Transitions" | 90868,167640 103009,150334 114271,129067 126412,111760
|
237 |
33 |
sfielding |
A 259 169 16 TEXT "Actions" | 77229,121214 1 0 0 "if (RxBits == `SE0)\nbegin\n RXStMachCurrState <= `WAIT_LOW_SP_DISCONNECT_ST;\n RXWaitCount <= 0;\nend"
|
238 |
|
|
A 258 183 16 TEXT "Actions" | 76648,132819 1 0 0 "if (RxBits == `SE0)\nbegin\n RXStMachCurrState <= `WAIT_FULL_SP_DISCONNECT_ST;\n RXWaitCount <= 0;\nend"
|
239 |
|
|
L 260 261 0 TEXT "Labels" | 80654,241105 1 0 0 "connectState[1:0]"
|
240 |
22 |
sfielding |
I 261 0 130 Builtin OutPort | 74654,241105 "" ""
|
241 |
|
|
END
|