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URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

[/] [v586/] [trunk/] [README] - Blame information for rev 121

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Line No. Rev Author Line
1 121 ultro
core_rtl:
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contains the RTL of the core with AXI4 master interface : v586.v
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soc_rtl:
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contains peripherals for soc demo, mainly interrupt/timers/uart and spi interface
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doc:
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useful documentation
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gate_rtl:
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basic blocks used in some core or soc rtl
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board_specific_files:
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Will contain different top RTL for various board and
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also the XCI files to generate the xilinx IPs like the AXI4 interconnect.
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It will contain files for memory interface MIG DDDR2/3 or PSRAM rtl interfaces
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for each board.

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