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[/] [v586/] [trunk/] [board_specific_files/] [nexys4/] [TOP_SYS.xdc] - Blame information for rev 121

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1 121 ultro 
 
2 
####################################################################################
3 
# Generated by PlanAhead 14.7 built on 'Fri Sep 27 19:24:36 MDT 2013' by 'xbuild'
4 
####################################################################################
5 
 
6 
 
7 
####################################################################################
8 
# Constraints from file : 'TOP_SYS.ucf'
9 
####################################################################################
10 
 
11 
#Bank = 35, Pin name = IO_L12P_T1_MRCC_35,                                      Sch name = CLK100MHZ
12 
set_property PACKAGE_PIN E3 [get_ports clk100]
13 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:1
14 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'clk100' has been applied to the port object 'clk100'.
15 
set_property IOSTANDARD LVCMOS33 [get_ports clk100]
16 
 
17 
# All timing constraint translations are rough conversions, intended to act as a template for further manual refinement. The translations should not be expected to produce semantically identical results to the original ucf. Each xdc timing constraint must be manually inspected and verified to ensure it captures the desired intent
18 
 
19 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:3
20 
create_clock -period 10.000 -name clk100 [get_ports clk100]
21 
 
22 
set_property PACKAGE_PIN C4 [get_ports RXD]
23 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:5
24 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'RXD' has been applied to the port object 'RXD'.
25 
set_property IOSTANDARD LVCMOS33 [get_ports RXD]
26 
set_property PACKAGE_PIN D4 [get_ports TXD]
27 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:6
28 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'TXD' has been applied to the port object 'TXD'.
29 
set_property IOSTANDARD LVCMOS33 [get_ports TXD]
30 
 
31 
#NET "RXD_B" LOC = "V11" | IOSTANDARD = "LVCMOS33" ;
32 
#NET "TXD_B" LOC = "V15" | IOSTANDARD = "LVCMOS33" ;
33 
 
34 
 
35 
set_property PACKAGE_PIN C12 [get_ports rstn]
36 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:12
37 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'rstn' has been applied to the port object 'rstn'.
38 
set_property IOSTANDARD LVCMOS33 [get_ports rstn]
39 
 
40 
#NET "RTS"                      LOC = "D3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L12N_T1_MRCC_35,                                      Sch name = UART_CTS
41 
#NET "CTS"                      LOC = "E5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L5N_T0_AD13N_35,                                      Sch name = UART_RTS
42 
 
43 
## This file is a general .ucf for the Nexys4 rev B board
44 
## To use it in a project:
45 
## - uncomment the lines corresponding to used pins
46 
## - rename the used signals according to the project
47 
 
48 
## Clock signal
49 
#NET "clk"   LOC = "E3" | IOSTANDARD = "LVCMOS33";                                      #Bank = 35, Pin name = IO_L12P_T1_MRCC_35,                                      Sch name = CLK100MHZ
50 
#NET "clk" TNM_NET = sys_clk_pin;
51 
#TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 100 MHz HIGH 50%;
52 
 
53 
## Switches
54 
#NET "sw<0>"                       LOC = "U9"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L21P_T3_DQS_34,                                       Sch name = SW0
55 
#Bank = 34, Pin name = IO_25_34,                                                        Sch name = SW1
56 
set_property PACKAGE_PIN U8 [get_ports {gpio_in[0]}]
57 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:29
58 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[0]' has been applied to the port object 'gpio_in[0]'.
59 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[0]}]
60 
#Bank = 34, Pin name = IO_L23P_T3_34,                                           Sch name = SW2
61 
set_property PACKAGE_PIN R7 [get_ports {gpio_in[1]}]
62 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:30
63 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[1]' has been applied to the port object 'gpio_in[1]'.
64 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[1]}]
65 
#Bank = 34, Pin name = IO_L19P_T3_34,                                           Sch name = SW3
66 
set_property PACKAGE_PIN R6 [get_ports {gpio_in[2]}]
67 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:31
68 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[2]' has been applied to the port object 'gpio_in[2]'.
69 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[2]}]
70 
#Bank = 34, Pin name = IO_L19N_T3_VREF_34,                                      Sch name = SW4
71 
set_property PACKAGE_PIN R5 [get_ports {gpio_in[3]}]
72 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:32
73 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[3]' has been applied to the port object 'gpio_in[3]'.
74 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[3]}]
75 
#Bank = 34, Pin name = IO_L20P_T3_34,                                           Sch name = SW5
76 
set_property PACKAGE_PIN V7 [get_ports {gpio_in[4]}]
77 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:33
78 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[4]' has been applied to the port object 'gpio_in[4]'.
79 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[4]}]
80 
#Bank = 34, Pin name = IO_L20N_T3_34,                                           Sch name = SW6
81 
set_property PACKAGE_PIN V6 [get_ports {gpio_in[5]}]
82 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:34
83 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[5]' has been applied to the port object 'gpio_in[5]'.
84 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[5]}]
85 
#Bank = 34, Pin name = IO_L10P_T1_34,                                           Sch name = SW7
86 
set_property PACKAGE_PIN V5 [get_ports {gpio_in[6]}]
87 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:35
88 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpio_in[6]' has been applied to the port object 'gpio_in[6]'.
89 
set_property IOSTANDARD LVCMOS33 [get_ports {gpio_in[6]}]
90 
#NET "gpio_in<7>"                  LOC = "U4"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L8P_T1-34,                                            Sch name = SW8
91 
#NET "sw<9>"                       LOC = "V2"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L9N_T1_DQS_34,                                        Sch name = SW9
92 
#NET "sw<10>"                       LOC = "U2"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L9P_T1_DQS_34,                                        Sch name = SW10
93 
#NET "sw<11>"                       LOC = "T3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L11N_T1_MRCC_34,                                      Sch name = SW11
94 
#NET "sw<12>"                       LOC = "T1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L17N_T2_34,                                           Sch name = SW12
95 
#NET "sw<13>"                       LOC = "R3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L11P_T1_SRCC_34,                                      Sch name = SW13
96 
#NET "sw<14>"                       LOC = "P3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L14N_T2_SRCC_34,                                      Sch name = SW14
97 
#Bank = 34, Pin name = IO_L14P_T2_SRCC_34,                                      Sch name = SW15
98 
set_property PACKAGE_PIN P4 [get_ports {gpioA[0]}]
99 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:43
100 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[0]' has been applied to the port object 'gpioA[0]'.
101 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[0]}]
102 
 
103 
## LEDs
104 
#NET "dbg1"                     LOC = "T8"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L24N_T3_34,                                           Sch name = LED0
105 
#NET "dbg2"                     LOC = "V9"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L21N_T3_DQS_34,                                       Sch name = LED1
106 
#NET "gpioA<2>"                    LOC = "R8"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L24P_T3_34,                                           Sch name = LED2
107 
set_property PACKAGE_PIN R8 [get_ports {gpioA[1]}]
108 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[1]}]
109 
#Bank = 34, Pin name = IO_L23N_T3_34,                                           Sch name = LED3
110 
set_property PACKAGE_PIN T6 [get_ports {gpioA[3]}]
111 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:49
112 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[3]' has been applied to the port object 'gpioA[3]'.
113 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[3]}]
114 
#NET "gpioA<4>"                    LOC = "T5"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L12P_T1_MRCC_34,                                      Sch name = LED4
115 
#Bank = 34, Pin name = IO_L12N_T1_MRCC_34,                                      Sch     name = LED5
116 
set_property PACKAGE_PIN T4 [get_ports {gpioA[5]}]
117 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:51
118 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[5]' has been applied to the port object 'gpioA[5]'.
119 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[5]}]
120 
#NET "gpioA<6>"                    LOC = "U7"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L22P_T3_34,                                           Sch name = LED6
121 
#NET "gpioA<7>"                    LOC = "U6"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L22N_T3_34,                                           Sch name = LED7
122 
#Bank = 34, Pin name = IO_L10N_T1_34,                                           Sch name = LED8
123 
set_property PACKAGE_PIN V4 [get_ports {gpioB[0]}]
124 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:54
125 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[0]' has been applied to the port object 'gpioB[0]'.
126 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[0]}]
127 
#Bank = 34, Pin name = IO_L8N_T1_34,                                            Sch name = LED9
128 
set_property PACKAGE_PIN U3 [get_ports {gpioB[1]}]
129 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:55
130 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[1]' has been applied to the port object 'gpioB[1]'.
131 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[1]}]
132 
#Bank = 34, Pin name = IO_L7N_T1_34,                                            Sch name = LED10#NET "debug<4>"                    LOC = "R1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L17P_T2_34,                                           Sch name = LED11
133 
set_property PACKAGE_PIN V1 [get_ports {gpioB[2]}]
134 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:56
135 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[2]' has been applied to the port object 'gpioB[2]'.
136 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[2]}]
137 
#Bank = 34, Pin name = IO_L7N_T1_34,                                            Sch name = LED10#NET "debug<4>"                    LOC = "R1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L17P_T2_34,                                           Sch name = LED11
138 
set_property PACKAGE_PIN R1 [get_ports {gpioB[3]}]
139 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:57
140 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[3]' has been applied to the port object 'gpioB[3]'.
141 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[3]}]
142 
#Bank = 34, Pin name = IO_L13N_T2_MRCC_34,                                      Sch name = LED12
143 
set_property PACKAGE_PIN P5 [get_ports {gpioB[4]}]
144 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:58
145 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[4]' has been applied to the port object 'gpioB[4]'.
146 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[4]}]
147 
#Bank = 34, Pin name = IO_L7P_T1_34,                                            Sch name = LED13
148 
set_property PACKAGE_PIN U1 [get_ports {gpioB[5]}]
149 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:59
150 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[5]' has been applied to the port object 'gpioB[5]'.
151 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[5]}]
152 
#Bank = 34, Pin name = IO_L15N_T2_DQS_34,                                       Sch name = LED14
153 
set_property PACKAGE_PIN R2 [get_ports {gpioB[6]}]
154 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:60
155 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[6]' has been applied to the port object 'gpioB[6]'.
156 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[6]}]
157 
#Bank = 34, Pin name = IO_L15P_T2_DQS_34,                                       Sch name = LED15
158 
set_property PACKAGE_PIN P2 [get_ports {gpioB[7]}]
159 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:61
160 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioB[7]' has been applied to the port object 'gpioB[7]'.
161 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioB[7]}]
162 
 
163 
#NET "extA<0>"                     LOC = "K5"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L5P_T0_34,                                            Sch name = LED16_R
164 
#NET "RGB1_Green"               LOC = "F13"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L5P_T0_AD9P_15,                                       Sch name = LED16_G
165 
#NET "RGB1_Blue"                LOC = "F6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L19N_T3_VREF_35,                                      Sch name = LED16_B
166 
#NET "RGB2_Red"                 LOC = "K6"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_0_34,                                                         Sch name = LED17_R
167 
#NET "RGB2_Green"               LOC = "H6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_24P_T3_35,                                            Sch name =  LED17_G
168 
#NET "RGB2_Blue"                LOC = "L16"     | IOSTANDARD = "LVCMOS33";              #Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14,                     Sch name = LED17_B
169 
 
170 
## 7 segment display
171 
#NET "seg<0>"                      LOC = "L3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L2N_T0_34,                                            Sch name = CA
172 
#NET "seg<1>"                      LOC = "N1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L3N_T0_DQS_34,                                        Sch name = CB
173 
#NET "seg<2>"                      LOC = "L5"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L6N_T0_VREF_34,                                       Sch name = CC
174 
#NET "seg<3>"                      LOC = "L4"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L5N_T0_34,                                            Sch name = CD
175 
#NET "seg<4>"                      LOC = "K3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L2P_T0_34,                                            Sch name = CE
176 
#NET "seg<5>"                      LOC = "M2"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L4N_T0_34,                                            Sch name = CF
177 
#NET "seg<6>"                      LOC = "L6"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L6P_T0_34,                                            Sch name = CG
178 
 
179 
#NET "dp"                               LOC = "M4"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L16P_T2_34,                                           Sch name = DP
180 
 
181 
#NET "an<0>"                       LOC = "N6"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L18N_T2_34,                                           Sch name = AN0
182 
#NET "an<1>"                       LOC = "M6"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L18P_T2_34,                                           Sch name = AN1
183 
#NET "an<2>"                       LOC = "M3"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L4P_T0_34,                                            Sch name = AN2
184 
#NET "an<3>"                       LOC = "N5"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L13_T2_MRCC_34,                                       Sch name = AN3
185 
#NET "an<4>"                       LOC = "N2"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L3P_T0_DQS_34,                                        Sch name = AN4
186 
#NET "an<5>"                       LOC = "N4"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L16N_T2_34,                                           Sch name = AN5
187 
#NET "an<6>"                       LOC = "L1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L1P_T0_34,                                            Sch name = AN6
188 
#NET "an<7>"                       LOC = "M1"      | IOSTANDARD = "LVCMOS33";              #Bank = 34, Pin name = IO_L1N_T034,                                                     Sch name = AN7
189 
 
190 
## Buttons
191 
#NET "btnCpuReset"              LOC = "C12"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15,                           Sch name = CPU_RESET
192 
#NET "btnC"                             LOC = "E16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L11N_T1_SRCC_15,                                      Sch name = BTNC
193 
#NET "btnU"                             LOC = "F15"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L14P_T2_SRCC_15,                                      Sch name = BTNU
194 
#NET "btnL"                             LOC = "T16"     | IOSTANDARD = "LVCMOS33";              #Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,        Sch name = BTNL
195 
#NET "btnR"                             LOC = "R10"     | IOSTANDARD = "LVCMOS33";              #Bank = 14, Pin name = IO_25_14,                                                        Sch name = BTNR
196 
#NET "btnD"                             LOC = "V10"     | IOSTANDARD = "LVCMOS33";              #Bank = 14, Pin name = IO_L21P_T3_DQS_14,                                       Sch name = BTND
197 
 
198 
## Pmod Header JA
199 
#Bank = 15, Pin name = IO_L1N_T0_AD0N_15,                                       Sch name = JA1
200 
#set_property PACKAGE_PIN B13 [get_ports {gpioA[6]}]
201 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:99
202 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[6]' has been applied to the port object 'gpioA[6]'.
203 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[6]}]
204 
#Bank = 15, Pin name = IO_L5N_T0_AD9N_15,                                       Sch name = JA2
205 
#set_property PACKAGE_PIN F14 [get_ports {gpioA[4]}]
206 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:100
207 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[4]' has been applied to the port object 'gpioA[4]'.
208 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[4]}]
209 
#Bank = 15, Pin name = IO_L16N_T2_A27_15,                                       Sch name = JA3
210 
#set_property PACKAGE_PIN D17 [get_ports {gpioA[1]}]
211 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:101
212 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[1]' has been applied to the port object 'gpioA[1]'.
213 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[1]}]
214 
#Bank = 15, Pin name = IO_L16P_T2_A28_15,                                       Sch name = JA4
215 
#set_property PACKAGE_PIN E17 [get_ports {gpioA[2]}]
216 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:102
217 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[2]' has been applied to the port object 'gpioA[2]'.
218 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[2]}]
219 
#NET "JA<4>"                       LOC = "G13"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_0_15,                                                         Sch name = JA7
220 
#NET "JA<5>"                       LOC = "C17"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L20N_T3_A19_15,                                       Sch name = JA8
221 
#NET "JA<6>"                       LOC = "D18"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L21N_T3_A17_15,                                       Sch name = JA9
222 
#NET "JA<7>"                       LOC = "E18"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L21P_T3_DQS_15,                                       Sch name = JA10
223 
 
224 
## Pmod Header JB
225 
#NET "JB<0>"                       LOC = "G14"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L15N_T2_DQS_ADV_B_15,                         Sch name = JB1
226 
#NET "JB<1>"                       LOC = "P15"     | IOSTANDARD = "LVCMOS33";              #Bank = 14, Pin name = IO_L13P_T2_MRCC_14,                                      Sch name = JB2
227 
#NET "JB<2>"                       LOC = "V11"     | IOSTANDARD = "LVCMOS33";              #Bank = 14, Pin name = IO_L21N_T3_DQS_A06_D22_14,                       Sch name = JB3
228 
#NET "JB<3>"                       LOC = "V15"     | IOSTANDARD = "LVCMOS33";              #Bank = CONFIG, Pin name = IO_L16P_T2_CSI_B_14,                         Sch name = JB4
229 
#NET "JB<4>"                       LOC = "K16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_25_15,                                                        Sch name = JB7
230 
#NET "JB<5>"                       LOC = "R16"     | IOSTANDARD = "LVCMOS33";              #Bank = CONFIG, Pin name = IO_L15P_T2_DQS_RWR_B_14,                     Sch name = JB8
231 
#NET "JB<6>"                       LOC = "T9"  | IOSTANDARD = "LVCMOS33";          #Bank = 14, Pin name = IO_L24P_T3_A01_D17_14,                           Sch name = JB9
232 
#NET "JB<7>"                       LOC = "U11"     | IOSTANDARD = "LVCMOS33";              #Bank = 14, Pin name = IO_L19N_T3_A09_D25_VREF_14,                      Sch name = JB10
233 
 
234 
## Pmod Header JC
235 
#NET "JC<0>"                       LOC = "K2"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L23P_T3_35,                                           Sch name = JC1
236 
#NET "JC<1>"                       LOC = "E7"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L6P_T0_35,                                            Sch name = JC2
237 
#NET "JC<2>"                       LOC = "J3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L22P_T3_35,                                           Sch name = JC3
238 
#NET "JC<3>"                       LOC = "J4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L21P_T3_DQS_35,                                       Sch name = JC4
239 
#NET "JC<4>"                       LOC = "K1"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L23N_T3_35,                                           Sch name = JC7
240 
#NET "JC<5>"                       LOC = "E6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L5P_T0_AD13P_35,                                      Sch name = JC8
241 
#NET "JC<6>"                       LOC = "J2"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L22N_T3_35,                                           Sch name = JC9
242 
#NET "JC<7>"                       LOC = "G6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L19P_T3_35,                                           Sch name = JC10
243 
 
244 
## Pmod Header JD
245 
#NET "JD<0>"                       LOC = "H4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L21N_T2_DQS_35,                                       Sch name = JD1
246 
#NET "JD<1>"                       LOC = "H1"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L17P_T2_35,                                           Sch name = JD2
247 
#NET "JD<2>"                       LOC = "G1"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L17N_T2_35,                                           Sch name = JD3
248 
#NET "JD<3>"                       LOC = "G3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L20N_T3_35,                                           Sch name = JD4
249 
#NET "JD<4>"                       LOC = "H2"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L15P_T2_DQS_35,                                       Sch name = JD7
250 
#NET "JD<5>"                       LOC = "G4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L20P_T3_35,                                           Sch name = JD8
251 
#NET "JD<6>"                       LOC = "G2"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L15N_T2_DQS_35,                                       Sch name = JD9
252 
#NET "JD<7>"                       LOC = "F3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L13N_T2_MRCC_35,                                      Sch name = JD10
253 
 
254 
## Pmod Header JXADC
255 
#NET "JXADC<0>"                    LOC = "A13"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L9P_T1_DQS_AD3P_15,                           Sch name = XADC1_P -> XA1_P
256 
#NET "JXADC<1>"                    LOC = "A15"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L8P_T1_AD10P_15,                                      Sch name = XADC2_P -> XA2_P
257 
#NET "JXADC<2>"                    LOC = "B16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L7P_T1_AD2P_15,                                       Sch name = XADC3_P -> XA3_P
258 
#NET "JXADC<3>"                    LOC = "B18"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L10P_T1_AD11P_15,                                     Sch name = XADC4_P -> XA4_P
259 
#NET "JXADC<4>"                    LOC = "A14"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L9N_T1_DQS_AD3N_15,                           Sch name = XADC1_N -> XA1_N
260 
#NET "JXADC<5>"                    LOC = "A16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L8N_T1_AD10N_15,                                      Sch name = XADC2_N -> XA2_N
261 
#NET "JXADC<6>"                    LOC = "B17"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L7N_T1_AD2N_15,                                       Sch name = XADC3_N -> XA3_N
262 
#NET "JXADC<7>"                    LOC = "A18"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L10N_T1_AD11N_15,                                     Sch name = XADC4_N -> XA4_N
263 
 
264 
## VGA Connector
265 
#NET "vgaRed<0>"           LOC = "A3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L8N_T1_AD14N_35,                                      Sch name = VGA_R0
266 
#NET "vgaRed<1>"           LOC = "B4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L7N_T1_AD6N_35,                                       Sch name = VGA_R1
267 
#NET "vgaRed<2>"           LOC = "C5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L1N_T0_AD4N_35,                                       Sch name = VGA_R2
268 
#NET "vgaRed<3>"           LOC = "A4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L8P_T1_AD14P_35,                                      Sch name = VGA_R3
269 
#NET "vgaBlue<0>"          LOC = "B7"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L2P_T0_AD12P_35,                                      Sch name = VGA_B0
270 
#NET "vgaBlue<1>"          LOC = "C7"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L4N_T0_35,                                            Sch name = VGA_B1
271 
#NET "vgaBlue<2>"          LOC = "D7"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L6N_T0_VREF_35,                                       Sch name = VGA_B2
272 
#NET "vgaBlue<3>"          LOC = "D8"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L4P_T0_35,                                            Sch name = VGA_B3
273 
#NET "vgaGreen<0>"         LOC = "C6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L1P_T0_AD4P_35,                                       Sch name = VGA_G0
274 
#NET "vgaGreen<1>"         LOC = "A5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L3N_T0_DQS_AD5N_35,                           Sch name = VGA_G1
275 
#NET "vgaGreen<2>"         LOC = "B6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L2N_T0_AD12N_35,                                      Sch name = VGA_G2
276 
#NET "vgaGreen<3>"         LOC = "A6"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L3P_T0_DQS_AD5P_35,                           Sch name = VGA_G3
277 
#NET "Hsync"                    LOC = "B11"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L4P_T0_15,                                            Sch name = VGA_HS
278 
#NET "Vsync"                    LOC = "B12"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L3N_T0_DQS_AD1N_15,                           Sch name = VGA_BVS
279 
 
280 
## Micro SD Connector
281 
#NET "sdReset"                  LOC = "E2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L14P_T2_SRCC_35,                                      Sch name = SD_RESET
282 
#NET "sdCD"                             LOC = "A1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35,                           Sch name = SD_CD
283 
#NET "sdSCK"                    LOC = "B1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35,                           Sch name = SD_SCK
284 
#NET "sdCmd"                    LOC = "C1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L16N_T2_35,                                           Sch name = SD_CMD
285 
#NET "sdData<0>"           LOC = "C2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L16P_T2_35,                                                   Sch name = SD_DAT0
286 
#NET "sdData<1>"           LOC = "E1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L18N_T2_35,                                           Sch name = SD_DAT1
287 
#NET "sdData<2>"           LOC = "F1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L18P_T2_35,                                           Sch name = SD_DAT2
288 
#NET "sdData<3>"           LOC = "D2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L14N_T2_SRCC_35,                                      Sch name = SD_DAT3
289 
 
290 
#NET "sdReset"          LOC = "E2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L14P_T2_SRCC_35,                                      Sch name = SD_RESET
291 
#NET "gpioA<1>"            LOC = "F1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L18P_T2_35,                                           Sch name = SD_DAT2
292 
#NET "gpioA<2>"    LOC = "E1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L18N_T2_35,                                           Sch name = SD_DAT1
293 
#NET "sdVdd"            LOC = "C1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L16N_T2_35,                                           Sch name = SD_CMD
294 
#NET "gpioA<4>"            LOC = "B1"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35,                           Sch name = SD_SCK
295 
#NET "sdVss"            LOC = "D2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L14N_T2_SRCC_35,                                      Sch name = SD_DAT3
296 
#NET "gpioA<6>"            LOC = "C2"  | IOSTANDARD = "LVCMOS33";          #Bank = 35, Pin name = IO_L16P_T2_35,                                                   Sch name = SD_DAT0
297 
#Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35,                           Sch name = SD_CD
298 
#set_property PACKAGE_PIN A1 [get_ports {gpioA[7]}]
299 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:181
300 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'gpioA[7]' has been applied to the port object 'gpioA[7]'.
301 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[7]}]
302 
 
303 
 
304 
##Micro SD Connector
305 
##Bank = 35, Pin name = IO_L14P_T2_SRCC_35,                                     Sch name = SD_RESET
306 
set_property PACKAGE_PIN E2 [get_ports {sdreset}]
307 
set_property IOSTANDARD LVCMOS33 [get_ports {sdreset}]
308 
##Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35,                          Sch name = SD_CD
309 
#set_property PACKAGE_PIN A1 [get_ports {gpioA[2]}]
310 
#set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[2]}]
311 
##Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35,                          Sch name = SD_SCK
312 
set_property PACKAGE_PIN B1 [get_ports {gpioA[4]}]
313 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[4]}]
314 
##Bank = 35, Pin name = IO_L16N_T2_35,                                          Sch name = SD_CMD
315 
set_property PACKAGE_PIN C1 [get_ports {gpioA[6]}]
316 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[6]}]
317 
##Bank = 35, Pin name = IO_L16P_T2_35,                                          Sch name = SD_DAT0
318 
set_property PACKAGE_PIN C2 [get_ports {gpioA[7]}]
319 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[7]}]
320 
##Bank = 35, Pin name = IO_L18N_T2_35,                                          Sch name = SD_DAT1
321 
#set_property PACKAGE_PIN E1 [get_ports {sdData[1]}]
322 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[1]}]
323 
##Bank = 35, Pin name = IO_L18P_T2_35,                                          Sch name = SD_DAT2
324 
#set_property PACKAGE_PIN F1 [get_ports {sdData[2]}]
325 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[2]}]
326 
##Bank = 35, Pin name = IO_L14N_T2_SRCC_35,                                     Sch name = SD_DAT3
327 
set_property PACKAGE_PIN D2 [get_ports {gpioA[2]}]
328 
set_property IOSTANDARD LVCMOS33 [get_ports {gpioA[2]}]
329 
 
330 
set_property PACKAGE_PIN D13 [get_ports {miso}]
331 
set_property IOSTANDARD LVCMOS33 [get_ports {miso}]
332 
set_property PACKAGE_PIN B14 [get_ports {mosi}]
333 
set_property IOSTANDARD LVCMOS33 [get_ports {mosi}]
334 
set_property PACKAGE_PIN D15 [get_ports {sclk}]
335 
set_property IOSTANDARD LVCMOS33 [get_ports {sclk}]
336 
set_property PACKAGE_PIN C15 [get_ports {acl_sel}]
337 
set_property IOSTANDARD LVCMOS33 [get_ports {acl_sel}]
338 
 
339 
## Accelerometer
340 
#NET "aclMISO"                  LOC = "D13"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L6N_T0_VREF_15,                                       Sch name = ACL_MISO
341 
#NET "aclMOSI"                  LOC = "B14"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L2N_T0_AD8N_15,                                       Sch name = ACL_MOSI
342 
#NET "aclSCK"                   LOC = "D15"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L12P_T1_MRCC_15,                                      Sch name = ACL_SCLK
343 
#NET "aclSS"                    LOC = "C15"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L12N_T1_MRCC_15,                                      Sch name = ACL_CSN
344 
#NET "aclInt1"                  LOC = "C16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L20P_T3_A20_15,                                       Sch name = ACL_INT1
345 
#NET "aclInt2"                  LOC = "E15"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L11P_T1_SRCC_15,                                      Sch name = ACL_INT2
346 
 
347 
## Temperature Sensor
348 
#NET "tmpSCL"                   LOC = "F16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L14N_T2_SRCC_15,                                      Sch name = TMP_SCL
349 
#NET "tmpSDA"                   LOC = "G16"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L13N_T2_MRCC_15,                                      Sch name = TMP_SDA
350 
#NET "tmpInt"                   LOC = "D14"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L1P_T0_AD0P_15,                                       Sch name = TMP_INT
351 
#NET "tmpCT"                    LOC = "C14"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L1N_T0_AD0N_15,                                       Sch name = TMP_CT
352 
 
353 
## Omnidirectional Microphone
354 
#NET "micClk"                   LOC = "J5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_25_35,                                                                Sch name = M_CLK
355 
#NET "micData"                  LOC = "H5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L24N_T3_35,                                           Sch name = M_DATA
356 
#NET "micLRSel"                 LOC = "F5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_0_35,                                                         Sch name = M_LRSEL
357 
 
358 
## PWM Audio Amplifier
359 
#NET "ampPWM"                   LOC = "A11"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L4N_T0_15,                                            Sch name = AUD_PWM
360 
#NET "ampSD"                    LOC = "D12"     | IOSTANDARD = "LVCMOS33";              #Bank = 15, Pin name = IO_L6P_T0_15,                                            Sch name = AUD_SD
361 
 
362 
## USB-RS232 Interface
363 
#NET "RsRx"                             LOC = "C4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L7P_T1_AD6P_35,                                       Sch name = UART_TXD_IN
364 
#NET "RsTx"                             LOC = "D4"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L11N_T1_SRCC_35,                                      Sch name = UART_RXD_OUT
365 
#NET "RsCts"                    LOC = "D3"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L12N_T1_MRCC_35,                                      Sch name = UART_CTS
366 
#NET "RsRts"                    LOC = "E5"      | IOSTANDARD = "LVCMOS33";              #Bank = 35, Pin name = IO_L5N_T0_AD13N_35,                                      Sch name = UART_RTS
367 
 
368 
## USB HID (PS/2)
369 
#NET "PS2Clk"                   LOC = "F4"      | PULLUP | IOSTANDARD = "LVCMOS33";             #Bank = 35, Pin name = IO_L13P_T2_MRCC_35,                                      Sch name = PS2_CLK
370 
#NET "PS2Data"                  LOC = "B2"      | PULLUP | IOSTANDARD = "LVCMOS33";             #Bank = 35, Pin name = IO_L10N_T1_AD15N_35,                                     Sch name = PS2_DATA
371 
 
372 
## SMSC Ethernet PHY
373 
##SMSC Ethernet PHY
374 
##Bank = 16, Pin name = IO_L11P_T1_SRCC_16,                                     Sch name = ETH_MDC
375 
set_property PACKAGE_PIN C9 [get_ports PhyMdc]
376 
set_property IOSTANDARD LVCMOS33 [get_ports PhyMdc]
377 
##Bank = 16, Pin name = IO_L14N_T2_SRCC_16,                                     Sch name = ETH_MDIO
378 
set_property PACKAGE_PIN A9 [get_ports PhyMdio]
379 
set_property IOSTANDARD LVCMOS33 [get_ports PhyMdio]
380 
##Bank = 35, Pin name = IO_L10P_T1_AD15P_35,                                    Sch name = ETH_RSTN
381 
set_property PACKAGE_PIN B3 [get_ports PhyRstn]
382 
set_property IOSTANDARD LVCMOS33 [get_ports PhyRstn]
383 
##Bank = 16, Pin name = IO_L6N_T0_VREF_16,                                      Sch name = ETH_CRSDV
384 
set_property PACKAGE_PIN D9 [get_ports PhyCrs]
385 
set_property IOSTANDARD LVCMOS33 [get_ports PhyCrs]
386 
##Bank = 16, Pin name = IO_L13N_T2_MRCC_16,                                     Sch name = ETH_RXERR
387 
set_property PACKAGE_PIN C10 [get_ports PhyRxErr]
388 
set_property IOSTANDARD LVCMOS33 [get_ports PhyRxErr]
389 
##Bank = 16, Pin name = IO_L19N_T3_VREF_16,                                     Sch name = ETH_RXD0
390 
set_property PACKAGE_PIN D10 [get_ports {PhyRxd[0]}]
391 
set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[0]}]
392 
##Bank = 16, Pin name = IO_L13P_T2_MRCC_16,                                     Sch name = ETH_RXD1
393 
set_property PACKAGE_PIN C11 [get_ports {PhyRxd[1]}]
394 
set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[1]}]
395 
##Bank = 16, Pin name = IO_L11N_T1_SRCC_16,                                     Sch name = ETH_TXEN
396 
set_property PACKAGE_PIN B9 [get_ports PhyTxEn]
397 
set_property IOSTANDARD LVCMOS33 [get_ports PhyTxEn]
398 
##Bank = 16, Pin name = IO_L14P_T2_SRCC_16,                                     Sch name = ETH_TXD0
399 
set_property PACKAGE_PIN A10 [get_ports {PhyTxd[0]}]
400 
set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[0]}]
401 
##Bank = 16, Pin name = IO_L12N_T1_MRCC_16,                                     Sch name = ETH_TXD1
402 
set_property PACKAGE_PIN A8 [get_ports {PhyTxd[1]}]
403 
set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[1]}]
404 
##Bank = 35, Pin name = IO_L11P_T1_SRCC_35,                                     Sch name = ETH_REFCLK
405 
set_property PACKAGE_PIN D5 [get_ports PhyClk50Mhz]
406 
set_property IOSTANDARD LVCMOS33 [get_ports PhyClk50Mhz]
407 
##Bank = 16, Pin name = IO_L12P_T1_MRCC_16,                                     Sch name = ETH_INTN
408 
set_property PACKAGE_PIN B8 [get_ports PhyIntn]
409 
set_property IOSTANDARD LVCMOS33 [get_ports PhyIntn]
410 
 
411 
## Quad SPI Flash
412 
#NET "sdclk"            LOC = "E9"      ;               #Bank = CONFIG, Pin name = CCLK_0,                                                      Sch name = QSPI_SCK
413 
#Bank = CONFIG, Pin name = IO_L1P_T0_D00_MOSI_14,                       Sch name = QSPI_DQ0
414 
set_property PACKAGE_PIN K17 [get_ports sdout]
415 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:234
416 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'sdout' has been applied to the port object 'sdout'.
417 
set_property IOSTANDARD LVCMOS33 [get_ports sdout]
418 
#Bank = CONFIG, Pin name = IO_L1N_T0_D01_DIN_14,                        Sch name = QSPI_DQ1
419 
set_property PACKAGE_PIN K18 [get_ports sdin]
420 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:235
421 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'sdin' has been applied to the port object 'sdin'.
422 
set_property IOSTANDARD LVCMOS33 [get_ports sdin]
423 
#Bank = CONFIG, Pin name = IO_L20_T0_D02_14,                            Sch name = QSPI_DQ2
424 
set_property PACKAGE_PIN L14 [get_ports sdwp]
425 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:236
426 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'sdwp' has been applied to the port object 'sdwp'.
427 
set_property IOSTANDARD LVCMOS33 [get_ports sdwp]
428 
#Bank = CONFIG, Pin name = IO_L2P_T0_D03_14,                            Sch name = QSPI_DQ3
429 
set_property PACKAGE_PIN M14 [get_ports sdhld]
430 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:237
431 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'sdhld' has been applied to the port object 'sdhld'.
432 
set_property IOSTANDARD LVCMOS33 [get_ports sdhld]
433 
#Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,        Sch name = QSPI_CSN
434 
set_property PACKAGE_PIN L13 [get_ports sdcs]
435 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:238
436 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'sdcs' has been applied to the port object 'sdcs'.
437 
set_property IOSTANDARD LVCMOS33 [get_ports sdcs]
438 
 
439 
## Cellular RAM
440 
#Bank = 14, Pin name = IO_L14N_T2_SRCC_14,                                      Sch name = CRAM_CLK
441 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:241
442 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extCLK' has been applied to the port object 'extCLK'.
443 
set_property PACKAGE_PIN T15 [get_ports extCLK]
444 
set_property IOSTANDARD LVCMOS33 [get_ports extCLK]
445 
#Bank = 14, Pin name = IO_L23P_T3_A03_D19_14,                           Sch name = CRAM_ADVN
446 
set_property PACKAGE_PIN T13 [get_ports extADV]
447 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:242
448 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extADV' has been applied to the port object 'extADV'.
449 
set_property IOSTANDARD LVCMOS33 [get_ports extADV]
450 
#Bank = 14, Pin name = IO_L4P_T0_D04_14,                                        Sch name = CRAM_CEN
451 
set_property PACKAGE_PIN L18 [get_ports extCSN]
452 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:243
453 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extCSN' has been applied to the port object 'extCSN'.
454 
set_property IOSTANDARD LVCMOS33 [get_ports extCSN]
455 
#Bank = 15, Pin name = IO_L19P_T3_A22_15,                                       Sch name = CRAM_CRE
456 
set_property PACKAGE_PIN J14 [get_ports extCRE]
457 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:244
458 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extCRE' has been applied to the port object 'extCRE'.
459 
set_property IOSTANDARD LVCMOS33 [get_ports extCRE]
460 
#Bank = 15, Pin name = IO_L15P_T2_DQS_15,                                       Sch name = CRAM_OEN
461 
set_property PACKAGE_PIN H14 [get_ports extOE]
462 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:245
463 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extOE' has been applied to the port object 'extOE'.
464 
set_property IOSTANDARD LVCMOS33 [get_ports extOE]
465 
#Bank = 14, Pin name = IO_0_14,                                                         Sch name = CRAM_WEN
466 
set_property PACKAGE_PIN R11 [get_ports extWEN]
467 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:246
468 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extWEN' has been applied to the port object 'extWEN'.
469 
set_property IOSTANDARD LVCMOS33 [get_ports extWEN]
470 
#Bank = 15, Pin name = IO_L24N_T3_RS0_15,                                       Sch name = CRAM_LBN
471 
set_property PACKAGE_PIN J15 [get_ports extLB]
472 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:247
473 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extLB' has been applied to the port object 'extLB'.
474 
set_property IOSTANDARD LVCMOS33 [get_ports extLB]
475 
#Bank = 15, Pin name = IO_L17N_T2_A25_15,                                       Sch name = CRAM_UBN
476 
set_property PACKAGE_PIN J13 [get_ports extUB]
477 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:248
478 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extUB' has been applied to the port object 'extUB'.
479 
set_property IOSTANDARD LVCMOS33 [get_ports extUB]
480 
#Bank = 14, Pin name = IO_L14P_T2_SRCC_14,                                      Sch name = CRAM_WAIT
481 
#set_property PACKAGE_PIN T14 [get_ports extWAIT]
482 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:249
483 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extWAIT' has been applied to the port object 'extWAIT'.
484 
#set_property IOSTANDARD LVCMOS33 [get_ports extWAIT]
485 
 
486 
#Bank = 14, Pin name = IO_L5P_T0_DQ06_14,                                       Sch name = CRAM_DQ0
487 
set_property PACKAGE_PIN R12 [get_ports {extDB[0]}]
488 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:251
489 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[0]' has been applied to the port object 'extDB[0]'.
490 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[0]}]
491 
#Bank = 14, Pin name = IO_L19P_T3_A10_D26_14,                           Sch name = CRAM_DQ1
492 
set_property PACKAGE_PIN T11 [get_ports {extDB[1]}]
493 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:252
494 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[1]' has been applied to the port object 'extDB[1]'.
495 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[1]}]
496 
#Bank = 14, Pin name = IO_L20P_T3_A08)D24_14,                           Sch name = CRAM_DQ2
497 
set_property PACKAGE_PIN U12 [get_ports {extDB[2]}]
498 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:253
499 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[2]' has been applied to the port object 'extDB[2]'.
500 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[2]}]
501 
#Bank = 14, Pin name = IO_L5N_T0_D07_14,                                        Sch name = CRAM_DQ3
502 
set_property PACKAGE_PIN R13 [get_ports {extDB[3]}]
503 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:254
504 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[3]' has been applied to the port object 'extDB[3]'.
505 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[3]}]
506 
#Bank = 14, Pin name = IO_L17N_T2_A13_D29_14,                           Sch name = CRAM_DQ4
507 
set_property PACKAGE_PIN U18 [get_ports {extDB[4]}]
508 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:255
509 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[4]' has been applied to the port object 'extDB[4]'.
510 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[4]}]
511 
#Bank = 14, Pin name = IO_L12N_T1_MRCC_14,                                      Sch name = CRAM_DQ5
512 
set_property PACKAGE_PIN R17 [get_ports {extDB[5]}]
513 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:256
514 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[5]' has been applied to the port object 'extDB[5]'.
515 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[5]}]
516 
#Bank = 14, Pin name = IO_L7N_T1_D10_14,                                        Sch name = CRAM_DQ6
517 
set_property PACKAGE_PIN T18 [get_ports {extDB[6]}]
518 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:257
519 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[6]' has been applied to the port object 'extDB[6]'.
520 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[6]}]
521 
#Bank = 14, Pin name = IO_L7P_T1_D09_14,                                        Sch name = CRAM_DQ7
522 
set_property PACKAGE_PIN R18 [get_ports {extDB[7]}]
523 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:258
524 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[7]' has been applied to the port object 'extDB[7]'.
525 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[7]}]
526 
#Bank = 15, Pin name = IO_L22N_T3_A16_15,                                       Sch name = CRAM_DQ8
527 
set_property PACKAGE_PIN F18 [get_ports {extDB[8]}]
528 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:259
529 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[8]' has been applied to the port object 'extDB[8]'.
530 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[8]}]
531 
#Bank = 15, Pin name = IO_L22P_T3_A17_15,                                       Sch name = CRAM_DQ9
532 
set_property PACKAGE_PIN G18 [get_ports {extDB[9]}]
533 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:260
534 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[9]' has been applied to the port object 'extDB[9]'.
535 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[9]}]
536 
#Bank = 15, Pin name = IO_IO_L18N_T2_A23_15,                            Sch name = CRAM_DQ10
537 
set_property PACKAGE_PIN G17 [get_ports {extDB[10]}]
538 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:261
539 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[10]' has been applied to the port object 'extDB[10]'.
540 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[10]}]
541 
#Bank = 14, Pin name = IO_L4N_T0_D05_14,                                        Sch name = CRAM_DQ11
542 
set_property PACKAGE_PIN M18 [get_ports {extDB[11]}]
543 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:262
544 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[11]' has been applied to the port object 'extDB[11]'.
545 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[11]}]
546 
#Bank = 14, Pin name = IO_L10N_T1_D15_14,                                       Sch name = CRAM_DQ12
547 
set_property PACKAGE_PIN M17 [get_ports {extDB[12]}]
548 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:263
549 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[12]' has been applied to the port object 'extDB[12]'.
550 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[12]}]
551 
#Bank = 14, Pin name = IO_L9N_T1_DQS_D13_14,                            Sch name = CRAM_DQ13
552 
set_property PACKAGE_PIN P18 [get_ports {extDB[13]}]
553 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:264
554 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[13]' has been applied to the port object 'extDB[13]'.
555 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[13]}]
556 
#Bank = 14, Pin name = IO_L9P_T1_DQS_14,                                        Sch name = CRAM_DQ14
557 
set_property PACKAGE_PIN N17 [get_ports {extDB[14]}]
558 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:265
559 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[14]' has been applied to the port object 'extDB[14]'.
560 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[14]}]
561 
#Bank = 14, Pin name = IO_L12P_T1_MRCC_14,                                      Sch name = CRAM_DQ15
562 
set_property PACKAGE_PIN P17 [get_ports {extDB[15]}]
563 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:266
564 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extDB[15]' has been applied to the port object 'extDB[15]'.
565 
set_property IOSTANDARD LVCMOS33 [get_ports {extDB[15]}]
566 
 
567 
#Bank = 15, Pin name = IO_L23N_T3_FWE_B_15,                                     Sch name = CRAM_A0
568 
set_property PACKAGE_PIN J18 [get_ports {extA[1]}]
569 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:268
570 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[1]' has been applied to the port object 'extA[1]'.
571 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[1]}]
572 
#Bank = 15, Pin name = IO_L18P_T2_A24_15,                                       Sch name = CRAM_A1
573 
set_property PACKAGE_PIN H17 [get_ports {extA[2]}]
574 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:269
575 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[2]' has been applied to the port object 'extA[2]'.
576 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[2]}]
577 
#Bank = 15, Pin name = IO_L19N_T3_A21_VREF_15,                          Sch name = CRAM_A2
578 
set_property PACKAGE_PIN H15 [get_ports {extA[3]}]
579 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:270
580 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[3]' has been applied to the port object 'extA[3]'.
581 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[3]}]
582 
#Bank = 15, Pin name = IO_L23P_T3_FOE_B_15,                                     Sch name = CRAM_A3
583 
set_property PACKAGE_PIN J17 [get_ports {extA[4]}]
584 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:271
585 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[4]' has been applied to the port object 'extA[4]'.
586 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[4]}]
587 
#Bank = 15, Pin name = IO_L13P_T2_MRCC_15,                                      Sch name = CRAM_A4
588 
set_property PACKAGE_PIN H16 [get_ports {extA[5]}]
589 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:272
590 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[5]' has been applied to the port object 'extA[5]'.
591 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[5]}]
592 
#Bank = 15, Pin name = IO_L24P_T3_RS1_15,                                       Sch name = CRAM_A5
593 
set_property PACKAGE_PIN K15 [get_ports {extA[6]}]
594 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:273
595 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[6]' has been applied to the port object 'extA[6]'.
596 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[6]}]
597 
#Bank = 15, Pin name = IO_L17P_T2_A26_15,                                       Sch name = CRAM_A6
598 
set_property PACKAGE_PIN K13 [get_ports {extA[7]}]
599 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:274
600 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[7]' has been applied to the port object 'extA[7]'.
601 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[7]}]
602 
#Bank = 14, Pin name = IO_L11P_T1_SRCC_14,                                      Sch name = CRAM_A7
603 
set_property PACKAGE_PIN N15 [get_ports {extA[8]}]
604 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:275
605 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[8]' has been applied to the port object 'extA[8]'.
606 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[8]}]
607 
#Bank = 14, Pin name = IO_L16N_T2_SRCC-14,                                      Sch name = CRAM_A8
608 
set_property PACKAGE_PIN V16 [get_ports {extA[9]}]
609 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:276
610 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[9]' has been applied to the port object 'extA[9]'.
611 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[9]}]
612 
#Bank = 14, Pin name = IO_L22P_T3_A05_D21_14,                           Sch name = CRAM_A9
613 
set_property PACKAGE_PIN U14 [get_ports {extA[10]}]
614 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:277
615 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[10]' has been applied to the port object 'extA[10]'.
616 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[10]}]
617 
#Bank = 14, Pin name = IO_L22N_T3_A04_D20_14,                           Sch name = CRAM_A10
618 
set_property PACKAGE_PIN V14 [get_ports {extA[11]}]
619 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:278
620 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[11]' has been applied to the port object 'extA[11]'.
621 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[11]}]
622 
#Bank = 14, Pin name = IO_L20N_T3_A07_D23_14,                           Sch name = CRAM_A11
623 
set_property PACKAGE_PIN V12 [get_ports {extA[12]}]
624 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:279
625 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[12]' has been applied to the port object 'extA[12]'.
626 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[12]}]
627 
#Bank = 14, Pin name = IO_L8N_T1_D12_14,                                        Sch name = CRAM_A12
628 
set_property PACKAGE_PIN P14 [get_ports {extA[13]}]
629 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:280
630 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[13]' has been applied to the port object 'extA[13]'.
631 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[13]}]
632 
#Bank = 14, Pin name = IO_L18P_T2_A12_D28_14,                           Sch name = CRAM_A13
633 
set_property PACKAGE_PIN U16 [get_ports {extA[14]}]
634 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:281
635 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[14]' has been applied to the port object 'extA[14]'.
636 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[14]}]
637 
#Bank = 14, Pin name = IO_L13N_T2_MRCC_14,                                      Sch name = CRAM_A14
638 
set_property PACKAGE_PIN R15 [get_ports {extA[15]}]
639 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:282
640 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[15]' has been applied to the port object 'extA[15]'.
641 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[15]}]
642 
#Bank = 14, Pin name = IO_L8P_T1_D11_14,                                        Sch name = CRAM_A15
643 
set_property PACKAGE_PIN N14 [get_ports {extA[16]}]
644 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:283
645 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[16]' has been applied to the port object 'extA[16]'.
646 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[16]}]
647 
#Bank = 14, Pin name = IO_L11N_T1_SRCC_14,                                      Sch name = CRAM_A16
648 
set_property PACKAGE_PIN N16 [get_ports {extA[17]}]
649 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:284
650 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[17]' has been applied to the port object 'extA[17]'.
651 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[17]}]
652 
#Bank = 14, Pin name = IO_L6N_T0_D08_VREF_14,                           Sch name = CRAM_A17
653 
set_property PACKAGE_PIN M13 [get_ports {extA[18]}]
654 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:285
655 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[18]' has been applied to the port object 'extA[18]'.
656 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[18]}]
657 
#Bank = 14, Pin name = IO_L18N_T2_A11_D27_14,                           Sch name = CRAM_A18
658 
set_property PACKAGE_PIN V17 [get_ports {extA[19]}]
659 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:286
660 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[19]' has been applied to the port object 'extA[19]'.
661 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[19]}]
662 
#Bank = 14, Pin name = IO_L17P_T2_A14_D30_14,                           Sch name = CRAM_A19
663 
set_property PACKAGE_PIN U17 [get_ports {extA[20]}]
664 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:287
665 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[20]' has been applied to the port object 'extA[20]'.
666 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[20]}]
667 
#Bank = 14, Pin name = IO_L24N_T3_A00_D16_14,                           Sch name = CRAM_A20
668 
set_property PACKAGE_PIN T10 [get_ports {extA[21]}]
669 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:288
670 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[21]' has been applied to the port object 'extA[21]'.
671 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[21]}]
672 
#Bank = 14, Pin name = IO_L10P_T1_D14_14,                                       Sch name = CRAM_A21
673 
set_property PACKAGE_PIN M16 [get_ports {extA[22]}]
674 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:289
675 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[22]' has been applied to the port object 'extA[22]'.
676 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[22]}]
677 
#Bank = 14, Pin name = IO_L23N_T3_A02_D18_14,                           Sch name = CRAM_A22
678 
set_property PACKAGE_PIN U13 [get_ports {extA[23]}]
679 
# /home/leo/cpu/vault.memo/v10.1/TOP_SYS.ucf:290
680 
# The conversion of 'IOSTANDARD' constraint on 'net' object 'extA[23]' has been applied to the port object 'extA[23]'.
681 
set_property IOSTANDARD LVCMOS33 [get_ports {extA[23]}]
682 
 
683 
 
684 
 
685 
#create_pblock pblock_i_vliw
686 
#add_cells_to_pblock [get_pblocks pblock_i_vliw] [get_cells -quiet [list v586/ucore/i_vliw]]
687 
#resize_pblock [get_pblocks pblock_i_vliw] -add {CLOCKREGION_X1Y2:CLOCKREGION_X1Y3}
688 
#create_pblock pblock_i_deco
689 
#add_cells_to_pblock [get_pblocks pblock_i_deco] [get_cells -quiet [list v586/ucore/i_deco]]
690 
#resize_pblock [get_pblocks pblock_i_deco] -add {CLOCKREGION_X0Y3:CLOCKREGION_X1Y3}
691 
#create_pblock pblock_i_useq
692 
#add_cells_to_pblock [get_pblocks pblock_i_useq] [get_cells -quiet [list v586/ucore/i_useq]]
693 
#resize_pblock [get_pblocks pblock_i_useq] -add {CLOCKREGION_X1Y1:CLOCKREGION_X1Y1}
694 
#create_pblock pblock_ubiu
695 
#add_cells_to_pblock [get_pblocks pblock_ubiu] [get_cells -quiet [list v586/ubiu]]
696 
#resize_pblock [get_pblocks pblock_ubiu] -add {CLOCKREGION_X0Y1:CLOCKREGION_X0Y2}
697 
 
698 
 
699 
 
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