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[/] [v586/] [trunk/] [soc_rtl/] [v8042_stub.v] - Blame information for rev 123

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module v8042(
input rst_n,
input clk,
input  [2:0] io_address,
input        io_read,
input        io_write,
input  [7:0] io_writedata,
output [7:0] io_readdata,
 
input        ps2data,
output       ps2clk
);
 
assign ps2clk = 0;
assign io_readdata = 8'h42;
 
endmodule

Line No.	Rev	Author	Line
1	121	ultro	`module v8042(`
2			`input rst_n,`
3			`input clk,`
4			`input [2:0] io_address,`
5			`input io_read,`
6			`input io_write,`
7			`input [7:0] io_writedata,`
8			`output [7:0] io_readdata,`
9
10			`input ps2data,`
11			`output ps2clk`
12			`);`
13
14			`assign ps2clk = 0;`
15			`assign io_readdata = 8'h42;`
16
17			`endmodule`

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[/] [v586/] [trunk/] [soc_rtl/] [v8042_stub.v] - Blame information for rev 123