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[/] [v65c816/] [trunk/] [mcpla.vhd] - Blame information for rev 3

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1 2 Valerio63 
library IEEE;
2 
use IEEE.std_logic_1164.all;  -- defines std_logic types
3 
use IEEE.STD_LOGIC_unsigned.all;
4 
use IEEE.STD_LOGIC_arith.all;
5 
 
6 
-- microcode 65C816
7 
-- Written by Valerio Venturi
8 
-- output fields format:
9 
-- fields:
10 
-- RSEL:  registers output multiplexer select
11 
-- REGOP: registers load/increment/decrement etc.
12 
-- ALUOP: ALU operation
13 
-- P_OP:  register P set/reset bit
14 
-- MPR:   register MP
15 
-- PCR:   register PC
16 
-- CLI:   clear interrupt request
17 
-- EI:    end of microcode sequence
18 
-- W:     read/write control
19 
-- PD:    PC/MP output multiplexer select
20 
-- VPA:   valid program address
21 
-- VDA:   valid data address
22 
-- ML:    memory lock
23 
entity mcpla is
24 
  port(em:  in STD_LOGIC;                           -- emulation mode (1)/native mode (0)
25 
        m:  in STD_LOGIC;                           -- M memory/acc. 8 bit (1), M memory/acc. 16 bit (0)
26 
        x:  in STD_LOGIC;                           -- X index reg. 8 bit (1), X index reg. 16 bit (0)
27 
        a:  in STD_LOGIC_VECTOR(12 downto 0);
28 
        q: out STD_LOGIC_VECTOR(44 downto 0)
29 
      );
30 
end mcpla;
31 
 
32 
architecture comb of mcpla is
33 
 
34 
constant  MC_ADDR_LENGTH: INTEGER := 12;
35 
-- opcode definition:
36 
-- <EXPANSION OPCODE (1 BIT) (WDM)>-<OPCODE (8 bits)>-<MICROCODE (4 BITS)>
37 
 
38 
------------------------------------
39 
--            IMPLIED             --
40 
------------------------------------
41 
constant   NOP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010100000"; -- 0xEA NOP
42 
 
43 
-- interrupts/coprocessor
44 
constant   BRK_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000000"; -- 0x00 BRK/IRQ/NMI/RES
45 
constant   BRK_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000001"; -- 0x00 BRK/IRQ/NMI/RES
46 
constant   BRK_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000010"; -- 0x00 BRK/IRQ/NMI/RES
47 
constant   BRK_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000011"; -- 0x00 BRK/IRQ/NMI/RES
48 
constant   BRK_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000100"; -- 0x00 BRK/IRQ/NMI/RES
49 
constant   BRK_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000101"; -- 0x00 BRK/IRQ/NMI/RES
50 
constant   BRK_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000110"; -- 0x00 BRK/IRQ/NMI/RES
51 
constant   BRK_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000000111"; -- 0x00 BRK/IRQ/NMI/RES
52 
 
53 
constant   COP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100000"; -- 0x02 COP
54 
constant   COP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100001"; -- 0x02 COP
55 
constant   COP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100010"; -- 0x02 COP
56 
constant   COP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100011"; -- 0x02 COP
57 
constant   COP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100100"; -- 0x02 COP
58 
constant   COP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100101"; -- 0x02 COP
59 
constant   COP_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100110"; -- 0x02 COP
60 
constant   COP_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000100111"; -- 0x02 COP
61 
 
62 
-- IMPLIED
63 
constant   CLC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110000000"; -- 0x18 CLC 0->C
64 
constant   SEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110000000"; -- 0x38 SEC 1->C
65 
constant   CLI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110000000"; -- 0x58 CLI 0->I
66 
constant   SEI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110000000"; -- 0x78 SEI 1->I
67 
constant   CLV_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110000000"; -- 0xB8 CLV 0->V
68 
constant   CLD_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110000000"; -- 0xD8 CLD 0->D
69 
constant   SED_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110000000"; -- 0xF8 SED 1->D
70 
constant   TAX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010100000"; -- 0xAA TAX A->X
71 
constant   TAY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010000000"; -- 0xA8 TAY A->Y
72 
constant   TXA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010100000"; -- 0x8A TXA X->A
73 
constant   TYA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110000000"; -- 0x98 TYA Y->A
74 
constant   TXY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110110000"; -- 0x9B TXY X->Y
75 
constant   TYX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110110000"; -- 0xBB TYX Y->X
76 
constant   TXS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110100000"; -- 0x9A TXS X->S
77 
constant   TSX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110100000"; -- 0xBA TSX S->X
78 
constant   TCD_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110110000"; -- 0x5B TCD C->D
79 
constant   TDC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110110000"; -- 0x7B TDC D->C
80 
constant   PHP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010000000"; -- 0x08 PHP P->S
81 
constant   PHA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010000000"; -- 0x48 PHA A->S
82 
constant   PHA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010000001"; -- 0x48 PHA A->S
83 
constant   PHX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110100000"; -- 0xDA PHX X->S
84 
constant   PHX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110100001"; -- 0xDA PHX X->S
85 
constant   PHY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110100000"; -- 0x5A PHY X->S
86 
constant   PHY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110100001"; -- 0x5A PHY X->S
87 
constant   PHD_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010110000"; -- 0x0B PHD D->S
88 
constant   PHD_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010110001"; -- 0x0B PHD D->S
89 
constant   PLP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010000000"; -- 0x28 PLP S->P
90 
constant   PLP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010000001"; -- 0x28 PLP S->P
91 
constant   PLA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010000000"; -- 0x68 PLA S->A
92 
constant   PLA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010000001"; -- 0x68 PLA S->A
93 
constant   PLA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010000010"; -- 0x68 PLA S->A
94 
constant   PLA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010000011"; -- 0x68 PLA S->A
95 
constant   PLX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110100000"; -- 0xFA PLX S->X
96 
constant   PLX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110100001"; -- 0xFA PLX S->X
97 
constant   PLX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110100010"; -- 0xFA PLX S->X
98 
constant   PLX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110100011"; -- 0xFA PLX S->X
99 
constant   PLY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110100000"; -- 0x7A PLY S->Y
100 
constant   PLY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110100001"; -- 0x7A PLY S->Y
101 
constant   PLY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110100010"; -- 0x7A PLY S->Y
102 
constant   PLY_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110100011"; -- 0x7A PLY S->Y
103 
constant   PLD_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010110000"; -- 0x2B PLD S->D
104 
constant   PLD_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010110001"; -- 0x2B PLD S->D
105 
constant   PLD_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010110010"; -- 0x2B PLD S->D
106 
constant   INC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110100000"; -- 0x1A INC A +1
107 
constant   DEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110100000"; -- 0x3A DEC A -1
108 
constant   INX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010000000"; -- 0xE8 INX X +1
109 
constant   DEX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010100000"; -- 0xCA DEX X -1
110 
constant   INY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010000000"; -- 0xC8 INY Y +1
111 
constant   DEY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010000000"; -- 0x88 DEY Y -1
112 
constant   RTS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000000000"; -- 0x60 RTS
113 
constant   RTS_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000000001"; -- 0x60 RTS
114 
constant   RTS_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000000010"; -- 0x60 RTS
115 
constant   RTS_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000000011"; -- 0x60 RTS
116 
constant   RTS_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000000100"; -- 0x60 RTS
117 
constant   RTI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000000"; -- 0x40 RTI
118 
constant   RTI_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000001"; -- 0x40 RTI
119 
constant   RTI_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000010"; -- 0x40 RTI
120 
constant   RTI_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000011"; -- 0x40 RTI
121 
constant   RTI_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000100"; -- 0x40 RTI
122 
constant   RTI_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000101"; -- 0x40 RTI
123 
constant   RTI_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000000110"; -- 0x40 RTI
124 
constant   ASL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010100000"; -- 0x0A ASL A
125 
constant   LSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010100000"; -- 0x4A LSR A
126 
constant   ROL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010100000"; -- 0x2A ROL A
127 
constant   ROR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010100000"; -- 0x6A ROR A
128 
constant   TCS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110110000"; -- 0x1B A->S
129 
constant   TSC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110110000"; -- 0x3B S->A
130 
constant   XCE_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110110000"; -- 0xFB XCE E<->C
131 
constant   WDM_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000100000"; -- 0x42 WDM
132 
constant   PHK_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010110000"; -- 0x4B PHK K->S
133 
constant   PHB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010110000"; -- 0x8B PHB B->S
134 
constant   PLB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010110000"; -- 0xAB PLB S->B
135 
constant   PLB_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010110001"; -- 0xAB PLB S->B
136 
constant   RTL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110000"; -- 0x6B RTL
137 
constant   RTL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110001"; -- 0x6B RTL
138 
constant   RTL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110010"; -- 0x6B RTL
139 
constant   RTL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110011"; -- 0x6B RTL
140 
constant   RTL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110100"; -- 0x6B RTL
141 
constant   RTL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110101"; -- 0x6B RTL
142 
constant   RTL_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010110110"; -- 0x6B RTL
143 
constant   XBA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010110000"; -- 0xEB XBA (swap A)
144 
constant   WAI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010110000"; -- 0xCB WAI
145 
constant   WAI_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010110001"; -- 0xCB WAI
146 
constant   STP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110110000"; -- 0xDB STP
147 
constant   STP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110110001"; -- 0xDB STP
148 
 
149 
------------------------------------
150 
--           IMMEDIATE            --
151 
------------------------------------
152 
constant IMLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010010000"; -- 0xA9 LDA #IMM
153 
constant IMLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101010010001"; -- 0xA9 LDA #IMM
154 
constant IMLDX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000100000"; -- 0xA2 LDX #IMM
155 
constant IMLDX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000100001"; -- 0xA2 LDX #IMM
156 
constant IMLDY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000000000"; -- 0xA0 LDY #IMM
157 
constant IMLDY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000000001"; -- 0xA0 LDY #IMM
158 
constant IMADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010010000"; -- 0x69 ADC #IMM
159 
constant IMADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010010001"; -- 0x69 ADC #IMM
160 
constant IMADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011010010010"; -- 0x69 ADC #IMM
161 
constant IMSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010010000"; -- 0xE9 SBC #IMM
162 
constant IMSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010010001"; -- 0xE9 SBC #IMM
163 
constant IMSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111010010010"; -- 0xE9 SBC #IMM
164 
constant IMAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010010000"; -- 0x29 AND #IMM
165 
constant IMAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001010010001"; -- 0x29 AND #IMM
166 
constant IMORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010010000"; -- 0x09 ORA #IMM
167 
constant IMORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000010010001"; -- 0x09 ORA #IMM
168 
constant IMEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010010000"; -- 0x49 EOR #IMM
169 
constant IMEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010010010001"; -- 0x49 EOR #IMM
170 
constant IMCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010010000"; -- 0xC9 CMP #IMM
171 
constant IMCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110010010001"; -- 0xC9 CMP #IMM
172 
constant IMCPX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000000000"; -- 0xE0 CPX #IMM
173 
constant IMCPX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000000001"; -- 0xE0 CPX #IMM
174 
constant IMCPY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000000000"; -- 0xC0 CPY #IMM
175 
constant IMCPY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000000001"; -- 0xC0 CPY #IMM
176 
constant IMBRK_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010010000"; -- 0x89 BRK #IMM
177 
constant IMBRK_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010010001"; -- 0x89 BRK #IMM
178 
constant IMSEP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000100000"; -- 0xE2 SEP #IMM
179 
constant IMREP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000100000"; -- 0xC2 REP #IMM
180 
constant IMBIT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010010000"; -- 0x89 BIT #IMM
181 
constant IMBIT_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100010010001"; -- 0x89 BIT #IMM
182 
 
183 
------------------------------------
184 
--           ZERO PAGE            --
185 
------------------------------------
186 
constant ZPLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001010000"; -- 0xA5 LDA ZP
187 
constant ZPLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001010001"; -- 0xA5 LDA ZP
188 
constant ZPLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001010010"; -- 0xA5 LDA ZP
189 
constant ZPLDX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001100000"; -- 0xA6 LDX ZP
190 
constant ZPLDX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001100001"; -- 0xA6 LDX ZP
191 
constant ZPLDX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001100010"; -- 0xA6 LDX ZP
192 
constant ZPLDY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001000000"; -- 0xA4 LDY ZP
193 
constant ZPLDY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001000001"; -- 0xA4 LDY ZP
194 
constant ZPLDY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001000010"; -- 0xA4 LDY ZP
195 
constant ZPSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001010000"; -- 0x85 STA ZP
196 
constant ZPSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001010001"; -- 0x85 STA ZP
197 
constant ZPSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001010010"; -- 0x85 STA ZP
198 
constant ZPSTX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001100000"; -- 0x86 STX ZP
199 
constant ZPSTX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001100001"; -- 0x86 STX ZP
200 
constant ZPSTX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001100010"; -- 0x86 STX ZP
201 
constant ZPSTY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001000000"; -- 0x84 STY ZP
202 
constant ZPSTY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001000001"; -- 0x84 STY ZP
203 
constant ZPSTY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001000010"; -- 0x84 STY ZP
204 
constant ZPSTZ_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001000000"; -- 0x64 STZ ZP
205 
constant ZPSTZ_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001000001"; -- 0x64 STZ ZP
206 
constant ZPSTZ_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001000010"; -- 0x64 STZ ZP
207 
constant ZPADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001010000"; -- 0x65 ADC ZP
208 
constant ZPADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001010001"; -- 0x65 ADC ZP
209 
constant ZPADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001010010"; -- 0x65 ADC ZP
210 
constant ZPADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001010011"; -- 0x65 ADC ZP
211 
constant ZPSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001010000"; -- 0xE5 SBC ZP
212 
constant ZPSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001010001"; -- 0xE5 SBC ZP
213 
constant ZPSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001010010"; -- 0xE5 SBC ZP
214 
constant ZPSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001010011"; -- 0xE5 SBC ZP
215 
constant ZPCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001010000"; -- 0xC5 CMP ZP
216 
constant ZPCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001010001"; -- 0xC5 CMP ZP
217 
constant ZPCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001010010"; -- 0xC5 CMP ZP
218 
constant ZPCPX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001000000"; -- 0xE4 CPX ZP
219 
constant ZPCPX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001000001"; -- 0xE4 CPX ZP
220 
constant ZPCPX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001000010"; -- 0xE4 CPX ZP
221 
constant ZPCPY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001000000"; -- 0xC4 CPY ZP
222 
constant ZPCPY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001000001"; -- 0xC4 CPY ZP
223 
constant ZPCPY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001000010"; -- 0xC4 CPY ZP
224 
constant ZPAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001010000"; -- 0x25 AND ZP
225 
constant ZPAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001010001"; -- 0x25 AND ZP
226 
constant ZPAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001010010"; -- 0x25 AND ZP
227 
constant ZPORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001010000"; -- 0x05 ORA ZP
228 
constant ZPORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001010001"; -- 0x05 ORA ZP
229 
constant ZPORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001010010"; -- 0x05 ORA ZP
230 
constant ZPEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001010000"; -- 0x45 EOR ZP
231 
constant ZPEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001010001"; -- 0x45 EOR ZP
232 
constant ZPEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001010010"; -- 0x45 EOR ZP
233 
constant ZPBIT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001000000"; -- 0x24 BIT ZP
234 
constant ZPBIT_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001000001"; -- 0x24 BIT ZP
235 
constant ZPBIT_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001000010"; -- 0x24 BIT ZP
236 
constant ZPASL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100000"; -- 0x06 ASL ZP
237 
constant ZPASL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100001"; -- 0x06 ASL ZP
238 
constant ZPASL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100010"; -- 0x06 ASL ZP
239 
constant ZPASL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100011"; -- 0x06 ASL ZP
240 
constant ZPASL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100100"; -- 0x06 ASL ZP
241 
constant ZPASL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001100101"; -- 0x06 ASL ZP
242 
constant ZPLSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100000"; -- 0x46 LSR ZP
243 
constant ZPLSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100001"; -- 0x46 LSR ZP
244 
constant ZPLSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100010"; -- 0x46 LSR ZP
245 
constant ZPLSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100011"; -- 0x46 LSR ZP
246 
constant ZPLSR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100100"; -- 0x46 LSR ZP
247 
constant ZPLSR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001100101"; -- 0x46 LSR ZP
248 
constant ZPROL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100000"; -- 0x26 ROL ZP
249 
constant ZPROL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100001"; -- 0x26 ROL ZP
250 
constant ZPROL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100010"; -- 0x26 ROL ZP
251 
constant ZPROL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100011"; -- 0x26 ROL ZP
252 
constant ZPROL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100100"; -- 0x26 ROL ZP
253 
constant ZPROL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001100101"; -- 0x26 ROL ZP
254 
constant ZPROR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100000"; -- 0x66 ROR ZP
255 
constant ZPROR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100001"; -- 0x66 ROR ZP
256 
constant ZPROR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100010"; -- 0x66 ROR ZP
257 
constant ZPROR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100011"; -- 0x66 ROR ZP
258 
constant ZPROR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100100"; -- 0x66 ROR ZP
259 
constant ZPROR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001100101"; -- 0x66 ROR ZP
260 
constant ZPINC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100000"; -- 0xE6 INC ZP
261 
constant ZPINC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100001"; -- 0xE6 INC ZP
262 
constant ZPINC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100010"; -- 0xE6 INC ZP
263 
constant ZPINC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100011"; -- 0xE6 INC ZP
264 
constant ZPINC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100100"; -- 0xE6 INC ZP
265 
constant ZPINC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001100101"; -- 0xE6 INC ZP
266 
constant ZPDEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100000"; -- 0xC6 DEC ZP
267 
constant ZPDEC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100001"; -- 0xC6 DEC ZP
268 
constant ZPDEC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100010"; -- 0xC6 DEC ZP
269 
constant ZPDEC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100011"; -- 0xC6 DEC ZP
270 
constant ZPDEC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100100"; -- 0xC6 DEC ZP
271 
constant ZPDEC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001100101"; -- 0xC6 DEC ZP
272 
constant ZPTSB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000000"; -- 0x04 TSB ZP
273 
constant ZPTSB_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000001"; -- 0x04 TSB ZP
274 
constant ZPTSB_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000010"; -- 0x04 TSB ZP
275 
constant ZPTSB_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000011"; -- 0x04 TSB ZP
276 
constant ZPTSB_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000100"; -- 0x04 TSB ZP
277 
constant ZPTSB_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000101"; -- 0x04 TSB ZP
278 
constant ZPTSB_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001000110"; -- 0x04 TSB ZP
279 
constant ZPTRB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000000"; -- 0x14 TRB ZP
280 
constant ZPTRB_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000001"; -- 0x14 TRB ZP
281 
constant ZPTRB_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000010"; -- 0x14 TRB ZP
282 
constant ZPTRB_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000011"; -- 0x14 TRB ZP
283 
constant ZPTRB_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000100"; -- 0x14 TRB ZP
284 
constant ZPTRB_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000101"; -- 0x14 TRB ZP
285 
constant ZPTRB_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101000110"; -- 0x14 TRB ZP
286 
 
287 
------------------------------------
288 
--          ZERO PAGE,X           --
289 
------------------------------------
290 
constant ZXLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101010000"; -- 0xB5 LDA ZP,X
291 
constant ZXLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101010001"; -- 0xB5 LDA ZP,X
292 
constant ZXLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101010010"; -- 0xB5 LDA ZP,X
293 
constant ZXLDY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101000000"; -- 0xB4 LDY ZP,X
294 
constant ZXLDY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101000001"; -- 0xB4 LDY ZP,X
295 
constant ZXLDY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101000010"; -- 0xB4 LDY ZP,X
296 
constant ZXSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101010000"; -- 0x95 STA ZP,X
297 
constant ZXSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101010001"; -- 0x95 STA ZP,X
298 
constant ZXSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101010010"; -- 0x95 STA ZP,X
299 
constant ZXSTY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101000000"; -- 0x94 STY ZP,X
300 
constant ZXSTY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101000001"; -- 0x94 STY ZP,X
301 
constant ZXSTY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101000010"; -- 0x94 STY ZP,X
302 
constant ZXSTZ_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101000000"; -- 0x74 STZ ZP,X
303 
constant ZXSTZ_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101000001"; -- 0x74 STZ ZP,X
304 
constant ZXSTZ_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101000010"; -- 0x74 STZ ZP,X
305 
constant ZXADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101010000"; -- 0x75 ADC ZP,X
306 
constant ZXADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101010001"; -- 0x75 ADC ZP,X
307 
constant ZXADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101010010"; -- 0x75 ADC ZP,X
308 
constant ZXSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101010000"; -- 0xF5 SBC ZP,X
309 
constant ZXSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101010001"; -- 0xF5 SBC ZP,X
310 
constant ZXSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101010010"; -- 0xF5 SBC ZP,X
311 
constant ZXCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101010000"; -- 0xD5 CMP ZP,X
312 
constant ZXCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101010001"; -- 0xD5 CMP ZP,X
313 
constant ZXCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101010010"; -- 0xD5 CMP ZP,X
314 
constant ZXAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101010000"; -- 0x35 AND ZP,X
315 
constant ZXAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101010001"; -- 0x35 AND ZP,X
316 
constant ZXAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101010010"; -- 0x35 AND ZP,X
317 
constant ZXORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101010000"; -- 0x15 ORA ZP,X
318 
constant ZXORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101010001"; -- 0x15 ORA ZP,X
319 
constant ZXORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101010010"; -- 0x15 ORA ZP,X
320 
constant ZXEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101010000"; -- 0x55 EOR ZP,X
321 
constant ZXEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101010001"; -- 0x55 EOR ZP,X
322 
constant ZXEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101010010"; -- 0x55 EOR ZP,X
323 
constant ZXASL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100000"; -- 0x16 ASL ZP,X
324 
constant ZXASL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100001"; -- 0x16 ASL ZP,X
325 
constant ZXASL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100010"; -- 0x16 ASL ZP,X
326 
constant ZXASL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100011"; -- 0x16 ASL ZP,X
327 
constant ZXASL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100100"; -- 0x16 ASL ZP,X
328 
constant ZXASL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101100101"; -- 0x16 ASL ZP,X
329 
constant ZXLSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100000"; -- 0x56 LSR ZP,X
330 
constant ZXLSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100001"; -- 0x56 LSR ZP,X
331 
constant ZXLSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100010"; -- 0x56 LSR ZP,X
332 
constant ZXLSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100011"; -- 0x56 LSR ZP,X
333 
constant ZXLSR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100100"; -- 0x56 LSR ZP,X
334 
constant ZXLSR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101100101"; -- 0x56 LSR ZP,X
335 
constant ZXROL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100000"; -- 0x36 ROL ZP,X
336 
constant ZXROL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100001"; -- 0x36 ROL ZP,X
337 
constant ZXROL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100010"; -- 0x36 ROL ZP,X
338 
constant ZXROL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100011"; -- 0x36 ROL ZP,X
339 
constant ZXROL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100100"; -- 0x36 ROL ZP,X
340 
constant ZXROL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101100101"; -- 0x36 ROL ZP,X
341 
constant ZXROR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100000"; -- 0x76 ROR ZP,X
342 
constant ZXROR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100001"; -- 0x76 ROR ZP,X
343 
constant ZXROR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100010"; -- 0x76 ROR ZP,X
344 
constant ZXROR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100011"; -- 0x76 ROR ZP,X
345 
constant ZXROR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100100"; -- 0x76 ROR ZP,X
346 
constant ZXROR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101100101"; -- 0x76 ROR ZP,X
347 
constant ZXDEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100000"; -- 0xD6 DEC ZP,X
348 
constant ZXDEC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100001"; -- 0xD6 DEC ZP,X
349 
constant ZXDEC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100010"; -- 0xD6 DEC ZP,X
350 
constant ZXDEC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100011"; -- 0xD6 DEC ZP,X
351 
constant ZXDEC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100100"; -- 0xD6 DEC ZP,X
352 
constant ZXDEC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101100101"; -- 0xD6 DEC ZP,X
353 
constant ZXINC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100000"; -- 0xF6 INC ZP,X
354 
constant ZXINC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100001"; -- 0xF6 INC ZP,X
355 
constant ZXINC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100010"; -- 0xF6 INC ZP,X
356 
constant ZXINC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100011"; -- 0xF6 INC ZP,X
357 
constant ZXINC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100100"; -- 0xF6 INC ZP,X
358 
constant ZXINC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101100101"; -- 0xF6 INC ZP,X
359 
constant ZXBIT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101000000"; -- 0x34 BIT ZP,X
360 
constant ZXBIT_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101000001"; -- 0x34 BIT ZP,X
361 
constant ZXBIT_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101000010"; -- 0x34 BIT ZP,X
362 
 
363 
------------------------------------
364 
--          ZERO PAGE,Y           --
365 
------------------------------------
366 
constant ZYLDX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101100000"; -- 0xB6 LDX ZP,Y
367 
constant ZYLDX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101100001"; -- 0xB6 LDX ZP,Y
368 
constant ZYLDX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101100010"; -- 0xB6 LDX ZP,Y
369 
constant ZYLDX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101100011"; -- 0xB6 LDX ZP,Y
370 
 
371 
constant ZYSTX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101100000"; -- 0x96 STX ZP,Y
372 
constant ZYSTX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101100001"; -- 0x96 STX ZP,Y
373 
constant ZYSTX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101100010"; -- 0x96 STX ZP,Y
374 
 
375 
------------------------------------
376 
--           INDIRECT             --
377 
------------------------------------
378 
constant INJMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011000000"; -- 0x6C JMP (IND)
379 
constant INJMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011000001"; -- 0x6C JMP (IND)
380 
constant INJMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011000010"; -- 0x6C JMP (IND)
381 
constant INJMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011000011"; -- 0x6C JMP (IND)
382 
constant INJML_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111000000"; -- 0xDC JML (IND)
383 
constant INJML_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111000001"; -- 0xDC JML (IND)
384 
constant INJML_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111000010"; -- 0xDC JML (IND)
385 
constant INJML_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111000011"; -- 0xDC JML (IND)
386 
constant INJML_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111000100"; -- 0xDC JML (IND)
387 
 
388 
 
389 
------------------------------------
390 
--          INDIRECT,Y            --
391 
------------------------------------
392 
constant IYLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010000"; -- 0xB1 LDA [DIR],Y
393 
constant IYLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010001"; -- 0xB1 LDA [DIR],Y
394 
constant IYLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010010"; -- 0xB1 LDA [DIR],Y
395 
constant IYLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010011"; -- 0xB1 LDA [DIR],Y
396 
constant IYLDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010100"; -- 0xB1 LDA [DIR],Y
397 
constant IYLDA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100010101"; -- 0xB1 LDA [DIR],Y
398 
constant IYSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010000"; -- 0x91 STA [DIR],Y
399 
constant IYSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010001"; -- 0x91 STA [DIR],Y
400 
constant IYSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010010"; -- 0x91 STA [DIR],Y
401 
constant IYSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010011"; -- 0x91 STA [DIR],Y
402 
constant IYSTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010100"; -- 0x91 STA [DIR],Y
403 
constant IYSTA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100010101"; -- 0x91 STA [DIR],Y
404 
constant IYADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010000"; -- 0x71 ADC [DIR],Y
405 
constant IYADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010001"; -- 0x71 ADC [DIR],Y
406 
constant IYADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010010"; -- 0x71 ADC [DIR],Y
407 
constant IYADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010011"; -- 0x71 ADC [DIR],Y
408 
constant IYADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010100"; -- 0x71 ADC [DIR],Y
409 
constant IYADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100010101"; -- 0x71 ADC [DIR],Y
410 
constant IYSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010000"; -- 0xF1 SBC [DIR],Y
411 
constant IYSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010001"; -- 0xF1 SBC [DIR],Y
412 
constant IYSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010010"; -- 0xF1 SBC [DIR],Y
413 
constant IYSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010011"; -- 0xF1 SBC [DIR],Y
414 
constant IYSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010100"; -- 0xF1 SBC [DIR],Y
415 
constant IYSBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100010101"; -- 0xF1 SBC [DIR],Y
416 
constant IYCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010000"; -- 0xD1 CMP [DIR],Y
417 
constant IYCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010001"; -- 0xD1 CMP [DIR],Y
418 
constant IYCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010010"; -- 0xD1 CMP [DIR],Y
419 
constant IYCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010011"; -- 0xD1 CMP [DIR],Y
420 
constant IYCMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010100"; -- 0xD1 CMP [DIR],Y
421 
constant IYCMP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100010101"; -- 0xD1 CMP [DIR],Y
422 
constant IYAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010000"; -- 0x31 AND [DIR],Y
423 
constant IYAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010001"; -- 0x31 AND [DIR],Y
424 
constant IYAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010010"; -- 0x31 AND [DIR],Y
425 
constant IYAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010011"; -- 0x31 AND [DIR],Y
426 
constant IYAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010100"; -- 0x31 AND [DIR],Y
427 
constant IYAND_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100010101"; -- 0x31 AND [DIR],Y
428 
constant IYORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010000"; -- 0x11 ORA [DIR],Y
429 
constant IYORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010001"; -- 0x11 ORA [DIR],Y
430 
constant IYORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010010"; -- 0x11 ORA [DIR],Y
431 
constant IYORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010011"; -- 0x11 ORA [DIR],Y
432 
constant IYORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010100"; -- 0x11 ORA [DIR],Y
433 
constant IYORA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100010101"; -- 0x11 ORA [DIR],Y
434 
constant IYEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010000"; -- 0x51 EOR [DIR],Y
435 
constant IYEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010001"; -- 0x51 EOR [DIR],Y
436 
constant IYEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010010"; -- 0x51 EOR [DIR],Y
437 
constant IYEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010011"; -- 0x51 EOR [DIR],Y
438 
constant IYEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010100"; -- 0x51 EOR [DIR],Y
439 
constant IYEOR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100010101"; -- 0x51 EOR [DIR],Y
440 
 
441 
------------------------------------
442 
--          INDIRECT,X            --
443 
------------------------------------
444 
constant IXLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000010000"; -- 0xA1 LDA (IND_ZP,X)
445 
constant IXLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000010001"; -- 0xA1 LDA (IND_ZP,X)
446 
constant IXLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000010010"; -- 0xA1 LDA (IND_ZP,X)
447 
constant IXLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000010011"; -- 0xA1 LDA (IND_ZP,X)
448 
constant IXLDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000010100"; -- 0xA1 LDA (IND_ZP,X)
449 
constant IXSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000010000"; -- 0x81 STA (IND_ZP,X)
450 
constant IXSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000010001"; -- 0x81 STA (IND_ZP,X)
451 
constant IXSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000010010"; -- 0x81 STA (IND_ZP,X)
452 
constant IXSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000010011"; -- 0x81 STA (IND_ZP,X)
453 
constant IXSTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000010100"; -- 0x81 STA (IND_ZP,X)
454 
constant IXAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000010000"; -- 0x21 AND (IND_ZP,X)
455 
constant IXAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000010001"; -- 0x21 AND (IND_ZP,X)
456 
constant IXAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000010010"; -- 0x21 AND (IND_ZP,X)
457 
constant IXAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000010011"; -- 0x21 AND (IND_ZP,X)
458 
constant IXAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000010100"; -- 0x21 AND (IND_ZP,X)
459 
constant IXORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000010000"; -- 0x01 ORA (IND_ZP,X)
460 
constant IXORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000010001"; -- 0x01 ORA (IND_ZP,X)
461 
constant IXORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000010010"; -- 0x01 ORA (IND_ZP,X)
462 
constant IXORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000010011"; -- 0x01 ORA (IND_ZP,X)
463 
constant IXORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000010100"; -- 0x01 ORA (IND_ZP,X)
464 
constant IXEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000010000"; -- 0x41 EOR (IND_ZP,X)
465 
constant IXEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000010001"; -- 0x41 EOR (IND_ZP,X)
466 
constant IXEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000010010"; -- 0x41 EOR (IND_ZP,X)
467 
constant IXEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000010011"; -- 0x41 EOR (IND_ZP,X)
468 
constant IXEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000010100"; -- 0x41 EOR (IND_ZP,X)
469 
constant IXCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000010000"; -- 0xC1 CMP (IND_ZP,X)
470 
constant IXCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000010001"; -- 0xC1 CMP (IND_ZP,X)
471 
constant IXCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000010010"; -- 0xC1 CMP (IND_ZP,X)
472 
constant IXCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000010011"; -- 0xC1 CMP (IND_ZP,X)
473 
constant IXCMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000010100"; -- 0xC1 CMP (IND_ZP,X)
474 
constant IXADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000010000"; -- 0x61 ADC (IND_ZP,X)
475 
constant IXADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000010001"; -- 0x61 ADC (IND_ZP,X)
476 
constant IXADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000010010"; -- 0x61 ADC (IND_ZP,X)
477 
constant IXADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000010011"; -- 0x61 ADC (IND_ZP,X)
478 
constant IXADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000010100"; -- 0x61 ADC (IND_ZP,X)
479 
constant IXSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000010000"; -- 0xE1 SBC (IND_ZP,X)
480 
constant IXSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000010001"; -- 0xE1 SBC (IND_ZP,X)
481 
constant IXSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000010010"; -- 0xE1 SBC (IND_ZP,X)
482 
constant IXSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000010011"; -- 0xE1 SBC (IND_ZP,X)
483 
constant IXSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000010100"; -- 0xE1 SBC (IND_ZP,X)
484 
constant IXJMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111000000"; -- 0x7C JMP (IND,X)
485 
constant IXJMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111000001"; -- 0x7C JMP (IND,X)
486 
constant IXJMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111000010"; -- 0x7C JMP (IND,X)
487 
constant IXJMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111000011"; -- 0x7C JMP (IND,X)
488 
constant IXJMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111000100"; -- 0x7C JMP (IND,X)
489 
constant IXJSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000000"; -- 0xFC JSR (IND,X)
490 
constant IXJSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000001"; -- 0xFC JSR (IND,X)
491 
constant IXJSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000010"; -- 0xFC JSR (IND,X)
492 
constant IXJSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000011"; -- 0xFC JSR (IND,X)
493 
constant IXJSR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000100"; -- 0xFC JSR (IND,X)
494 
constant IXJSR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111000101"; -- 0xFC JSR (IND,X)
495 
 
496 
------------------------------------
497 
--            ABSOLUTE            --
498 
------------------------------------
499 
constant ABLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011010000"; -- 0xAD LDA ABS
500 
constant ABLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011010001"; -- 0xAD LDA ABS
501 
constant ABLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011010010"; -- 0xAD LDA ABS
502 
constant ABLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011010011"; -- 0xAD LDA ABS
503 
constant ABLDX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011100000"; -- 0xAE LDX ABS
504 
constant ABLDX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011100001"; -- 0xAE LDX ABS
505 
constant ABLDX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011100010"; -- 0xAE LDX ABS
506 
constant ABLDX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011100011"; -- 0xAE LDX ABS
507 
constant ABLDY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011000000"; -- 0xAC LDY ABS
508 
constant ABLDY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011000001"; -- 0xAC LDY ABS
509 
constant ABLDY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011000010"; -- 0xAC LDY ABS
510 
constant ABLDY_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011000011"; -- 0xAC LDY ABS
511 
constant ABSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011010000"; -- 0x8D STA ABS
512 
constant ABSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011010001"; -- 0x8D STA ABS
513 
constant ABSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011010010"; -- 0x8D STA ABS
514 
constant ABSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011010011"; -- 0x8D STA ABS
515 
constant ABSTX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011100000"; -- 0x8E STX ABS
516 
constant ABSTX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011100001"; -- 0x8E STX ABS
517 
constant ABSTX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011100010"; -- 0x8E STX ABS
518 
constant ABSTX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011100011"; -- 0x8E STX ABS
519 
constant ABSTY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011000000"; -- 0x8C STY ABS
520 
constant ABSTY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011000001"; -- 0x8C STY ABS
521 
constant ABSTY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011000010"; -- 0x8C STY ABS
522 
constant ABSTY_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011000011"; -- 0x8C STY ABS
523 
constant ABSTZ_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111000000"; -- 0x9C STZ ABS
524 
constant ABSTZ_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111000001"; -- 0x9C STZ ABS
525 
constant ABSTZ_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111000010"; -- 0x9C STZ ABS
526 
constant ABSTZ_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111000011"; -- 0x9C STZ ABS
527 
constant ABADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011010000"; -- 0x6D ADC ABS
528 
constant ABADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011010001"; -- 0x6D ADC ABS
529 
constant ABADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011010010"; -- 0x6D ADC ABS
530 
constant ABADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011010011"; -- 0x6D ADC ABS
531 
constant ABADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011010100"; -- 0x6D ADC ABS
532 
constant ABSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011010000"; -- 0xED SBC ABS
533 
constant ABSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011010001"; -- 0xED SBC ABS
534 
constant ABSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011010010"; -- 0xED SBC ABS
535 
constant ABSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011010011"; -- 0xED SBC ABS
536 
constant ABSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011010100"; -- 0xED SBC ABS
537 
constant ABORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011010000"; -- 0x0D ORA ABS
538 
constant ABORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011010001"; -- 0x0D ORA ABS
539 
constant ABORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011010010"; -- 0x0D ORA ABS
540 
constant ABORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011010011"; -- 0x0D ORA ABS
541 
constant ABAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011010000"; -- 0x2D AND ABS
542 
constant ABAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011010001"; -- 0x2D AND ABS
543 
constant ABAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011010010"; -- 0x2D AND ABS
544 
constant ABAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011010011"; -- 0x2D AND ABS
545 
constant ABEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011010000"; -- 0x4D EOR ABS
546 
constant ABEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011010001"; -- 0x4D EOR ABS
547 
constant ABEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011010010"; -- 0x4D EOR ABS
548 
constant ABEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011010011"; -- 0x4D EOR ABS
549 
constant ABCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011010000"; -- 0xCD CMP ABS
550 
constant ABCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011010001"; -- 0xCD CMP ABS
551 
constant ABCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011010010"; -- 0xCD CMP ABS
552 
constant ABCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011010011"; -- 0xCD CMP ABS
553 
constant ABCPX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011000000"; -- 0xEC CPX ABS
554 
constant ABCPX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011000001"; -- 0xEC CPX ABS
555 
constant ABCPX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011000010"; -- 0xEC CPX ABS
556 
constant ABCPX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011000011"; -- 0xEC CPX ABS
557 
constant ABCPY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011000000"; -- 0xCC CPY ABS
558 
constant ABCPY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011000001"; -- 0xCC CPY ABS
559 
constant ABCPY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011000010"; -- 0xCC CPY ABS
560 
constant ABCPY_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011000011"; -- 0xCC CPY ABS
561 
constant ABJMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011000000"; -- 0x4C JMP ABS
562 
constant ABJMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011000001"; -- 0x4C JMP ABS
563 
constant ABJSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000000000"; -- 0x20 JSR ABS
564 
constant ABJSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000000001"; -- 0x20 JSR ABS
565 
constant ABJSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000000010"; -- 0x20 JSR ABS
566 
constant ABJSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000000011"; -- 0x20 JSR ABS
567 
constant ABBIT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011000000"; -- 0x2C BIT ABS
568 
constant ABBIT_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011000001"; -- 0x2C BIT ABS
569 
constant ABBIT_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011000010"; -- 0x2C BIT ABS
570 
constant ABBIT_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011000011"; -- 0x2C BIT ABS
571 
constant ABASL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100000"; -- 0x0E ASL ABS
572 
constant ABASL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100001"; -- 0x0E ASL ABS
573 
constant ABASL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100010"; -- 0x0E ASL ABS
574 
constant ABASL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100011"; -- 0x0E ASL ABS
575 
constant ABASL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100100"; -- 0x0E ASL ABS
576 
constant ABASL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100101"; -- 0x0E ASL ABS
577 
constant ABASL_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011100110"; -- 0x0E ASL ABS
578 
constant ABLSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100000"; -- 0x4E LSR ABS
579 
constant ABLSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100001"; -- 0x4E LSR ABS
580 
constant ABLSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100010"; -- 0x4E LSR ABS
581 
constant ABLSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100011"; -- 0x4E LSR ABS
582 
constant ABLSR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100100"; -- 0x4E LSR ABS
583 
constant ABLSR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100101"; -- 0x4E LSR ABS
584 
constant ABLSR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011100110"; -- 0x4E LSR ABS
585 
constant ABROL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100000"; -- 0x2E ROL ABS
586 
constant ABROL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100001"; -- 0x2E ROL ABS
587 
constant ABROL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100010"; -- 0x2E ROL ABS
588 
constant ABROL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100011"; -- 0x2E ROL ABS
589 
constant ABROL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100100"; -- 0x2E ROL ABS
590 
constant ABROL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100101"; -- 0x2E ROL ABS
591 
constant ABROL_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011100110"; -- 0x2E ROL ABS
592 
constant ABROR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100000"; -- 0x6E ROR ABS
593 
constant ABROR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100001"; -- 0x6E ROR ABS
594 
constant ABROR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100010"; -- 0x6E ROR ABS
595 
constant ABROR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100011"; -- 0x6E ROR ABS
596 
constant ABROR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100100"; -- 0x6E ROR ABS
597 
constant ABROR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100101"; -- 0x6E ROR ABS
598 
constant ABROR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011100110"; -- 0x6E ROR ABS
599 
constant ABINC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100000"; -- 0xEE INC ABS
600 
constant ABINC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100001"; -- 0xEE INC ABS
601 
constant ABINC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100010"; -- 0xEE INC ABS
602 
constant ABINC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100011"; -- 0xEE INC ABS
603 
constant ABINC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100100"; -- 0xEE INC ABS
604 
constant ABINC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100101"; -- 0xEE INC ABS
605 
constant ABINC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011100110"; -- 0xEE INC ABS
606 
constant ABDEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100000"; -- 0xCE DEC ABS
607 
constant ABDEC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100001"; -- 0xCE DEC ABS
608 
constant ABDEC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100010"; -- 0xCE DEC ABS
609 
constant ABDEC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100011"; -- 0xCE DEC ABS
610 
constant ABDEC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100100"; -- 0xCE DEC ABS
611 
constant ABDEC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100101"; -- 0xCE DEC ABS
612 
constant ABDEC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011100110"; -- 0xCE DEC ABS
613 
constant ABTSB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000000"; -- 0x0C TSB ABS
614 
constant ABTSB_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000001"; -- 0x0C TSB ABS
615 
constant ABTSB_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000010"; -- 0x0C TSB ABS
616 
constant ABTSB_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000011"; -- 0x0C TSB ABS
617 
constant ABTSB_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000100"; -- 0x0C TSB ABS
618 
constant ABTSB_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000101"; -- 0x0C TSB ABS
619 
constant ABTSB_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000110"; -- 0x0C TSB ABS
620 
constant ABTSB_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011000111"; -- 0x0C TSB ABS
621 
constant ABTRB_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000000"; -- 0x1C TRB ABS
622 
constant ABTRB_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000001"; -- 0x1C TRB ABS
623 
constant ABTRB_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000010"; -- 0x1C TRB ABS
624 
constant ABTRB_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000011"; -- 0x1C TRB ABS
625 
constant ABTRB_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000100"; -- 0x1C TRB ABS
626 
constant ABTRB_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000101"; -- 0x1C TRB ABS
627 
constant ABTRB_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000110"; -- 0x1C TRB ABS
628 
constant ABTRB_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111000111"; -- 0x1C TRB ABS
629 
 
630 
------------------------------------
631 
--           ABSOLUTE,X           --
632 
------------------------------------
633 
constant AXLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111010000"; -- 0xBD LDA ABS,X
634 
constant AXLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111010001"; -- 0xBD LDA ABS,X
635 
constant AXLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111010010"; -- 0xBD LDA ABS,X
636 
constant AXLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111010011"; -- 0xBD LDA ABS,X
637 
constant AXLDY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111000000"; -- 0xBC LDY ABS,X
638 
constant AXLDY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111000001"; -- 0xBC LDY ABS,X
639 
constant AXLDY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111000010"; -- 0xBC LDY ABS,X
640 
constant AXLDY_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111000011"; -- 0xBC LDY ABS,X
641 
constant AXSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111010000"; -- 0x9D STA ABS,X
642 
constant AXSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111010001"; -- 0x9D STA ABS,X
643 
constant AXSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111010010"; -- 0x9D STA ABS,X
644 
constant AXSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111010011"; -- 0x9D STA ABS,X
645 
constant AXSTZ_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111100000"; -- 0x9E STZ ABS,X
646 
constant AXSTZ_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111100001"; -- 0x9E STZ ABS,X
647 
constant AXSTZ_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111100010"; -- 0x9E STZ ABS,X
648 
constant AXSTZ_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111100011"; -- 0x9E STZ ABS,X
649 
constant AXADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111010000"; -- 0x7D ADC ABS,X
650 
constant AXADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111010001"; -- 0x7D ADC ABS,X
651 
constant AXADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111010010"; -- 0x7D ADC ABS,X
652 
constant AXADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111010011"; -- 0x7D ADC ABS,X
653 
constant AXSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111010000"; -- 0xFD SBC ABS,X
654 
constant AXSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111010001"; -- 0xFD SBC ABS,X
655 
constant AXSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111010010"; -- 0xFD SBC ABS,X
656 
constant AXSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111010011"; -- 0xFD SBC ABS,X
657 
constant AXCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111010000"; -- 0xDD CMP ABS,X
658 
constant AXCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111010001"; -- 0xDD CMP ABS,X
659 
constant AXCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111010010"; -- 0xDD CMP ABS,X
660 
constant AXCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111010011"; -- 0xDD CMP ABS,X
661 
constant AXINC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100000"; -- 0xFE INC ABS,X
662 
constant AXINC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100001"; -- 0xFE INC ABS,X
663 
constant AXINC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100010"; -- 0xFE INC ABS,X
664 
constant AXINC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100011"; -- 0xFE INC ABS,X
665 
constant AXINC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100100"; -- 0xFE INC ABS,X
666 
constant AXINC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100101"; -- 0xFE INC ABS,X
667 
constant AXINC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111100110"; -- 0xFE INC ABS,X
668 
constant AXDEC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100000"; -- 0xDE DEC ABS,X
669 
constant AXDEC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100001"; -- 0xDE DEC ABS,X
670 
constant AXDEC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100010"; -- 0xDE DEC ABS,X
671 
constant AXDEC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100011"; -- 0xDE DEC ABS,X
672 
constant AXDEC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100100"; -- 0xDE DEC ABS,X
673 
constant AXDEC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100101"; -- 0xDE DEC ABS,X
674 
constant AXDEC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111100110"; -- 0xDE DEC ABS,X
675 
constant AXASL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100000"; -- 0x1E ASL ABS,X
676 
constant AXASL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100001"; -- 0x1E ASL ABS,X
677 
constant AXASL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100010"; -- 0x1E ASL ABS,X
678 
constant AXASL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100011"; -- 0x1E ASL ABS,X
679 
constant AXASL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100100"; -- 0x1E ASL ABS,X
680 
constant AXASL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100101"; -- 0x1E ASL ABS,X
681 
constant AXASL_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111100110"; -- 0x1E ASL ABS,X
682 
constant AXLSR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100000"; -- 0x5E LSR ABS,X
683 
constant AXLSR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100001"; -- 0x5E LSR ABS,X
684 
constant AXLSR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100010"; -- 0x5E LSR ABS,X
685 
constant AXLSR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100011"; -- 0x5E LSR ABS,X
686 
constant AXLSR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100100"; -- 0x5E LSR ABS,X
687 
constant AXLSR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100101"; -- 0x5E LSR ABS,X
688 
constant AXLSR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111100110"; -- 0x5E LSR ABS,X
689 
constant AXROL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100000"; -- 0x3E ROL ABS,X
690 
constant AXROL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100001"; -- 0x3E ROL ABS,X
691 
constant AXROL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100010"; -- 0x3E ROL ABS,X
692 
constant AXROL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100011"; -- 0x3E ROL ABS,X
693 
constant AXROL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100100"; -- 0x3E ROL ABS,X
694 
constant AXROL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100101"; -- 0x3E ROL ABS,X
695 
constant AXROL_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111100110"; -- 0x3E ROL ABS,X
696 
constant AXROR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100000"; -- 0x7E ROR ABS,X
697 
constant AXROR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100001"; -- 0x7E ROR ABS,X
698 
constant AXROR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100010"; -- 0x7E ROR ABS,X
699 
constant AXROR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100011"; -- 0x7E ROR ABS,X
700 
constant AXROR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100100"; -- 0x7E ROR ABS,X
701 
constant AXROR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100101"; -- 0x7E ROR ABS,X
702 
constant AXROR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111100110"; -- 0x7E ROR ABS,X
703 
constant AXAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111010000"; -- 0x3D AND ABS,X
704 
constant AXAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111010001"; -- 0x3D AND ABS,X
705 
constant AXAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111010010"; -- 0x3D AND ABS,X
706 
constant AXAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111010011"; -- 0x3D AND ABS,X
707 
constant AXORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111010000"; -- 0x1D ORA ABS,X
708 
constant AXORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111010001"; -- 0x1D ORA ABS,X
709 
constant AXORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111010010"; -- 0x1D ORA ABS,X
710 
constant AXORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111010011"; -- 0x1D ORA ABS,X
711 
constant AXEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111010000"; -- 0x5D EOR ABS,X
712 
constant AXEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111010001"; -- 0x5D EOR ABS,X
713 
constant AXEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111010010"; -- 0x5D EOR ABS,X
714 
constant AXEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111010011"; -- 0x5D EOR ABS,X
715 
constant AXBIT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111000000"; -- 0x3C BIT ABS,X
716 
constant AXBIT_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111000001"; -- 0x3C BIT ABS,X
717 
constant AXBIT_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111000010"; -- 0x3C BIT ABS,X
718 
constant AXBIT_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111000011"; -- 0x3C BIT ABS,X
719 
 
720 
------------------------------------
721 
--           ABSOLUTE,Y           --
722 
------------------------------------
723 
constant AYLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110010000"; -- 0xB9 LDA ABS,Y
724 
constant AYLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110010001"; -- 0xB9 LDA ABS,Y
725 
constant AYLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110010010"; -- 0xB9 LDA ABS,Y
726 
constant AYLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101110010011"; -- 0xB9 LDA ABS,Y
727 
constant AYLDX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111100000"; -- 0xBE LDX ABS,Y
728 
constant AYLDX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111100001"; -- 0xBE LDX ABS,Y
729 
constant AYLDX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111100010"; -- 0xBE LDX ABS,Y
730 
constant AYLDX_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111100011"; -- 0xBE LDX ABS,Y
731 
constant AYSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110010000"; -- 0x99 STA ABS,Y
732 
constant AYSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110010001"; -- 0x99 STA ABS,Y
733 
constant AYSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110010010"; -- 0x99 STA ABS,Y
734 
constant AYSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100110010011"; -- 0x99 STA ABS,Y
735 
constant AYADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110010000"; -- 0x79 ADC ABS,Y
736 
constant AYADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110010001"; -- 0x79 ADC ABS,Y
737 
constant AYADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110010010"; -- 0x79 ADC ABS,Y
738 
constant AYADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110010011"; -- 0x79 ADC ABS,Y
739 
constant AYADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011110010100"; -- 0x79 ADC ABS,Y
740 
constant AYSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110010000"; -- 0xF9 SBC ABS,Y
741 
constant AYSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110010001"; -- 0xF9 SBC ABS,Y
742 
constant AYSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110010010"; -- 0xF9 SBC ABS,Y
743 
constant AYSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110010011"; -- 0xF9 SBC ABS,Y
744 
constant AYSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111110010100"; -- 0xF9 SBC ABS,Y
745 
constant AYCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110010000"; -- 0xD9 CMP ABS,Y
746 
constant AYCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110010001"; -- 0xD9 CMP ABS,Y
747 
constant AYCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110010010"; -- 0xD9 CMP ABS,Y
748 
constant AYCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110110010011"; -- 0xD9 CMP ABS,Y
749 
constant AYORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110010000"; -- 0x19 ORA ABS,Y
750 
constant AYORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110010001"; -- 0x19 ORA ABS,Y
751 
constant AYORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110010010"; -- 0x19 ORA ABS,Y
752 
constant AYORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000110010011"; -- 0x19 ORA ABS,Y
753 
constant AYAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110010000"; -- 0x39 AND ABS,Y
754 
constant AYAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110010001"; -- 0x39 AND ABS,Y
755 
constant AYAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110010010"; -- 0x39 AND ABS,Y
756 
constant AYAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001110010011"; -- 0x39 AND ABS,Y
757 
constant AYEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110010000"; -- 0x59 EOR ABS,Y
758 
constant AYEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110010001"; -- 0x59 EOR ABS,Y
759 
constant AYEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110010010"; -- 0x59 EOR ABS,Y
760 
constant AYEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010110010011"; -- 0x59 EOR ABS,Y
761 
 
762 
------------------------------------------------
763 
--           ABSOLUTE LONG (JUMP...)          --
764 
------------------------------------------------
765 
constant ABJML_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111000000"; -- 0x5C JML ABS
766 
constant ABJML_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111000001"; -- 0x5C JML ABS
767 
constant ABJML_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111000010"; -- 0x5C JML ABS
768 
constant ABJSL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100000"; -- 0x22 JSL ABS
769 
constant ABJSL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100001"; -- 0x22 JSL ABS
770 
constant ABJSL_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100010"; -- 0x22 JSL ABS
771 
constant ABJSL_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100011"; -- 0x22 JSL ABS
772 
constant ABJSL_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100100"; -- 0x22 JSL ABS
773 
constant ABJSL_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000100101"; -- 0x22 JSL ABS
774 
 
775 
------------------------------------
776 
--           RELATIVE             --
777 
------------------------------------
778 
constant   BRA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000000000"; -- 0x80 BRA
779 
constant   BCC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100000000"; -- 0x90 BCC
780 
constant   BCS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100000000"; -- 0xB0 BCS
781 
constant   BEQ_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100000000"; -- 0xF0 BEQ
782 
constant   BNE_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100000000"; -- 0xD0 BNE
783 
constant   BPL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100000000"; -- 0x10 BPL
784 
constant   BMI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100000000"; -- 0x30 BMI
785 
constant   BVC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100000000"; -- 0x50 BVC
786 
constant   BVS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100000000"; -- 0x70 BVS
787 
 
788 
---------------------------------------
789 
--           RELATIVE LONG           --
790 
---------------------------------------
791 
constant   BRL_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000100000"; -- 0x82 BRL
792 
constant   BRL_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000100001"; -- 0x82 BRL
793 
 
794 
-------------------------------
795 
--           STACK           --
796 
-------------------------------
797 
constant   PEA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101000000"; -- 0xF4 PEA
798 
constant   PEA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101000001"; -- 0xF4 PEA
799 
constant   PEA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101000010"; -- 0xF4 PEA
800 
constant   PEA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101000011"; -- 0xF4 PEA
801 
constant   PEI_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101000000"; -- 0xD4 PEI
802 
constant   PEI_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101000001"; -- 0xD4 PEI
803 
constant   PEI_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101000010"; -- 0xD4 PEI
804 
constant   PEI_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101000011"; -- 0xD4 PEI
805 
constant   PEI_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101000100"; -- 0xD4 PEI
806 
constant   PER_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000100000"; -- 0x62 PER
807 
constant   PER_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000100001"; -- 0x62 PER
808 
constant   PER_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000100010"; -- 0x62 PER
809 
constant   PER_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000100011"; -- 0x62 PER
810 
constant   PER_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000100100"; -- 0x62 PER
811 
 
812 
----------------------------------
813 
--          DIRECT,Y            --
814 
----------------------------------
815 
constant DYLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110000"; -- 0xB7 LDA [DIR],Y
816 
constant DYLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110001"; -- 0xB7 LDA [DIR],Y
817 
constant DYLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110010"; -- 0xB7 LDA [IND],Y
818 
constant DYLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110011"; -- 0xB7 LDA [DIR],Y
819 
constant DYLDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110100"; -- 0xB7 LDA [DIR],Y
820 
constant DYLDA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110101"; -- 0xB7 LDA [DIR],Y
821 
constant DYLDA_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101101110110"; -- 0xB7 LDA [DIR],Y
822 
constant DYSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110000"; -- 0x97 STA [DIR],Y
823 
constant DYSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110001"; -- 0x97 STA [DIR],Y
824 
constant DYSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110010"; -- 0x97 STA [DIR],Y
825 
constant DYSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110011"; -- 0x97 STA [DIR],Y
826 
constant DYSTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110100"; -- 0x97 STA [DIR],Y
827 
constant DYSTA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110101"; -- 0x97 STA [DIR],Y
828 
constant DYSTA_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100101110110"; -- 0x97 STA [DIR],Y
829 
constant DYADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110000"; -- 0x77 ADC [DIR],Y
830 
constant DYADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110001"; -- 0x77 ADC [DIR],Y
831 
constant DYADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110010"; -- 0x77 ADC [DIR],Y
832 
constant DYADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110011"; -- 0x77 ADC [DIR],Y
833 
constant DYADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110100"; -- 0x77 ADC [DIR],Y
834 
constant DYADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110101"; -- 0x77 ADC [DIR],Y
835 
constant DYADC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011101110110"; -- 0x77 ADC [DIR],Y
836 
constant DYSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110000"; -- 0xF7 SBC [DIR],Y
837 
constant DYSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110001"; -- 0xF7 SBC [DIR],Y
838 
constant DYSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110010"; -- 0xF7 SBC [DIR],Y
839 
constant DYSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110011"; -- 0xF7 SBC [DIR],Y
840 
constant DYSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110100"; -- 0xF7 SBC [DIR],Y
841 
constant DYSBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110101"; -- 0xF7 SBC [DIR],Y
842 
constant DYSBC_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111101110110"; -- 0xF7 SBC [DIR],Y
843 
constant DYCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110000"; -- 0xD7 CMP [DIR],Y
844 
constant DYCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110001"; -- 0xD7 CMP [DIR],Y
845 
constant DYCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110010"; -- 0xD7 CMP [DIR],Y
846 
constant DYCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110011"; -- 0xD7 CMP [DIR],Y
847 
constant DYCMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110100"; -- 0xD7 CMP [DIR],Y
848 
constant DYCMP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110101"; -- 0xD7 CMP [DIR],Y
849 
constant DYCMP_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110101110110"; -- 0xD7 CMP [DIR],Y
850 
constant DYAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110000"; -- 0x37 AND [DIR],Y
851 
constant DYAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110001"; -- 0x37 AND [DIR],Y
852 
constant DYAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110010"; -- 0x37 AND [DIR],Y
853 
constant DYAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110011"; -- 0x37 AND [DIR],Y
854 
constant DYAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110100"; -- 0x37 AND [DIR],Y
855 
constant DYAND_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110101"; -- 0x37 AND [DIR],Y
856 
constant DYAND_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001101110110"; -- 0x37 AND [DIR],Y
857 
constant DYORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110000"; -- 0x17 ORA [DIR],Y
858 
constant DYORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110001"; -- 0x17 ORA [DIR],Y
859 
constant DYORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110010"; -- 0x17 ORA [DIR],Y
860 
constant DYORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110011"; -- 0x17 ORA [DIR],Y
861 
constant DYORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110100"; -- 0x17 ORA [DIR],Y
862 
constant DYORA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110101"; -- 0x17 ORA [DIR],Y
863 
constant DYORA_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000101110110"; -- 0x17 ORA [DIR],Y
864 
constant DYEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110000"; -- 0x57 EOR [DIR],Y
865 
constant DYEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110001"; -- 0x57 EOR [DIR],Y
866 
constant DYEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110010"; -- 0x57 EOR [DIR],Y
867 
constant DYEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110011"; -- 0x57 EOR [DIR],Y
868 
constant DYEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110100"; -- 0x57 EOR [DIR],Y
869 
constant DYEOR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110101"; -- 0x57 EOR [DIR],Y
870 
constant DYEOR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101110110"; -- 0x57 EOR [DIR],Y
871 
 
872 
--------------------------------
873 
--          DIRECT            --
874 
--------------------------------
875 
constant DILDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110000"; -- 0xA7 LDA [DIR]
876 
constant DILDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110001"; -- 0xA7 LDA [DIR]
877 
constant DILDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110010"; -- 0xA7 LDA [IND]
878 
constant DILDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110011"; -- 0xA7 LDA [DIR]
879 
constant DILDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110100"; -- 0xA7 LDA [DIR]
880 
constant DILDA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101001110101"; -- 0xA7 LDA [DIR]
881 
constant DISTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110000"; -- 0x87 STA [DIR]
882 
constant DISTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110001"; -- 0x87 STA [DIR]
883 
constant DISTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110010"; -- 0x87 STA [DIR]
884 
constant DISTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110011"; -- 0x87 STA [DIR]
885 
constant DISTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110100"; -- 0x87 STA [DIR]
886 
constant DISTA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100001110101"; -- 0x87 STA [DIR]
887 
constant DIADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110000"; -- 0x67 ADC [DIR]
888 
constant DIADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110001"; -- 0x67 ADC [DIR]
889 
constant DIADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110010"; -- 0x67 ADC [DIR]
890 
constant DIADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110011"; -- 0x67 ADC [DIR]
891 
constant DIADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110100"; -- 0x67 ADC [DIR]
892 
constant DIADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011001110101"; -- 0x67 ADC [DIR]
893 
constant DISBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110000"; -- 0xE7 SBC [DIR]
894 
constant DISBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110001"; -- 0xE7 SBC [DIR]
895 
constant DISBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110010"; -- 0xE7 SBC [DIR]
896 
constant DISBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110011"; -- 0xE7 SBC [DIR]
897 
constant DISBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110100"; -- 0xE7 SBC [DIR]
898 
constant DISBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111001110101"; -- 0xE7 SBC [DIR]
899 
constant DICMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110000"; -- 0xC7 CMP [DIR]
900 
constant DICMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110001"; -- 0xC7 CMP [DIR]
901 
constant DICMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110010"; -- 0xC7 CMP [DIR]
902 
constant DICMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110011"; -- 0xC7 CMP [DIR]
903 
constant DICMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110100"; -- 0xC7 CMP [DIR]
904 
constant DICMP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110001110101"; -- 0xC7 CMP [DIR]
905 
constant DIAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110000"; -- 0x27 AND [DIR]
906 
constant DIAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110001"; -- 0x27 AND [DIR]
907 
constant DIAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110010"; -- 0x27 AND [DIR]
908 
constant DIAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110011"; -- 0x27 AND [DIR]
909 
constant DIAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110100"; -- 0x27 AND [DIR]
910 
constant DIAND_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001001110101"; -- 0x27 AND [DIR]
911 
constant DIORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110000"; -- 0x07 ORA [DIR]
912 
constant DIORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110001"; -- 0x07 ORA [DIR]
913 
constant DIORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110010"; -- 0x07 ORA [DIR]
914 
constant DIORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110011"; -- 0x07 ORA [DIR]
915 
constant DIORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110100"; -- 0x07 ORA [DIR]
916 
constant DIORA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000001110101"; -- 0x07 ORA [DIR]
917 
constant DIEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110000"; -- 0x47 EOR [DIR]
918 
constant DIEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110001"; -- 0x47 EOR [DIR]
919 
constant DIEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110010"; -- 0x47 EOR [DIR]
920 
constant DIEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110011"; -- 0x47 EOR [DIR]
921 
constant DIEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110100"; -- 0x47 EOR [DIR]
922 
constant DIEOR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001110101"; -- 0x47 EOR [DIR]
923 
 
924 
----------------------------------------
925 
--            ABSOLUTE LONG           --
926 
----------------------------------------
927 
constant ALLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011110000"; -- 0xAF LDA ABS_LONG
928 
constant ALLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011110001"; -- 0xAF LDA ABS_LONG
929 
constant ALLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011110010"; -- 0xAF LDA ABS_LONG
930 
constant ALLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011110011"; -- 0xAF LDA ABS_LONG
931 
constant ALLDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101011110100"; -- 0xAF LDA ABS_LONG
932 
constant ALSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011110000"; -- 0x8F STA ABS_LONG
933 
constant ALSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011110001"; -- 0x8F STA ABS_LONG
934 
constant ALSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011110010"; -- 0x8F STA ABS_LONG
935 
constant ALSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011110011"; -- 0x8F STA ABS_LONG
936 
constant ALSTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100011110100"; -- 0x8F STA ABS_LONG
937 
constant ALADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110000"; -- 0x6F ADC ABS_LONG
938 
constant ALADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110001"; -- 0x6F ADC ABS_LONG
939 
constant ALADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110010"; -- 0x6F ADC ABS_LONG
940 
constant ALADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110011"; -- 0x6F ADC ABS_LONG
941 
constant ALADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110100"; -- 0x6F ADC ABS_LONG
942 
constant ALADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011011110101"; -- 0x6F ADC ABS_LONG
943 
constant ALSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110000"; -- 0xEF SBC ABS_LONG
944 
constant ALSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110001"; -- 0xEF SBC ABS_LONG
945 
constant ALSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110010"; -- 0xEF SBC ABS_LONG
946 
constant ALSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110011"; -- 0xEF SBC ABS_LONG
947 
constant ALSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110100"; -- 0xEF SBC ABS_LONG
948 
constant ALSBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111011110101"; -- 0xEF SBC ABS_LONG
949 
constant ALORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011110000"; -- 0x0F ORA ABS_LONG
950 
constant ALORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011110001"; -- 0x0F ORA ABS_LONG
951 
constant ALORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011110010"; -- 0x0F ORA ABS_LONG
952 
constant ALORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011110011"; -- 0x0F ORA ABS_LONG
953 
constant ALORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000011110100"; -- 0x0F ORA ABS_LONG
954 
constant ALAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011110000"; -- 0x2F AND ABS_LONG
955 
constant ALAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011110001"; -- 0x2F AND ABS_LONG
956 
constant ALAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011110010"; -- 0x2F AND ABS_LONG
957 
constant ALAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011110011"; -- 0x2F AND ABS_LONG
958 
constant ALAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001011110100"; -- 0x2F AND ABS_LONG
959 
constant ALEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011110000"; -- 0x4F EOR ABS_LONG
960 
constant ALEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011110001"; -- 0x4F EOR ABS_LONG
961 
constant ALEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011110010"; -- 0x4F EOR ABS_LONG
962 
constant ALEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011110011"; -- 0x4F EOR ABS_LONG
963 
constant ALEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010011110100"; -- 0x4F EOR ABS_LONG
964 
constant ALCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011110000"; -- 0xCF CMP ABS_LONG
965 
constant ALCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011110001"; -- 0xCF CMP ABS_LONG
966 
constant ALCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011110010"; -- 0xCF CMP ABS_LONG
967 
constant ALCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011110011"; -- 0xCF CMP ABS_LONG
968 
constant ALCMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110011110100"; -- 0xCF CMP ABS_LONG
969 
 
970 
-----------------------------------------
971 
--           ABSOLUTE LONG,X           --
972 
-----------------------------------------
973 
constant AILDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110000"; -- 0xBF LDA ABS_LONG,X
974 
constant AILDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110001"; -- 0xBF LDA ABS_LONG,X
975 
constant AILDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110010"; -- 0xBF LDA ABS_LONG,X
976 
constant AILDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110011"; -- 0xBF LDA ABS_LONG,X
977 
constant AILDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110100"; -- 0xBF LDA ABS_LONG,X
978 
constant AILDA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101111110101"; -- 0xBF LDA ABS_LONG,X
979 
constant AISTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110000"; -- 0x9F STA ABS_LONG,X
980 
constant AISTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110001"; -- 0x9F STA ABS_LONG,X
981 
constant AISTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110010"; -- 0x9F STA ABS_LONG,X
982 
constant AISTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110011"; -- 0x9F STA ABS_LONG,X
983 
constant AISTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110100"; -- 0x9F STA ABS_LONG,X
984 
constant AISTA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100111110101"; -- 0x9F STA ABS_LONG,X
985 
constant AIADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110000"; -- 0x7F ADC ABS_LONG,X
986 
constant AIADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110001"; -- 0x7F ADC ABS_LONG,X
987 
constant AIADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110010"; -- 0x7F ADC ABS_LONG,X
988 
constant AIADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110011"; -- 0x7F ADC ABS_LONG,X
989 
constant AIADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110100"; -- 0x7F ADC ABS_LONG,X
990 
constant AIADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011111110101"; -- 0x7F ADC ABS_LONG,X
991 
constant AISBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110000"; -- 0xFF SBC ABS_LONG,X
992 
constant AISBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110001"; -- 0xFF SBC ABS_LONG,X
993 
constant AISBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110010"; -- 0xFF SBC ABS_LONG,X
994 
constant AISBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110011"; -- 0xFF SBC ABS_LONG,X
995 
constant AISBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110100"; -- 0xFF SBC ABS_LONG,X
996 
constant AISBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111111110101"; -- 0xFF SBC ABS_LONG,X
997 
constant AICMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110000"; -- 0xDF CMP ABS_LONG,X
998 
constant AICMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110001"; -- 0xDF CMP ABS_LONG,X
999 
constant AICMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110010"; -- 0xDF CMP ABS_LONG,X
1000 
constant AICMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110011"; -- 0xDF CMP ABS_LONG,X
1001 
constant AICMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110100"; -- 0xDF CMP ABS_LONG,X
1002 
constant AICMP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110111110101"; -- 0xDF CMP ABS_LONG,X
1003 
constant AIAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110000"; -- 0x3F AND ABS_LONG,X
1004 
constant AIAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110001"; -- 0x3F AND ABS_LONG,X
1005 
constant AIAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110010"; -- 0x3F AND ABS_LONG,X
1006 
constant AIAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110011"; -- 0x3F AND ABS_LONG,X
1007 
constant AIAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110100"; -- 0x3F AND ABS_LONG,X
1008 
constant AIAND_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001111110101"; -- 0x3F AND ABS_LONG,X
1009 
constant AIORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110000"; -- 0x1F ORA ABS_LONG,X
1010 
constant AIORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110001"; -- 0x1F ORA ABS_LONG,X
1011 
constant AIORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110010"; -- 0x1F ORA ABS_LONG,X
1012 
constant AIORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110011"; -- 0x1F ORA ABS_LONG,X
1013 
constant AIORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110100"; -- 0x1F ORA ABS_LONG,X
1014 
constant AIORA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000111110101"; -- 0x1F ORA ABS_LONG,X
1015 
constant AIEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110000"; -- 0x5F EOR ABS_LONG,X
1016 
constant AIEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110001"; -- 0x5F EOR ABS_LONG,X
1017 
constant AIEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110010"; -- 0x5F EOR ABS_LONG,X
1018 
constant AIEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110011"; -- 0x5F EOR ABS_LONG,X
1019 
constant AIEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110100"; -- 0x5F EOR ABS_LONG,X
1020 
constant AIEOR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010111110101"; -- 0x5F EOR ABS_LONG,X
1021 
 
1022 
-----------------------------------------
1023 
--            STACK RELATIVE           --
1024 
-----------------------------------------
1025 
constant SRLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000110000"; -- 0xA3 LDA $XX,S
1026 
constant SRLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000110001"; -- 0xA3 LDA $XX,S
1027 
constant SRLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101000110010"; -- 0xA3 LDA $XX,S
1028 
constant SRSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000110000"; -- 0x83 STA $XX,S
1029 
constant SRSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000110001"; -- 0x83 STA $XX,S
1030 
constant SRSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100000110010"; -- 0x83 STA $XX,S
1031 
constant SRADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000110000"; -- 0x63 ADC $XX,S
1032 
constant SRADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000110001"; -- 0x63 ADC $XX,S
1033 
constant SRADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011000110010"; -- 0x63 ADC $XX,S
1034 
constant SRSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000110000"; -- 0xE3 SBC $XX,S
1035 
constant SRSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000110001"; -- 0xE3 SBC $XX,S
1036 
constant SRSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111000110010"; -- 0xE3 SBC $XX,S
1037 
constant SRCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000110000"; -- 0xC3 CMP $XX,S
1038 
constant SRCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000110001"; -- 0xC3 CMP $XX,S
1039 
constant SRCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110000110010"; -- 0xC3 CMP $XX,S
1040 
constant SRAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000110000"; -- 0x23 AND $XX,S
1041 
constant SRAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000110001"; -- 0x23 AND $XX,S
1042 
constant SRAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001000110010"; -- 0x23 AND $XX,S
1043 
constant SRORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000110000"; -- 0x03 ORA $XX,S
1044 
constant SRORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000110001"; -- 0x03 ORA $XX,S
1045 
constant SRORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000000110010"; -- 0x03 ORA $XX,S
1046 
constant SREOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000110000"; -- 0x43 EOR $XX,S
1047 
constant SREOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000110001"; -- 0x43 EOR $XX,S
1048 
constant SREOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010000110010"; -- 0x43 EOR $XX,S
1049 
 
1050 
--------------------------------------------------
1051 
--            STACK RELATIVE INDEXED Y          --
1052 
--------------------------------------------------
1053 
constant SYLDA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110000"; -- 0xB3 LDA ($XX,S),Y
1054 
constant SYLDA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110001"; -- 0xB3 LDA ($XX,S),Y
1055 
constant SYLDA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110010"; -- 0xB3 LDA ($XX,S),Y
1056 
constant SYLDA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110011"; -- 0xB3 LDA ($XX,S),Y
1057 
constant SYLDA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110100"; -- 0xB3 LDA ($XX,S),Y
1058 
constant SYLDA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0101100110101"; -- 0xB3 LDA ($XX,S),Y
1059 
constant SYSTA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110000"; -- 0x93 STA ($XX,S),Y
1060 
constant SYSTA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110001"; -- 0x93 STA ($XX,S),Y
1061 
constant SYSTA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110010"; -- 0x93 STA ($XX,S),Y
1062 
constant SYSTA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110011"; -- 0x93 STA ($XX,S),Y
1063 
constant SYSTA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110100"; -- 0x93 STA ($XX,S),Y
1064 
constant SYSTA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0100100110101"; -- 0x93 STA ($XX,S),Y
1065 
constant SYADC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110000"; -- 0x73 ADC ($XX,S),Y
1066 
constant SYADC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110001"; -- 0x73 ADC ($XX,S),Y
1067 
constant SYADC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110010"; -- 0x73 ADC ($XX,S),Y
1068 
constant SYADC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110011"; -- 0x73 ADC ($XX,S),Y
1069 
constant SYADC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110100"; -- 0x73 ADC ($XX,S),Y
1070 
constant SYADC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0011100110101"; -- 0x73 ADC ($XX,S),Y
1071 
constant SYSBC_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110000"; -- 0xF3 SBC ($XX,S),Y
1072 
constant SYSBC_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110001"; -- 0xF3 SBC ($XX,S),Y
1073 
constant SYSBC_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110010"; -- 0xF3 SBC ($XX,S),Y
1074 
constant SYSBC_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110011"; -- 0xF3 SBC ($XX,S),Y
1075 
constant SYSBC_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110100"; -- 0xF3 SBC ($XX,S),Y
1076 
constant SYSBC_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0111100110101"; -- 0xF3 SBC ($XX,S),Y
1077 
constant SYCMP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110000"; -- 0xD3 CMP ($XX,S),Y
1078 
constant SYCMP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110001"; -- 0xD3 CMP ($XX,S),Y
1079 
constant SYCMP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110010"; -- 0xD3 CMP ($XX,S),Y
1080 
constant SYCMP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110011"; -- 0xD3 CMP ($XX,S),Y
1081 
constant SYCMP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110100"; -- 0xD3 CMP ($XX,S),Y
1082 
constant SYCMP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0110100110101"; -- 0xD3 CMP ($XX,S),Y
1083 
constant SYAND_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110000"; -- 0x33 AND ($XX,S),Y
1084 
constant SYAND_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110001"; -- 0x33 AND ($XX,S),Y
1085 
constant SYAND_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110010"; -- 0x33 AND ($XX,S),Y
1086 
constant SYAND_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110011"; -- 0x33 AND ($XX,S),Y
1087 
constant SYAND_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110100"; -- 0x33 AND ($XX,S),Y
1088 
constant SYAND_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0001100110101"; -- 0x33 AND ($XX,S),Y
1089 
constant SYORA_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110000"; -- 0x13 ORA ($XX,S),Y
1090 
constant SYORA_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110001"; -- 0x13 ORA ($XX,S),Y
1091 
constant SYORA_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110010"; -- 0x13 ORA ($XX,S),Y
1092 
constant SYORA_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110011"; -- 0x13 ORA ($XX,S),Y
1093 
constant SYORA_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110100"; -- 0x13 ORA ($XX,S),Y
1094 
constant SYORA_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0000100110101"; -- 0x13 ORA ($XX,S),Y
1095 
constant SYEOR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110000"; -- 0x53 EOR ($XX,S),Y
1096 
constant SYEOR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110001"; -- 0x53 EOR ($XX,S),Y
1097 
constant SYEOR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110010"; -- 0x53 EOR ($XX,S),Y
1098 
constant SYEOR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110011"; -- 0x53 EOR ($XX,S),Y
1099 
constant SYEOR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110100"; -- 0x53 EOR ($XX,S),Y
1100 
constant SYEOR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010100110101"; -- 0x53 EOR ($XX,S),Y
1101 
 
1102 
------------------------------------
1103 
--           MOVE BLOCK           --
1104 
------------------------------------
1105 
constant MBMVN_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000000"; -- 0x54 MVN $xx,$xx
1106 
constant MBMVN_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000001"; -- 0x54 MVN $xx,$xx
1107 
constant MBMVN_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000010"; -- 0x54 MVN $xx,$xx
1108 
constant MBMVN_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000011"; -- 0x54 MVN $xx,$xx
1109 
constant MBMVN_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000100"; -- 0x54 MVN $xx,$xx
1110 
constant MBMVN_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000101"; -- 0x54 MVN $xx,$xx
1111 
constant MBMVN_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000110"; -- 0x54 MVN $xx,$xx
1112 
constant MBMVN_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010101000111"; -- 0x54 MVN $xx,$xx
1113 
 
1114 
constant MBMVP_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000000"; -- 0x44 MVP $xx,$xx
1115 
constant MBMVP_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000001"; -- 0x44 MVP $xx,$xx
1116 
constant MBMVP_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000010"; -- 0x44 MVP $xx,$xx
1117 
constant MBMVP_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000011"; -- 0x44 MVP $xx,$xx
1118 
constant MBMVP_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000100"; -- 0x44 MVP $xx,$xx
1119 
constant MBMVP_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000101"; -- 0x44 MVP $xx,$xx
1120 
constant MBMVP_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000110"; -- 0x44 MVP $xx,$xx
1121 
constant MBMVP_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "0010001000111"; -- 0x44 MVP $xx,$xx
1122 
 
1123 
-------------------------------------------------
1124 
--           NEW OPCODES (WDM OPCODE)          --
1125 
-------------------------------------------------
1126 
-- IMPLIED
1127 
constant   PHR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110000"; -- 0x8B PHR AXY->S (two byte instruction)
1128 
constant   PHR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110001"; -- 0x8B PHR AXY->S (two byte instruction)
1129 
constant   PHR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110010"; -- 0x8B PHR AXY->S (two byte instruction)
1130 
constant   PHR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110011"; -- 0x8B PHR AXY->S (two byte instruction)
1131 
constant   PHR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110100"; -- 0x8B PHR AXY->S (two byte instruction)
1132 
constant   PHR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100010110101"; -- 0x8B PHR AXY->S (two byte instruction)
1133 
 
1134 
constant   PLR_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110000"; -- 0xAB PLR S->YXA (two byte instruction)
1135 
constant   PLR_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110001"; -- 0xAB PLR S->YXA (two byte instruction)
1136 
constant   PLR_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110010"; -- 0xAB PLR S->YXA (two byte instruction)
1137 
constant   PLR_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110011"; -- 0xAB PLR S->YXA (two byte instruction)
1138 
constant   PLR_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110100"; -- 0xAB PLR S->YXA (two byte instruction)
1139 
constant   PLR_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110101"; -- 0xAB PLR S->YXA (two byte instruction)
1140 
constant   PLR_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1101010110110"; -- 0xAB PLR S->YXA (two byte instruction)
1141 
 
1142 
constant   SAV_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000000"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1143 
constant   SAV_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000001"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1144 
constant   SAV_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000010"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1145 
constant   SAV_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000011"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1146 
constant   SAV_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000100"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1147 
constant   SAV_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000101"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1148 
constant   SAV_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000110"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1149 
constant   SAV_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100000111"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1150 
constant   SAV_OP8: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100001000"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1151 
constant   SAV_OP9: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100001001"; -- 0x90 SAV AXYBDP->S (two byte instruction)
1152 
 
1153 
constant   RST_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010000"; -- 0x91 RST S->PDBYXA (two byte instruction)
1154 
constant   RST_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010001"; -- 0x91 RST S->PDBYXA (two byte instruction)
1155 
constant   RST_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010010"; -- 0x91 RST S->PDBYXA (two byte instruction)
1156 
constant   RST_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010011"; -- 0x91 RST S->PDBYXA (two byte instruction)
1157 
constant   RST_OP4: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010100"; -- 0x91 RST S->PDBYXA (two byte instruction)
1158 
constant   RST_OP5: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010101"; -- 0x91 RST S->PDBYXA (two byte instruction)
1159 
constant   RST_OP6: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010110"; -- 0x91 RST S->PDBYXA (two byte instruction)
1160 
constant   RST_OP7: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100010111"; -- 0x91 RST S->PDBYXA (two byte instruction)
1161 
constant   RST_OP8: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100011000"; -- 0x91 RST S->PDBYXA (two byte instruction)
1162 
constant   RST_OP9: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100011001"; -- 0x91 RST S->PDBYXA (two byte instruction)
1163 
constant  RST_OP10: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100100011010"; -- 0x91 RST S->PDBYXA (two byte instruction)
1164 
 
1165 
-- MULTIPLY UNSIGNED 16X16->32 BIT
1166 
constant   MPU_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011100000"; -- 0x8E MPU multiply A*X (two byte instruction)
1167 
constant   MPU_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011100001"; -- 0x8E MPU multiply A*X (two byte instruction)
1168 
constant   MPU_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011100010"; -- 0x8E MPU multiply A*X (two byte instruction)
1169 
constant   MPU_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011100011"; -- 0x8E MPU multiply A*X (two byte instruction)
1170 
 
1171 
-- MULTIPLY SIGNED 16X16->32 BIT
1172 
constant   MPS_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011110000"; -- 0x8F MPS multiply A*X (two byte instruction)
1173 
constant   MPS_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011110001"; -- 0x8F MPS multiply A*X (two byte instruction)
1174 
constant   MPS_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011110010"; -- 0x8F MPS multiply A*X (two byte instruction)
1175 
constant   MPS_OP3: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1100011110011"; -- 0x8F MPS multiply A*X (two byte instruction)
1176 
 
1177 
-- REGISTERS EXCHANGE
1178 
constant   XYX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1111010110000"; -- 0xEB EXCHANGE X <-> Y (two byte instruction)
1179 
constant   XYX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1111010110001"; -- 0xEB EXCHANGE X <-> Y (two byte instruction)
1180 
constant   XYX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1111010110010"; -- 0xEB EXCHANGE X <-> Y (two byte instruction)
1181 
constant   XAX_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1000010110000"; -- 0x0B EXCHANGE A <-> X (two byte instruction)
1182 
constant   XAX_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1000010110001"; -- 0x0B EXCHANGE A <-> X (two byte instruction)
1183 
constant   XAX_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1000010110010"; -- 0x0B EXCHANGE A <-> X (two byte instruction)
1184 
constant   XAY_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1001010110000"; -- 0x2B EXCHANGE A <-> Y (two byte instruction)
1185 
constant   XAY_OP1: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1001010110001"; -- 0x2B EXCHANGE A <-> Y (two byte instruction)
1186 
constant   XAY_OP2: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1001010110010"; -- 0x2B EXCHANGE A <-> Y (two byte instruction)
1187 
 
1188 
-- MISC
1189 
constant   EXT_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1111011000000"; -- 0xEC EXTEND SIGN OF A TO B (two byte instruction)
1190 
constant   NEG_OP0: STD_LOGIC_VECTOR(MC_ADDR_LENGTH downto 0) :=  "1111011010000"; -- 0xED NEGATE A         (two byte instruction)
1191 
 
1192 
 
1193 
-- ALU microcode
1194 
constant NOP_A: STD_LOGIC_VECTOR(4 downto 0) := "00000";    -- no operation
1195 
constant SUM_A: STD_LOGIC_VECTOR(4 downto 0) := "00001";    -- sum with carry
1196 
constant SUB_A: STD_LOGIC_VECTOR(4 downto 0) := "00010";    -- subtract with borrow
1197 
constant AND_A: STD_LOGIC_VECTOR(4 downto 0) := "00011";    -- and
1198 
constant  OR_A: STD_LOGIC_VECTOR(4 downto 0) := "00100";    -- or
1199 
constant XOR_A: STD_LOGIC_VECTOR(4 downto 0) := "00101";    -- xor
1200 
constant INC_A: STD_LOGIC_VECTOR(4 downto 0) := "00110";    -- increment by 1
1201 
constant DEC_A: STD_LOGIC_VECTOR(4 downto 0) := "00111";    -- decrement by 1
1202 
constant SHL_A: STD_LOGIC_VECTOR(4 downto 0) := "01000";    -- shift left
1203 
constant SHR_A: STD_LOGIC_VECTOR(4 downto 0) := "01001";    -- shift right
1204 
constant ROL_A: STD_LOGIC_VECTOR(4 downto 0) := "01010";    -- rotation left
1205 
constant ROR_A: STD_LOGIC_VECTOR(4 downto 0) := "01011";    -- rotation right
1206 
constant SWC_A: STD_LOGIC_VECTOR(4 downto 0) := "01100";    -- sum without carry (used for indexing and branches)
1207 
constant SWC_N: STD_LOGIC_VECTOR(4 downto 0) := "01100";    -- subtract without borrow (used only by branches with negative offset)
1208 
constant BIT_A: STD_LOGIC_VECTOR(4 downto 0) := "01101";    -- bit test (used by BIT opcode)
1209 
constant DAA_A: STD_LOGIC_VECTOR(4 downto 0) := "01110";    -- decimal adjustement for BCD sum
1210 
constant DAS_A: STD_LOGIC_VECTOR(4 downto 0) := "01111";    -- decimal adjustement for BCD subtract
1211 
constant CMP_A: STD_LOGIC_VECTOR(4 downto 0) := "10000";    -- compare
1212 
constant TSB_A: STD_LOGIC_VECTOR(4 downto 0) := "10001";    -- test and set bit
1213 
constant TRB_A: STD_LOGIC_VECTOR(4 downto 0) := "10010";    -- test and reset bit
1214 
constant EXT_A: STD_LOGIC_VECTOR(4 downto 0) := "10011";    -- extend sign
1215 
constant NEG_A: STD_LOGIC_VECTOR(4 downto 0) := "10100";    -- negate
1216 
 
1217 
-- PCR microcode
1218 
constant NOP_PC: STD_LOGIC_VECTOR(3 downto 0) := "0000"; -- PC no operation
1219 
constant LSB_PC: STD_LOGIC_VECTOR(3 downto 0) := "0001"; -- PC load lsb
1220 
constant MSB_PC: STD_LOGIC_VECTOR(3 downto 0) := "0010"; -- PC load msb
1221 
constant INC_PC: STD_LOGIC_VECTOR(3 downto 0) := "0011"; -- PC increment by 1
1222 
constant LOD_PC: STD_LOGIC_VECTOR(3 downto 0) := "0100"; -- PC load lsb\msb  (used by JMP\JSR instructions)
1223 
constant LML_PC: STD_LOGIC_VECTOR(3 downto 0) := "0101"; -- PC load lsb\msb from oper register (used for JML\JSL instructions)
1224 
constant IN2_PC: STD_LOGIC_VECTOR(3 downto 0) := "0110"; -- PC = PC +2 (BRK opcode)
1225 
constant DE3_PC: STD_LOGIC_VECTOR(3 downto 0) := "0111"; -- PC = PC -3 (MVN/MVP opcodes)
1226 
constant BRA_PC: STD_LOGIC_VECTOR(3 downto 0) := "1000"; -- PC branch
1227 
constant BRL_PC: STD_LOGIC_VECTOR(3 downto 0) := "1001"; -- PC branch long
1228 
 
1229 
-- MPR (memory data pointer) microcode
1230 
constant NOP_M: STD_LOGIC_VECTOR(4 downto 0) := "00000"; -- no operation
1231 
constant LSB_M: STD_LOGIC_VECTOR(4 downto 0) := "00001"; -- load lsb
1232 
constant MSB_M: STD_LOGIC_VECTOR(4 downto 0) := "00010"; -- load msb
1233 
constant INC_M: STD_LOGIC_VECTOR(4 downto 0) := "00011"; -- increment
1234 
constant DEC_M: STD_LOGIC_VECTOR(4 downto 0) := "00100"; -- decrement
1235 
constant VEC_M: STD_LOGIC_VECTOR(4 downto 0) := "00101"; -- load vector
1236 
constant ZPL_M: STD_LOGIC_VECTOR(4 downto 0) := "00110"; -- load ZEROPAGE
1237 
constant ALL_M: STD_LOGIC_VECTOR(4 downto 0) := "00111"; -- load all 16 bit register
1238 
constant ICC_M: STD_LOGIC_VECTOR(4 downto 0) := "01000"; -- increment MSB with carry
1239 
constant DOX_M: STD_LOGIC_VECTOR(4 downto 0) := "01001"; -- add D + offset + X
1240 
constant DOY_M: STD_LOGIC_VECTOR(4 downto 0) := "01010"; -- add D + offset + Y
1241 
constant AOS_M: STD_LOGIC_VECTOR(4 downto 0) := "01011"; -- add S + offset
1242 
constant ABX_M: STD_LOGIC_VECTOR(4 downto 0) := "01100"; -- add opr+X
1243 
constant ABY_M: STD_LOGIC_VECTOR(4 downto 0) := "01101"; -- add opr+Y
1244 
constant ADX_M: STD_LOGIC_VECTOR(4 downto 0) := "01110"; -- add X
1245 
constant ADY_M: STD_LOGIC_VECTOR(4 downto 0) := "01111"; -- add Y
1246 
constant MHB_M: STD_LOGIC_VECTOR(4 downto 0) := "10000"; -- load high byte
1247 
constant AOY_M: STD_LOGIC_VECTOR(4 downto 0) := "10001"; -- add opr+Y and concatenates SBR
1248 
 
1249 
-- address multiplexer microcode
1250 
constant ADPC: STD_LOGIC_VECTOR(2 downto 0) := "000";  -- select PC
1251 
constant ADMP: STD_LOGIC_VECTOR(2 downto 0) := "001";  -- select MP
1252 
constant ADSP: STD_LOGIC_VECTOR(2 downto 0) := "010";  -- select SP
1253 
constant ADDI: STD_LOGIC_VECTOR(2 downto 0) := "011";  -- select Direct
1254 
constant ADXR: STD_LOGIC_VECTOR(2 downto 0) := "100";  -- select X register
1255 
constant ADYR: STD_LOGIC_VECTOR(2 downto 0) := "101";  -- select Y register
1256 
constant ADNP: STD_LOGIC_VECTOR(2 downto 0) := "000";  -- no operation (PC)
1257 
 
1258 
-- PR microcode
1259 
constant NOP_P: STD_LOGIC_VECTOR(4 downto 0) := "00000"; -- PR no operation
1260 
constant PLD_P: STD_LOGIC_VECTOR(4 downto 0) := "00001"; -- PR load
1261 
constant FLD_P: STD_LOGIC_VECTOR(4 downto 0) := "00010"; -- NV load
1262 
constant FLC_P: STD_LOGIC_VECTOR(4 downto 0) := "00011"; -- NZC load
1263 
constant FLV_P: STD_LOGIC_VECTOR(4 downto 0) := "00100"; -- NVZC load
1264 
constant SEC_P: STD_LOGIC_VECTOR(4 downto 0) := "00101"; -- 1 => C
1265 
constant CLC_P: STD_LOGIC_VECTOR(4 downto 0) := "00110"; -- 0 => C
1266 
constant SEI_P: STD_LOGIC_VECTOR(4 downto 0) := "00111"; -- 1 => I
1267 
constant CLI_P: STD_LOGIC_VECTOR(4 downto 0) := "01000"; -- 0 => I
1268 
constant SED_P: STD_LOGIC_VECTOR(4 downto 0) := "01001"; -- 1 => D
1269 
constant CLD_P: STD_LOGIC_VECTOR(4 downto 0) := "01010"; -- 0 => D
1270 
constant CLV_P: STD_LOGIC_VECTOR(4 downto 0) := "01011"; -- 0 => V
1271 
constant AUC_P: STD_LOGIC_VECTOR(4 downto 0) := "01100"; -- auc => ACR
1272 
constant HAC_P: STD_LOGIC_VECTOR(4 downto 0) := "01101"; -- hold ACR
1273 
constant SID_P: STD_LOGIC_VECTOR(4 downto 0) := "01110"; -- 1 => I/D
1274 
constant LDZ_P: STD_LOGIC_VECTOR(4 downto 0) := "01111"; -- Z load
1275 
constant XCE_P: STD_LOGIC_VECTOR(4 downto 0) := "10000"; -- E => C; C => E
1276 
constant SEP_P: STD_LOGIC_VECTOR(4 downto 0) := "10001"; -- P = P OR din
1277 
constant REP_P: STD_LOGIC_VECTOR(4 downto 0) := "10010"; -- P = P AND not din
1278 
constant WDM_P: STD_LOGIC_VECTOR(4 downto 0) := "10011"; -- 1 => op_exp;
1279 
constant WDC_P: STD_LOGIC_VECTOR(4 downto 0) := "10100"; -- 0 => op_exp;
1280 
constant FLW_P: STD_LOGIC_VECTOR(4 downto 0) := "10101"; -- NZ load, 0 -> op_exp
1281 
constant MUF_P: STD_LOGIC_VECTOR(4 downto 0) := "10110"; -- Z load from unsigned multplier
1282 
constant MSF_P: STD_LOGIC_VECTOR(4 downto 0) := "10111"; -- NZ load from unsigned multplier
1283 
 
1284 
-- register operation microcode REGOP (decreg)
1285 
constant NOP_R: STD_LOGIC_VECTOR(5 downto 0) := "000000";  -- no operation
1286 
constant ALL_R: STD_LOGIC_VECTOR(5 downto 0) := "000001";  -- register A load lsb
1287 
constant ALM_R: STD_LOGIC_VECTOR(5 downto 0) := "000010";  -- register A load msb
1288 
constant A16_R: STD_LOGIC_VECTOR(5 downto 0) := "000011";  -- register A load msb & lsb
1289 
constant XLL_R: STD_LOGIC_VECTOR(5 downto 0) := "000100";  -- register X load lsb
1290 
constant XLM_R: STD_LOGIC_VECTOR(5 downto 0) := "000101";  -- register X load msb
1291 
constant X16_R: STD_LOGIC_VECTOR(5 downto 0) := "000110";  -- register X load msb & lsb
1292 
constant YLL_R: STD_LOGIC_VECTOR(5 downto 0) := "000111";  -- register Y load lsb
1293 
constant YLM_R: STD_LOGIC_VECTOR(5 downto 0) := "001000";  -- register Y load msb
1294 
constant Y16_R: STD_LOGIC_VECTOR(5 downto 0) := "001001";  -- register Y load msb & lsb
1295 
constant DLL_R: STD_LOGIC_VECTOR(5 downto 0) := "001010";  -- register D load lsb
1296 
constant DLM_R: STD_LOGIC_VECTOR(5 downto 0) := "001011";  -- register D load msb
1297 
constant D16_R: STD_LOGIC_VECTOR(5 downto 0) := "001100";  -- register D load msb & lsb
1298 
constant OLD_R: STD_LOGIC_VECTOR(5 downto 0) := "001101";  -- register O load lsb
1299 
constant OMD_R: STD_LOGIC_VECTOR(5 downto 0) := "001110";  -- register O load msb
1300 
constant SLD_R: STD_LOGIC_VECTOR(5 downto 0) := "001111";  -- register S load lsb
1301 
constant SLM_R: STD_LOGIC_VECTOR(5 downto 0) := "010000";  -- register S load msb
1302 
constant S16_R: STD_LOGIC_VECTOR(5 downto 0) := "010001";  -- register S load msb & lsb
1303 
constant SUP_R: STD_LOGIC_VECTOR(5 downto 0) := "010010";  -- register S increment by 1
1304 
constant SDW_R: STD_LOGIC_VECTOR(5 downto 0) := "010011";  -- register S decrement by 1
1305 
constant SAU_R: STD_LOGIC_VECTOR(5 downto 0) := "010100";  -- register A (lsb) load/register S increment by 1
1306 
constant SXU_R: STD_LOGIC_VECTOR(5 downto 0) := "010101";  -- register X (lsb) load/register S increment by 1
1307 
constant SXM_R: STD_LOGIC_VECTOR(5 downto 0) := "010110";  -- register X (msb) load/register S increment by 1
1308 
constant SYU_R: STD_LOGIC_VECTOR(5 downto 0) := "010111";  -- register Y (lsb) load/register S increment by 1
1309 
constant SYM_R: STD_LOGIC_VECTOR(5 downto 0) := "011000";  -- register Y (msb) load/register S increment by 1
1310 
constant KLD_R: STD_LOGIC_VECTOR(5 downto 0) := "011001";  -- register K (PBR) load
1311 
constant BLD_R: STD_LOGIC_VECTOR(5 downto 0) := "011010";  -- register B (DBR) load
1312 
constant KCL_R: STD_LOGIC_VECTOR(5 downto 0) := "011011";  -- register K (PBR) clear and register S decrement by 1
1313 
constant BCL_R: STD_LOGIC_VECTOR(5 downto 0) := "011100";  -- register B (DBR) clear
1314 
constant SKC_R: STD_LOGIC_VECTOR(5 downto 0) := "011101";  -- register B (DBR) clear and register S decrement by 1
1315 
constant DEA_R: STD_LOGIC_VECTOR(5 downto 0) := "011110";  -- register A decrement (MVN/MVP)
1316 
constant O16_R: STD_LOGIC_VECTOR(5 downto 0) := "011111";  -- register O load msb & lsb
1317 
constant OSU_R: STD_LOGIC_VECTOR(5 downto 0) := "100000";  -- register O load lsb/register S increment by 1
1318 
constant MVN_R: STD_LOGIC_VECTOR(5 downto 0) := "100001";  -- register XY increment by 1, A decremented by 1
1319 
constant MVP_R: STD_LOGIC_VECTOR(5 downto 0) := "100010";  -- register XY decrement by 1, A decremented by 1
1320 
constant MUL_R: STD_LOGIC_VECTOR(5 downto 0) := "100011";  -- register A/B load multiplication lsb result, register X load multiplication msb result
1321 
constant MUI_R: STD_LOGIC_VECTOR(5 downto 0) := "100100";  -- multiplication init
1322 
constant MUS_R: STD_LOGIC_VECTOR(5 downto 0) := "100101";  -- multiplication (unsigned) start
1323 
constant MSS_R: STD_LOGIC_VECTOR(5 downto 0) := "100110";  -- multiplication (signed) start
1324 
constant WAI_R: STD_LOGIC_VECTOR(5 downto 0) := "100111";  -- WAI set flipflop
1325 
constant STP_R: STD_LOGIC_VECTOR(5 downto 0) := "101000";  -- STP set flipflop
1326 
constant BLS_R: STD_LOGIC_VECTOR(5 downto 0) := "101001";  -- register B (DBR) load/register S incremented by 1
1327 
constant DLS_R: STD_LOGIC_VECTOR(5 downto 0) := "101010";  -- register D load msb & lsb/register S incremented by 1
1328 
 
1329 
-- register multiplexer microcode RSEL (ALU operand #1)
1330 
constant EXT_O: STD_LOGIC_VECTOR(4 downto 0) := "00000";  -- external data bus
1331 
constant ARD_O: STD_LOGIC_VECTOR(4 downto 0) := "00001";  -- register A msb & lsb select
1332 
constant ARM_O: STD_LOGIC_VECTOR(4 downto 0) := "00010";  -- register A msb select (also returns A swapped)
1333 
constant XRD_O: STD_LOGIC_VECTOR(4 downto 0) := "00011";  -- register X msb & lsb select
1334 
constant XRM_O: STD_LOGIC_VECTOR(4 downto 0) := "00100";  -- register X msb select
1335 
constant YRD_O: STD_LOGIC_VECTOR(4 downto 0) := "00101";  -- register Y msb & lsb select
1336 
constant YRM_O: STD_LOGIC_VECTOR(4 downto 0) := "00110";  -- register Y msb select
1337 
constant SRD_O: STD_LOGIC_VECTOR(4 downto 0) := "00111";  -- register S lsb select
1338 
constant PRD_O: STD_LOGIC_VECTOR(4 downto 0) := "01000";  -- register P select
1339 
constant PLR_O: STD_LOGIC_VECTOR(4 downto 0) := "01001";  -- register PCL select
1340 
constant PHR_O: STD_LOGIC_VECTOR(4 downto 0) := "01010";  -- register PCH select
1341 
constant ORD_O: STD_LOGIC_VECTOR(4 downto 0) := "01011";  -- register O msb & lsb select
1342 
constant Z00_O: STD_LOGIC_VECTOR(4 downto 0) := "01100";  -- select (all zero output)
1343 
constant DRD_O: STD_LOGIC_VECTOR(4 downto 0) := "01101";  -- register D msb & lsb select
1344 
constant DRM_O: STD_LOGIC_VECTOR(4 downto 0) := "01110";  -- register D msb select
1345 
constant KRD_O: STD_LOGIC_VECTOR(4 downto 0) := "01111";  -- register K PBR
1346 
constant BRD_O: STD_LOGIC_VECTOR(4 downto 0) := "10000";  -- register B PBR
1347 
constant EXM_O: STD_LOGIC_VECTOR(4 downto 0) := "10001";  -- external data bus on MSB, O on lsb
1348 
constant OMD_O: STD_LOGIC_VECTOR(4 downto 0) := "10010";  -- register O msb select
1349 
constant PCR_O: STD_LOGIC_VECTOR(4 downto 0) := "10011";  -- register PC (16 bit) select
1350 
 
1351 
-- data multiplexer microcode DMUX (ALU operand #2)
1352 
constant NOP_D: STD_LOGIC_VECTOR(2 downto 0) := "000";
1353 
constant ORD_D: STD_LOGIC_VECTOR(2 downto 0) := "001";
1354 
constant EXT_D: STD_LOGIC_VECTOR(2 downto 0) := "010";
1355 
constant EXM_D: STD_LOGIC_VECTOR(2 downto 0) := "011";
1356 
constant BCD_D: STD_LOGIC_VECTOR(2 downto 0) := "100";
1357 
 
1358 
-- read/write control
1359 
constant   RDE: STD_LOGIC_VECTOR(1 downto 0) := "11";    -- data bus read
1360 
constant   WRE: STD_LOGIC_VECTOR(1 downto 0) := "10";    -- data bus write (combinatorial mode)
1361 
constant   WRL: STD_LOGIC_VECTOR(1 downto 0) := "01";    -- data bus write (registered mode)
1362 
 
1363 
begin
1364 
  process(em,m,x,a)
1365 
  begin
1366 
         -----------------------------------
1367 
         --          NATIVE MODE          --
1368 
         -----------------------------------
1369 
    if em = '0' then
1370 
          -- The PLA is arranged like an ROM, there are an address input "a" and an data output "q". The address of PLA is 13 bit wide
1371 
          -- and composed in this way:
1372 
          --
1373 
          --  W  ----  CPU OPCODE   ---- --- MPC --
1374 
          --  |  |                     | |        |
1375 
          --  |  |                     | |        |
1376 
          --  W  X--X--X--X--X--X--X--X--Y--Y--Y--Y
1377 
          -- 12-11-10-09-08-07-06-05-04-03-02-01-00
1378 
          --
1379 
          -- the bit (12) W is the two byte instruction bit
1380 
          -- the bits (11-4) (X field) is formed by CPU instruction opcode
1381 
          -- the bits (3-0) (Y field) is formed by the three bit wide microinstruction program counter (MPC)
1382 
          -- The MPC field is cleared at each opcode fetch by FSM and since it's three bit wide there are
1383 
          -- an maximum of eight microinstructions available per opcode
1384 
          --
1385 
          -- The bits 10-3 of PLA address serves to select the microcode group of a related CPU opcode
1386 
          -- and they are stable for all instruction execution time, instead the remaining three bit 2-0 (MPC field) of PLA address
1387 
          -- increment at each clock in order to address the next microcode instructions.
1388 
          -- microcode assembly:
1389 
          -- Due the particulary pipeline structure of this CPU, all microinstructions have an extra cycle hidden on fetch
1390 
          -- of the next opcode instruction and normally this extra cycle is coded as "NOP" (see the last line  "when  others =>...").
1391 
          -- However there are some instructions where this extra cycle is used for some functions like decimal adjustments etc of
1392 
          -- ADC and SBC instructions (see DAA and DAS).
1393 
          --
1394 
          -- Microcode fields:
1395 
          --
1396 
          --                          DMUX: ALU operand #2 multiplexer
1397 
          --                          |       AI: effective address is indexed (X or Y)
1398 
          --                          |       |   VP: vector pull
1399 
          --                          |       |   |   ML: memory lock
1400 
          --                          |       |   |   |   VPA: valid program address
1401 
          --                          |       |   |   |   |   VDA: valid data address
1402 
          --                          |       |   |   |   |   |   EI: end of microcode sequence (the hidden extra cycle it's always executed after this microinstruction)
1403 
          --                          |       |   |   |   |   |   |   W: read/write control
1404 
          --                          |       |   |   |   |   |   |   |    CLI: clear interrupt request
1405 
          --                          |       |   |   |   |   |   |   |    |    PD: PC/MP address output multiplexer select
1406 
          --                          |       |   |   |   |   |   |   |    |    |      PCR: register PC (program counter)
1407 
          --                          |       |   |   |   |   |   |   |    |    |      |        MPR: register MP (memory pointer)
1408 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       P_OP: register P set/reset bit
1409 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       |       ALUOP: ALU operation
1410 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       |       |       REGOP: registers load/increment/decrement etc.
1411 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       RSEL: registers output multiplexer select
1412 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
1413 
          --                          |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
1414 
                 case a is              -- DMUX    AI  VP  ML VPA VDA  EI  W    CLI  PD     PCR      MPR     P_OP    ALUOP   REGOP   RSEL
1415 
                        ------------------------------------
1416 
                        --            IMPLIED             --
1417 
                        ------------------------------------
1418 
                        -- BRK
1419 
                        when    BRK_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & IN2_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- if no interrupt request then PC=PC+2
1420 
                        when    BRK_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- PBR->S; SP-1
1421 
                        when    BRK_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1
1422 
                        when    BRK_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1
1423 
                        when    BRK_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & VEC_M & SID_P & NOP_A & KCL_R & PRD_O; -- P->S; VEC->MP; CLI; SEI; CLD
1424 
                        when    BRK_OP5 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'0'& RDE &'1'& ADMP & LSB_PC & INC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCL; MP+1; 1->B; VP
1425 
                        when    BRK_OP6 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'1'& RDE &'1'& ADMP & MSB_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCH; EI; VP
1426 
 
1427 
                        -- COP
1428 
                        when    COP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & IN2_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- if no interrupt request then PC=PC+2
1429 
                        when    COP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- PBR->S; SP-1
1430 
                        when    COP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1
1431 
                        when    COP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1
1432 
                        when    COP_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & VEC_M & SID_P & NOP_A & KCL_R & PRD_O; -- P->S; VEC->MP; CLI; SEI; CLD
1433 
                        when    COP_OP5 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'0'& RDE &'1'& ADMP & LSB_PC & INC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCL; MP+1; 1->B; VP
1434 
                        when    COP_OP6 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'1'& RDE &'1'& ADMP & MSB_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCH; EI; VP
1435 
 
1436 
                        -- NOP
1437 
                   when    NOP_OP0 => q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- EI
1438 
 
1439 
                        -- CLC
1440 
                        when    CLC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLC_P & NOP_A & NOP_R & EXT_O; -- 0->C; EI
1441 
 
1442 
                        -- SEC
1443 
                        when    SEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SEC_P & NOP_A & NOP_R & EXT_O; -- 1->C; EI
1444 
 
1445 
                        -- CLI
1446 
                        when    CLI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLI_P & NOP_A & NOP_R & EXT_O; -- 0->I; EI
1447 
 
1448 
                        -- SEI
1449 
                        when    SEI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SEI_P & NOP_A & NOP_R & EXT_O; -- 1->I; EI
1450 
 
1451 
                        -- CLV
1452 
                        when    CLV_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLV_P & NOP_A & NOP_R & EXT_O; -- 0->V; EI
1453 
 
1454 
                        -- CLD
1455 
                        when    CLD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLD_P & NOP_A & NOP_R & EXT_O; -- 0->D; EI
1456 
 
1457 
                        -- SED
1458 
                        when    SED_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SED_P & NOP_A & NOP_R & EXT_O; -- 1->D; EI
1459 
 
1460 
                        -- TAX
1461 
                        when    TAX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & ARD_O; -- A->X; EI
1462 
 
1463 
                        -- TXA
1464 
                        when    TXA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & XRD_O; -- X->A; EI
1465 
 
1466 
                        -- TAY
1467 
                        when    TAY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & ARD_O; -- A->Y; EI
1468 
 
1469 
                        -- TYA
1470 
                        when    TYA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & YRD_O; -- Y->A; EI
1471 
 
1472 
                        -- TXY
1473 
                        when    TXY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & XRD_O; -- X->Y; EI
1474 
 
1475 
                        -- TYX
1476 
                        when    TYX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & YRD_O; -- Y->X; EI
1477 
 
1478 
                        -- TCD
1479 
                        when    TCD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & D16_R & ARD_O; -- C->D; EI
1480 
 
1481 
                        -- TDC
1482 
                        when    TDC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & DRD_O; -- D->C; EI
1483 
 
1484 
                        -- TXS
1485 
                        when    TXS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & S16_R & XRD_O; -- X->S; EI
1486 
 
1487 
                        -- TSX
1488 
                        when    TSX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & SRD_O; -- S->X; EI
1489 
 
1490 
                        -- INC A
1491 
                        when    INC_OP0 =>
1492 
                                if m = '1' then
1493 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & ALL_R & ARD_O; -- A+1; EI
1494 
                                          else
1495 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & A16_R & ARD_O; -- A+1; EI
1496 
                 end if;
1497 
 
1498 
                        -- DEC A
1499 
                        when    DEC_OP0 =>
1500 
                                if m = '1' then
1501 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & ALL_R & ARD_O; -- A-1; EI
1502 
                                          else
1503 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & A16_R & ARD_O; -- A-1; EI
1504 
                 end if;
1505 
 
1506 
                        -- INX
1507 
                        when    INX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & X16_R & XRD_O; -- X+1; EI
1508 
 
1509 
                        -- DEX
1510 
                        when    DEX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & X16_R & XRD_O; -- X-1; EI
1511 
 
1512 
                        -- INY
1513 
                        when    INY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & Y16_R & YRD_O; -- Y+1; EI
1514 
 
1515 
                        -- DEY
1516 
                        when    DEY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & Y16_R & YRD_O; -- Y-1; EI
1517 
 
1518 
                        -- PHP
1519 
                        when    PHP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PRD_O; -- P->S; SP-1; EI
1520 
 
1521 
                        -- PHD
1522 
                        when    PHD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRM_O; -- D (msb) ->S; SP-1;
1523 
                        when    PHD_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRD_O; -- D (lsb) ->S; SP-1; EI
1524 
 
1525 
                        -- PHA
1526 
                        when    PHA_OP0 =>
1527 
                              if m = '1' then
1528 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A (lsb) ->S; SP-1; EI
1529 
                              else
1530 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARM_O; -- A (msb) ->S; SP-1;
1531 
               end if;
1532 
                        when    PHA_OP1 =>
1533 
                                        if m = '1' then
1534 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1535 
               else
1536 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A (lsb) ->S; SP-1; EI
1537 
               end if;
1538 
 
1539 
                        -- PHX
1540 
                        when    PHX_OP0 =>
1541 
                              if x = '1' then
1542 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X (lsb) ->S; SP-1; EI
1543 
                              else
1544 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRM_O; -- X (msb) ->S; SP-1;
1545 
               end if;
1546 
                        when    PHX_OP1 =>
1547 
                                        if x = '1' then
1548 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1549 
               else
1550 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X (lsb) ->S; SP-1; EI
1551 
               end if;
1552 
 
1553 
                        -- PHY
1554 
                        when    PHY_OP0 =>
1555 
                              if x = '1' then
1556 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRD_O; -- Y (lsb) ->S; SP-1; EI
1557 
                              else
1558 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRM_O; -- Y (msb) ->S; SP-1;
1559 
               end if;
1560 
                        when    PHY_OP1 =>
1561 
                                        if x = '1' then
1562 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1563 
               else
1564 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRD_O; -- Y (lsb) ->S; SP-1; EI
1565 
               end if;
1566 
 
1567 
                        -- PHR (in native mode PHR pushes ALWAYS 16 bit registers)
1568 
                        when    PHR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARM_O; -- A(msb)->S; SP-1;     (two byte instruction)
1569 
                        when    PHR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A(lsb)->S; SP-1;     (two byte instruction)
1570 
                        when    PHR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRM_O; -- X(msb)->S; SP-1;     (two byte instruction)
1571 
                        when    PHR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X(lsb)->S; SP-1;     (two byte instruction)
1572 
                        when    PHR_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRM_O; -- Y(msb)->S; SP-1;     (two byte instruction)
1573 
                        when    PHR_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & SDW_R & YRD_O; -- Y(lsb)->S; SP-1; EI  (two byte instruction)
1574 
 
1575 
                        -- SAV (in native mode STO pushes ALWAYS AXY 16 bit registers)
1576 
                        when    SAV_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARM_O; -- A(msb)->S; SP-1;     (two byte instruction)
1577 
                        when    SAV_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A(lsb)->S; SP-1;     (two byte instruction)
1578 
                        when    SAV_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRM_O; -- X(msb)->S; SP-1;     (two byte instruction)
1579 
                        when    SAV_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X(lsb)->S; SP-1;     (two byte instruction)
1580 
                        when    SAV_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRM_O; -- Y(msb)->S; SP-1;     (two byte instruction)
1581 
                        when    SAV_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRD_O; -- Y(lsb)->S; SP-1;     (two byte instruction)
1582 
                        when    SAV_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PRD_O; -- P->S; SP-1;          (two byte instruction)
1583 
                        when    SAV_OP7 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & BRD_O; -- B->S; SP-1;          (two byte instruction)
1584 
                        when    SAV_OP8 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRM_O; -- D (msb) ->S; SP-1;   (two byte instruction)
1585 
                        when    SAV_OP9 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & SDW_R & DRD_O; -- D (lsb) ->S; SP-1;   (two byte instruction)
1586 
 
1587 
                        -- RST (in native mode RST pulls ALWAYS AXY 16 bit registers)
1588 
                        when    RST_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP;     SP+1 (two byte instruction)
1589 
                        when    RST_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- S->O (lsb); SP+1
1590 
                        when    RST_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & DLS_R & EXM_O; -- S msb) & O (lsb) -> D;/SP+1
1591 
                        when    RST_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & BLS_R & EXT_O; -- S->B; SP +1
1592 
                        when    RST_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & PLD_P & NOP_A & SUP_R & EXT_O; -- S->P; SP+1
1593 
                        when    RST_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYU_R & EXT_O; -- S->Y (lsb); SP+1 (two byte instruction)
1594 
                        when    RST_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYM_R & EXT_O; -- S->Y (msb); SP+1 (two byte instruction)
1595 
                        when    RST_OP7 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXU_R & EXT_O; -- S->X (lsb); SP+1 (two byte instruction)
1596 
                        when    RST_OP8 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXM_R & EXT_O; -- S->X (msb); SP+1 (two byte instruction)
1597 
                        when    RST_OP9 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SAU_R & EXT_O; -- S->A (lsb); SP+1 (two byte instruction)
1598 
                        when   RST_OP10 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & ALM_R & EXT_O; -- S->A (msb); EI   (two byte instruction)
1599 
 
1600 
                        -- PLP
1601 
                        when    PLP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1602 
                        when    PLP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & PLD_P & NOP_A & NOP_R & EXT_O; -- S->P; EI
1603 
 
1604 
                        -- PLD
1605 
                        when    PLD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1606 
                        when    PLD_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- S->O (lsb); SP+1
1607 
                        when    PLD_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & D16_R & EXM_O; -- S msb) & O (lsb) -> D;
1608 
 
1609 
                        -- PLA
1610 
                        when    PLA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1611 
                        when    PLA_OP1 =>
1612 
                              if m = '1' then
1613 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- S->A (lsb); EI
1614 
                                        else
1615 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- SP->MP; SP+1
1616 
               end if;
1617 
                        when    PLA_OP2 =>
1618 
                              if m = '1' then
1619 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1620 
                                        else
1621 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- S->O (msb)
1622 
                                        end if;
1623 
                        when    PLA_OP3 =>
1624 
                              if m = '1' then
1625 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1626 
                                        else
1627 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & ORD_O; -- O->A (msb/lsb)
1628 
                                        end if;
1629 
 
1630 
                        -- PLX
1631 
                        when    PLX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1632 
                        when    PLX_OP1 =>
1633 
                              if x = '1' then
1634 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- S->X (lsb); EI
1635 
                                        else
1636 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- SP->MP; SP+1
1637 
               end if;
1638 
                        when    PLX_OP2 =>
1639 
                              if x = '1' then
1640 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1641 
                                        else
1642 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- S->O (msb)
1643 
                                        end if;
1644 
                        when    PLX_OP3 =>
1645 
                              if x = '1' then
1646 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1647 
                                        else
1648 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & ORD_O; -- O->X (msb/lsb)
1649 
                                        end if;
1650 
 
1651 
                        -- PLY
1652 
                        when    PLY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1653 
                        when    PLY_OP1 =>
1654 
                              if x = '1' then
1655 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- S->Y (lsb); EI
1656 
                                        else
1657 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- SP->MP; SP+1
1658 
               end if;
1659 
                        when    PLY_OP2 =>
1660 
                              if x = '1' then
1661 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1662 
                                        else
1663 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- S->O (msb)
1664 
                                        end if;
1665 
                        when    PLY_OP3 =>
1666 
                              if x = '1' then
1667 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1668 
                                        else
1669 
                                                     q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & ORD_O; -- O->X (msb/lsb)
1670 
                                        end if;
1671 
 
1672 
                        -- PLR (in native mode PLR pulls ALWAYS 16 bit registers)
1673 
                        when    PLR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP;     SP+1 (two byte instruction)
1674 
                        when    PLR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYU_R & EXT_O; -- S->Y (lsb); SP+1 (two byte instruction)
1675 
                        when    PLR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYM_R & EXT_O; -- S->Y (msb); SP+1 (two byte instruction)
1676 
                        when    PLR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXU_R & EXT_O; -- S->X (lsb); SP+1 (two byte instruction)
1677 
                        when    PLR_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXM_R & EXT_O; -- S->X (msb); SP+1 (two byte instruction)
1678 
                        when    PLR_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SAU_R & EXT_O; -- S->A (lsb); SP+1 (two byte instruction)
1679 
                        when    PLR_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & ALM_R & EXT_O; -- S->A (msb); EI   (two byte instruction)
1680 
 
1681 
                        -- RTI
1682 
                        when    RTI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- PC->MEM; MP=01XX (STACK)
1683 
                        when    RTI_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & PLD_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; MEM->P; SP +1
1684 
                        when    RTI_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB->O;
1685 
                        when    RTI_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
1686 
                        when    RTI_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MSB->O;
1687 
                        when    RTI_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
1688 
                        when    RTI_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADSP & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; MEM->PBR;
1689 
 
1690 
                        -- RTS
1691 
                        when    RTS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
1692 
                        when    RTS_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB->O;
1693 
                        when    RTS_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
1694 
                        when    RTS_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MEM->PC
1695 
                        when    RTS_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC+1; PC->MEM; EI
1696 
 
1697 
                        -- ASL (A)
1698 
                        when    ASL_OP0 =>
1699 
                                if m = '1' then
1700 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHL_A & ALL_R & ARD_O; -- A (lsb) SHIFT LEFT; EI
1701 
                                          else
1702 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHL_A & A16_R & ARD_O; -- A (msb/lsb) SHIFT LEFT; EI
1703 
                           end if;
1704 
 
1705 
                        -- LSR (A)
1706 
                        when    LSR_OP0 =>
1707 
                                if m = '1' then
1708 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHR_A & ALL_R & ARD_O; -- A (lsb) SHIFT RIGHT; EI
1709 
                                          else
1710 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHR_A & A16_R & ARD_O; -- A (msb/lsb) SHIFT RIGHT; EI
1711 
                                          end if;
1712 
 
1713 
                        -- ROL (A)
1714 
                        when    ROL_OP0 =>
1715 
                                if m = '1' then
1716 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROL_A & ALL_R & ARD_O; -- A (lsb) ROTATE LEFT; EI
1717 
                                          else
1718 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROL_A & A16_R & ARD_O; -- A (msb\lsb) ROTATE LEFT; EI
1719 
                           end if;
1720 
 
1721 
                        -- ROR (A)
1722 
                        when    ROR_OP0 =>
1723 
                                if m = '1' then
1724 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROR_A & ALL_R & ARD_O; -- A (lsb) ROTATE RIGHT; EI
1725 
                                          else
1726 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROR_A & A16_R & ARD_O; -- A (msb\lsb) ROTATE RIGHT; EI
1727 
                           end if;
1728 
 
1729 
                        -- EXT (A)
1730 
                        when    EXT_OP0 =>
1731 
                                if m = '1' then
1732 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- NOP; EI        (two byte instruction)
1733 
                                          else
1734 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & EXT_A & A16_R & ARD_O; -- A (msb/lsb) SHIFT LEFT; EI (two byte instruction)
1735 
                           end if;
1736 
 
1737 
                        -- NEG (A)
1738 
                        when    NEG_OP0 =>
1739 
                                if m = '1' then
1740 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NEG_A & ALL_R & ARD_O; -- negates A (lsb); EI (two byte instruction)
1741 
                                          else
1742 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NEG_A & A16_R & ARD_O; -- negates A (msb\lsb); EI (two byte instruction)
1743 
                           end if;
1744 
 
1745 
                        -- XYX
1746 
                        when    XYX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & XRD_O; -- X->O;          (two byte instruction)
1747 
                        when    XYX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & X16_R & YRD_O; -- Y->X;
1748 
                        when    XYX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & Y16_R & ORD_O; -- O->Y; EI
1749 
 
1750 
                        -- XAX
1751 
                        when    XAX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & XRD_O; -- X->O;          (two byte instruction)
1752 
                        when    XAX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & X16_R & ARD_O; -- A->X;
1753 
                        when    XAX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & A16_R & ORD_O; -- O->A; EI
1754 
 
1755 
                        -- XAY
1756 
                        when    XAY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & YRD_O; -- Y->O;          (two byte instruction)
1757 
                        when    XAY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & Y16_R & ARD_O; -- A->Y;
1758 
                        when    XAY_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & A16_R & ORD_O; -- O->A; EI
1759 
 
1760 
                        -- TCS
1761 
                        when    TCS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & S16_R & ARD_O; -- C->S;
1762 
 
1763 
                        -- TSC
1764 
                        when    TSC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & SRD_O; -- S->C;
1765 
 
1766 
                        -- XCE
1767 
                        when    XCE_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & XCE_P & NOP_A & NOP_R & EXT_O; -- E<>C; EI
1768 
 
1769 
                   -- WDM
1770 
                        when    WDM_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDM_P & NOP_A & NOP_R & EXT_O; -- set two byte instruction bit
1771 
 
1772 
                        -- PHK
1773 
                        when    PHK_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- K->S; SP-1; EI
1774 
 
1775 
                        -- PHB
1776 
                        when    PHB_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & BRD_O; -- B->S; SP-1; EI
1777 
 
1778 
                        -- PLB
1779 
                        when    PLB_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
1780 
                        when    PLB_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & BLD_R & EXT_O; -- S->B; EI
1781 
 
1782 
                        -- RTL
1783 
                        when    RTL_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
1784 
                        when    RTL_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB->O;
1785 
                        when    RTL_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
1786 
                        when    RTL_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MSB->O;
1787 
                        when    RTL_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
1788 
                        when    RTL_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; MEM->PBR;
1789 
                        when    RTL_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC+1; PC->MEM; EI
1790 
 
1791 
                        -- XBA
1792 
                        when    XBA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & ARM_O; -- swap A<->B; EI
1793 
 
1794 
                        -- WAI
1795 
                        when    WAI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & WAI_R & EXT_O; -- set WAI flipflop
1796 
                        when    WAI_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1797 
 
1798 
                        -- STP
1799 
                        when    STP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & STP_R & EXT_O; -- set STP flipflop
1800 
                        when    STP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1801 
 
1802 
                        ------------------------------------
1803 
                        --           IMMEDIATE            --
1804 
                        ------------------------------------
1805 
                        -- LDA #xx/#xxxx
1806 
                        when  IMLDA_OP0 =>
1807 
                              if m = '1' then
1808 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MEM->A (lsb); PC +1; EI
1809 
                                   else
1810 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O (lsb); PC +1; EI
1811 
               end if;
1812 
                        when  IMLDA_OP1 =>
1813 
                              if m = '1' then
1814 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1815 
                    else
1816 
                                                     q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MEM->A (msb\lsb); PC +1; EI
1817 
               end if;
1818 
 
1819 
                        -- LDX #xx/#xxxx
1820 
                        when  IMLDX_OP0 =>
1821 
                              if x = '1' then
1822 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MEM->X (lsb); PC +1; EI
1823 
                                   else
1824 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O (lsb); PC +1; EI
1825 
                                        end if;
1826 
                        when  IMLDX_OP1 =>
1827 
                              if x = '1' then
1828 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1829 
               else
1830 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & X16_R & EXM_O; -- MEM->X (msb\lsb); PC +1; EI
1831 
                                        end if;
1832 
 
1833 
 
1834 
                        -- LDY #yy/#xxxx
1835 
                        when  IMLDY_OP0 =>
1836 
                              if x = '1' then
1837 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MEM->Y (lsb); PC +1; EI
1838 
                                        else
1839 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O (lsb); PC +1; EI
1840 
               end if;
1841 
                        when  IMLDY_OP1 =>
1842 
                              if x = '1' then
1843 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1844 
                                        else
1845 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & Y16_R & EXM_O; -- MEM->Y (msb\lsb); PC +1; EI
1846 
                                        end if;
1847 
 
1848 
                        -- ADC #xx/#xxxx (immediate)
1849 
                        when  IMADC_OP0 =>
1850 
                              if m = '1' then
1851 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; PC +1; EI (emulation mode)
1852 
                                        else
1853 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); PC +1;
1854 
                                        end if;
1855 
                        when  IMADC_OP1 =>
1856 
                              if m = '1' then
1857 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1858 
                                   else
1859 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
1860 
                                   end if;
1861 
 
1862 
 
1863 
                        -- SBC #xx/#xxxx (immediate)
1864 
                        when  IMSBC_OP0 =>
1865 
                              if m = '1' then
1866 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-EXT; PC +1; EI
1867 
                                        else
1868 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- A=A+EXT; PC +1;
1869 
               end if;
1870 
                        when  IMSBC_OP1 =>
1871 
                         if m = '1' then
1872 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1873 
                                        else
1874 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- MEM->A (msb\lsb); PC +1; EI
1875 
               end if;
1876 
 
1877 
                        -- CMP #xx/#xxxx (immediate)
1878 
                        when  IMCMP_OP0 =>
1879 
                              if m = '1' then
1880 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; PC +1; EI
1881 
                              else
1882 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;;
1883 
               end if;
1884 
                        when  IMCMP_OP1 =>
1885 
                         if m = '1' then
1886 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1887 
                                        else
1888 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-(msb\lsb); PC +1; EI
1889 
               end if;
1890 
 
1891 
                        -- CPX #xx/#xxxx (immediate)
1892 
                        when  IMCPX_OP0 =>
1893 
                              if x = '1' then
1894 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-MEM; PC +1; EI
1895 
                                        else
1896 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1897 
               end if;
1898 
                        when  IMCPX_OP1 =>
1899 
                         if x = '1' then
1900 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1901 
                                        else
1902 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-(msb\lsb); PC +1; EI
1903 
               end if;
1904 
 
1905 
 
1906 
                        -- CPY #xx/#xxxx (immediate)
1907 
                        when  IMCPY_OP0 =>
1908 
                              if x = '1' then
1909 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-MEM; PC +1; EI
1910 
                                        else
1911 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1912 
               end if;
1913 
                        when  IMCPY_OP1 =>
1914 
                         if x = '1' then
1915 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1916 
                                        else
1917 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- X-(msb\lsb); PC +1; EI
1918 
               end if;
1919 
 
1920 
                        -- AND #xx/#xxxx (immediate)
1921 
                        when  IMAND_OP0 =>
1922 
                              if m = '1' then
1923 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A AND MEM -> A; PC +1;
1924 
                                   else
1925 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1926 
               end if;
1927 
                   when         IMAND_OP1 =>
1928 
                         if m = '1' then
1929 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1930 
                                        else
1931 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A AND MEM ->A (msb\lsb) -> A; PC +1; EI
1932 
               end if;
1933 
 
1934 
                        -- ORA #xx/#xxxx (immediate)
1935 
                        when  IMORA_OP0 =>
1936 
                              if m = '1' then
1937 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A AND MEM -> A; PC +1;
1938 
                                   else
1939 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1940 
               end if;
1941 
                   when         IMORA_OP1 =>
1942 
                         if m = '1' then
1943 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1944 
                                        else
1945 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A OR MEM ->A (msb\lsb) -> A; PC +1; EI
1946 
               end if;
1947 
 
1948 
                        -- EOR #xx (immediate)
1949 
                        when  IMEOR_OP0 =>
1950 
                              if m = '1' then
1951 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A XOR MEM -> A; PC +1;
1952 
                                   else
1953 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1954 
               end if;
1955 
                   when         IMEOR_OP1 =>
1956 
                         if m = '1' then
1957 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1958 
                                        else
1959 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A XOR MEM ->A (msb\lsb) -> A; PC +1; EI
1960 
               end if;
1961 
 
1962 
                        -- BIT #xx/#xxxx (immediate)
1963 
                        when  IMBIT_OP0 =>
1964 
                              if m = '1' then
1965 
                                           q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & LDZ_P & BIT_A & NOP_R & ARD_O; -- A AND MEM -> A; PC +1;
1966 
                                   else
1967 
                                           q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM (lsb)->O; PC +1;
1968 
               end if;
1969 
                   when         IMBIT_OP1 =>
1970 
                         if m = '1' then
1971 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1972 
                                        else
1973 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A AND MEM ->A (msb\lsb) -> A; PC +1; EI
1974 
               end if;
1975 
 
1976 
                        -- SEP #xx (immediate)
1977 
                        when  IMSEP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & SEP_P & NOP_A & NOP_R & EXT_O; -- P = P OR MEM; PC +1;
1978 
 
1979 
                        -- REP #xx (immediate)
1980 
                        when  IMREP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & REP_P & NOP_A & NOP_R & EXT_O; -- P = P AND NOT MEM; PC +1;
1981 
 
1982 
                        ------------------------------------
1983 
                        --           ZERO PAGE            --
1984 
                        ------------------------------------
1985 
                        -- LDA $xx (zero page)
1986 
                        when  ZPLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
1987 
                        when  ZPLDA_OP1 =>
1988 
                              if m = '1' then
1989 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; PC+1; EI
1990 
                                        else
1991 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
1992 
               end if;
1993 
                        when  ZPLDA_OP2 =>
1994 
               if m = '1' then
1995 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
1996 
                                   else
1997 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1; EI
1998 
               end if;
1999 
 
2000 
                        -- LDX $xx (zero page)
2001 
                        when  ZPLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2002 
                        when  ZPLDX_OP1 =>
2003 
                              if x = '1' then
2004 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; PC+1; EI
2005 
                                        else
2006 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2007 
               end if;
2008 
                        when  ZPLDX_OP2 =>
2009 
               if x = '1' then
2010 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2011 
                                   else
2012 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & EXM_O; -- MP->MEM; MEM->X; PC+1; EI
2013 
               end if;
2014 
 
2015 
                        -- LDY $xx (zero page)
2016 
                        when  ZPLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2017 
                        when  ZPLDY_OP1 =>
2018 
                              if x = '1' then
2019 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; PC+1; EI
2020 
                                        else
2021 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2022 
               end if;
2023 
                        when  ZPLDY_OP2 =>
2024 
               if x = '1' then
2025 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2026 
                                   else
2027 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & EXM_O; -- MP->MEM; MEM->Y; PC+1; EI
2028 
               end if;
2029 
 
2030 
                        -- STA $xx (zero page)
2031 
                        when  ZPSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2032 
                        when  ZPSTA_OP1 =>
2033 
                              if m = '1' then
2034 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1; EI
2035 
                                        else
2036 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM; PC+1; MP+1;
2037 
                                        end if;
2038 
                        when  ZPSTA_OP2 =>
2039 
                         if m = '1' then
2040 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2041 
               else
2042 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM; EI
2043 
               end if;
2044 
 
2045 
                        -- STX $xx (zero page)
2046 
                        when  ZPSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2047 
                        when  ZPSTX_OP1 =>
2048 
                              if x = '1' then
2049 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; PC+1; EI
2050 
                                   else
2051 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X (lsb) ->MEM; PC+1; MP+1
2052 
                                        end if;
2053 
                        when  ZPSTX_OP2 =>
2054 
                         if x = '1' then
2055 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2056 
               else
2057 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRM_O; -- MP->MEM; X (msb) ->MEM; EI
2058 
               end if;
2059 
 
2060 
 
2061 
                        -- STY $xx (zero page)
2062 
                        when  ZPSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2063 
                        when  ZPSTY_OP1 =>
2064 
                              if x = '1' then
2065 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; PC+1; EI
2066 
                                        else
2067 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y (lsb) ->MEM; PC+1; MP+1
2068 
                                        end if;
2069 
                        when  ZPSTY_OP2 =>
2070 
                         if x = '1' then
2071 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2072 
               else
2073 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRM_O; -- MP->MEM; X (msb) ->MEM; EI;
2074 
               end if;
2075 
 
2076 
 
2077 
                        -- STZ $xx (zero page)
2078 
                        when  ZPSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2079 
                        when  ZPSTZ_OP1 =>
2080 
                              if m = '1' then
2081 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; PC+1; EI
2082 
                         else
2083 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0 (lsb) ->MEM; PC+1; MP+1
2084 
               end if;
2085 
                        when  ZPSTZ_OP2 =>
2086 
                         if m = '1' then
2087 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2088 
               else
2089 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0 (msb) ->MEM; EI;
2090 
               end if;
2091 
 
2092 
                        -- ADC $xx (zero page)
2093 
                        when  ZPADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2094 
                        when  ZPADC_OP1 =>
2095 
                              if m = '1' then
2096 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+MEM; EI
2097 
                                        else
2098 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2099 
               end if;
2100 
                        when  ZPADC_OP2 =>
2101 
                              if m = '1' then
2102 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2103 
               else
2104 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
2105 
               end if;
2106 
 
2107 
                        -- SBC $xx (zero page)
2108 
                        when  ZPSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2109 
                        when  ZPSBC_OP1 =>
2110 
                              if m = '1' then
2111 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-MEM; EI
2112 
                                        else
2113 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
2114 
               end if;
2115 
                        when  ZPSBC_OP2 =>
2116 
                              if m = '1' then
2117 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2118 
               else
2119 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A - MEM(msb)\O(lsb) => A (msb\lsb); EI
2120 
               end if;
2121 
 
2122 
                        -- CMP $xx (zeropage)
2123 
                        when  ZPCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2124 
                        when  ZPCMP_OP1 =>
2125 
                              if m = '1' then
2126 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; EI
2127 
                              else
2128 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2129 
               end if;
2130 
                        when  ZPCMP_OP2 =>
2131 
                              if m = '1' then
2132 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2133 
               else
2134 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
2135 
               end if;
2136 
 
2137 
                        -- CPX $xx (zeropage)
2138 
                        when  ZPCPX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2139 
                        when  ZPCPX_OP1 =>
2140 
                              if x = '1' then
2141 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-MEM; EI
2142 
                              else
2143 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2144 
               end if;
2145 
                        when  ZPCPX_OP2 =>
2146 
                              if x = '1' then
2147 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2148 
               else
2149 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X - MEM(msb)\O(lsb); EI
2150 
               end if;
2151 
 
2152 
                        -- CPY $xx (zeropage)
2153 
                        when  ZPCPY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2154 
                        when  ZPCPY_OP1 =>
2155 
                              if x = '1' then
2156 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-MEM; EI
2157 
                              else
2158 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2159 
               end if;
2160 
                        when  ZPCPY_OP2 =>
2161 
                              if x = '1' then
2162 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2163 
               else
2164 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y - MEM(msb)\O(lsb); EI
2165 
               end if;
2166 
 
2167 
                        -- AND $xx (zeropage)
2168 
                        when  ZPAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2169 
                        when  ZPAND_OP1 =>
2170 
                              if m = '1' then
2171 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM;  EI
2172 
                                        else
2173 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2174 
               end if;
2175 
                        when  ZPAND_OP2 =>
2176 
                              if m = '1' then
2177 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2178 
               else
2179 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A = A AND MEM(msb)\O(lsb); EI
2180 
               end if;
2181 
 
2182 
                        -- ORA $xx (zeropage)
2183 
                        when  ZPORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2184 
                        when  ZPORA_OP1 =>
2185 
                              if m = '1' then
2186 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM;  EI
2187 
                                        else
2188 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2189 
               end if;
2190 
                        when  ZPORA_OP2 =>
2191 
                              if m = '1' then
2192 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2193 
               else
2194 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A = A OR MEM(msb)\O(lsb); EI
2195 
               end if;
2196 
 
2197 
                        -- EOR $xx (zeropage)
2198 
                        when  ZPEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2199 
                        when  ZPEOR_OP1 =>
2200 
                              if m = '1' then
2201 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM;  EI
2202 
                                        else
2203 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2204 
               end if;
2205 
                        when  ZPEOR_OP2 =>
2206 
                              if m = '1' then
2207 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2208 
               else
2209 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A = A XOR MEM(msb)\O(lsb); EI
2210 
               end if;
2211 
 
2212 
                        -- BIT $xx (zero page)
2213 
                        when  ZPBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2214 
                        when  ZPBIT_OP1 =>
2215 
                              if m = '1' then
2216 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT MEM; EI
2217 
                                        else
2218 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2219 
               end if;
2220 
                        when  ZPBIT_OP2 =>
2221 
                              if m = '1' then
2222 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2223 
               else
2224 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT MEM(msb)\O(lsb); EI
2225 
               end if;
2226 
 
2227 
                        -- ASL $xx (zero page)
2228 
                        when  ZPASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2229 
                        when  ZPASL_OP1 =>
2230 
                              if m = '1' then
2231 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2232 
                                        else
2233 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2234 
               end if;
2235 
                        when  ZPASL_OP2 =>
2236 
                              if m = '1' then
2237 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT;
2238 
                                        else
2239 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2240 
               end if;
2241 
                        when  ZPASL_OP3 =>
2242 
                              if m = '1' then
2243 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2244 
                                        else
2245 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & SHL_A & O16_R & ORD_O; -- O SHIFT LEFT; MP-1
2246 
               end if;
2247 
                        when  ZPASL_OP4 =>
2248 
                              if m = '1' then
2249 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2250 
               else
2251 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2252 
                                        end if;
2253 
                        when  ZPASL_OP5 =>
2254 
                              if m = '1' then
2255 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2256 
               else
2257 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2258 
                                        end if;
2259 
 
2260 
                        -- LSR $xx (zero page)
2261 
                        when  ZPLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2262 
                        when  ZPLSR_OP1 =>
2263 
                              if m = '1' then
2264 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2265 
                                        else
2266 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2267 
               end if;
2268 
                        when  ZPLSR_OP2 =>
2269 
                              if m = '1' then
2270 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT
2271 
                                        else
2272 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2273 
               end if;
2274 
                        when  ZPLSR_OP3 =>
2275 
                              if m = '1' then
2276 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2277 
                                        else
2278 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & SHR_A & O16_R & ORD_O; -- O SHIFT LEFT; MP-1
2279 
               end if;
2280 
                        when  ZPLSR_OP4 =>
2281 
                              if m = '1' then
2282 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2283 
               else
2284 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2285 
                                        end if;
2286 
                        when  ZPLSR_OP5 =>
2287 
                              if m = '1' then
2288 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2289 
               else
2290 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2291 
                                        end if;
2292 
 
2293 
                        -- ROL $xx (zero page)
2294 
                        when  ZPROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2295 
                        when  ZPROL_OP1 =>
2296 
                              if m = '1' then
2297 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2298 
                                        else
2299 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2300 
               end if;
2301 
                        when  ZPROL_OP2 =>
2302 
                              if m = '1' then
2303 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT;
2304 
                                        else
2305 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2306 
               end if;
2307 
                        when  ZPROL_OP3 =>
2308 
                              if m = '1' then
2309 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2310 
                                        else
2311 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & ROL_A & O16_R & ORD_O; -- O ROTATE LEFT; MP-1
2312 
               end if;
2313 
                        when  ZPROL_OP4 =>
2314 
                              if m = '1' then
2315 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2316 
               else
2317 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2318 
                                        end if;
2319 
                        when  ZPROL_OP5 =>
2320 
                              if m = '1' then
2321 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2322 
               else
2323 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2324 
                                        end if;
2325 
 
2326 
                        -- ROR $xx (zero page)
2327 
                        when  ZPROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2328 
                        when  ZPROR_OP1 =>
2329 
                              if m = '1' then
2330 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2331 
                                        else
2332 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2333 
               end if;
2334 
                        when  ZPROR_OP2 =>
2335 
                              if m = '1' then
2336 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT
2337 
                                        else
2338 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2339 
               end if;
2340 
                        when  ZPROR_OP3 =>
2341 
                              if m = '1' then
2342 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2343 
                                        else
2344 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & ROR_A & O16_R & ORD_O; -- O ROTATE RIGHT; MP-1
2345 
               end if;
2346 
                        when  ZPROR_OP4 =>
2347 
                              if m = '1' then
2348 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2349 
               else
2350 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2351 
                                        end if;
2352 
                        when  ZPROR_OP5 =>
2353 
                              if m = '1' then
2354 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2355 
               else
2356 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2357 
                                        end if;
2358 
 
2359 
                        -- INC $xx (zero page)
2360 
                        when  ZPINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2361 
                        when  ZPINC_OP1 =>
2362 
                              if m = '1' then
2363 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2364 
                                        else
2365 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2366 
               end if;
2367 
                        when  ZPINC_OP2 =>
2368 
                              if m = '1' then
2369 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
2370 
                                        else
2371 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2372 
               end if;
2373 
                        when  ZPINC_OP3 =>
2374 
                              if m = '1' then
2375 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2376 
                                        else
2377 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLD_P & INC_A & O16_R & ORD_O; -- O = O +1; MP-1
2378 
               end if;
2379 
                        when  ZPINC_OP4 =>
2380 
                              if m = '1' then
2381 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2382 
               else
2383 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2384 
                                        end if;
2385 
                        when  ZPINC_OP5 =>
2386 
                              if m = '1' then
2387 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2388 
               else
2389 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2390 
                                        end if;
2391 
 
2392 
                        -- DEC $xx (zero page)
2393 
                        when  ZPDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2394 
                        when  ZPDEC_OP1 =>
2395 
                              if m = '1' then
2396 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2397 
                                        else
2398 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2399 
               end if;
2400 
                        when  ZPDEC_OP2 =>
2401 
                              if m = '1' then
2402 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
2403 
                                        else
2404 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (msb);
2405 
               end if;
2406 
                        when  ZPDEC_OP3 =>
2407 
                              if m = '1' then
2408 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2409 
                                        else
2410 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLD_P & DEC_A & O16_R & ORD_O; -- O = O -1; MP-1
2411 
               end if;
2412 
                        when  ZPDEC_OP4 =>
2413 
                              if m = '1' then
2414 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2415 
               else
2416 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2417 
                                        end if;
2418 
                        when  ZPDEC_OP5 =>
2419 
                              if m = '1' then
2420 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2421 
               else
2422 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2423 
                                        end if;
2424 
 
2425 
                        -- TSB $xx (zero page)
2426 
                        when  ZPTSB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2427 
                        when  ZPTSB_OP1 =>
2428 
                              if m = '1' then
2429 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2430 
                                        else
2431 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2432 
               end if;
2433 
                        when  ZPTSB_OP2 =>
2434 
                              if m = '1' then
2435 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
2436 
                                        else
2437 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (msb);
2438 
               end if;
2439 
                        when  ZPTSB_OP3 =>
2440 
                              if m = '1' then
2441 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & TSB_A & OLD_R & ARD_O; -- A OR O -> O;
2442 
                                        else
2443 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & O16_R & ARD_O; -- A AND O -> Z;
2444 
               end if;
2445 
                        when  ZPTSB_OP4 =>
2446 
                              if m = '1' then
2447 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2448 
                                        else
2449 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & NOP_P & TSB_A & O16_R & ARD_O; -- A OR O -> O; MP -1
2450 
               end if;
2451 
                        when  ZPTSB_OP5 =>
2452 
                              if m = '1' then
2453 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2454 
                                        else
2455 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM;
2456 
               end if;
2457 
                        when  ZPTSB_OP6 =>
2458 
               if m = '1' then
2459 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2460 
                                        else
2461 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2462 
               end if;
2463 
 
2464 
                        -- TRB $xx (zero page)
2465 
                        when  ZPTRB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2466 
                        when  ZPTRB_OP1 =>
2467 
                              if m = '1' then
2468 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2469 
                                        else
2470 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2471 
               end if;
2472 
                        when  ZPTRB_OP2 =>
2473 
                              if m = '1' then
2474 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
2475 
                                        else
2476 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (msb);
2477 
               end if;
2478 
                        when  ZPTRB_OP3 =>
2479 
                              if m = '1' then
2480 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & TRB_A & OLD_R & ARD_O; -- A NAND O -> O;
2481 
                                        else
2482 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & O16_R & ARD_O; -- A AND O -> Z;
2483 
               end if;
2484 
                        when  ZPTRB_OP4 =>
2485 
                              if m = '1' then
2486 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2487 
                                        else
2488 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & NOP_P & TRB_A & O16_R & ARD_O; -- A NAND O -> O; MP -1
2489 
               end if;
2490 
                        when  ZPTRB_OP5 =>
2491 
                              if m = '1' then
2492 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2493 
                                        else
2494 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM;
2495 
               end if;
2496 
                        when  ZPTRB_OP6 =>
2497 
               if m = '1' then
2498 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2499 
                                        else
2500 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2501 
               end if;
2502 
 
2503 
                        ------------------------------------
2504 
                        --          ZERO PAGE,X           --
2505 
                        ------------------------------------
2506 
                        -- LDA $xx,X (zero page indexed)
2507 
                        when  ZXLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2508 
                        when  ZXLDA_OP1 =>
2509 
                              if m = '1' then
2510 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
2511 
                                        else
2512 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; MP+1
2513 
               end if;
2514 
                        when  ZXLDA_OP2 =>
2515 
               if m = '1' then
2516 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2517 
                                   else
2518 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; EI
2519 
               end if;
2520 
 
2521 
                        -- LDY $xx,X (zero page indexed)
2522 
                        when  ZXLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2523 
                        when  ZXLDY_OP1 =>
2524 
                              if x = '1' then
2525 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; PC+1; EI
2526 
                                        else
2527 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2528 
               end if;
2529 
                        when  ZXLDY_OP2 =>
2530 
               if x = '1' then
2531 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2532 
                                   else
2533 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & EXM_O; -- MP->MEM; MEM->Y; PC+1; EI
2534 
               end if;
2535 
 
2536 
                        -- STA $xx,X (zero page indexed)
2537 
                        when  ZXSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2538 
                        when  ZXSTA_OP1 =>
2539 
                              if m = '1' then
2540 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
2541 
                                        else
2542 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP+1
2543 
               end if;
2544 
                        when  ZXSTA_OP2 =>
2545 
                              if m = '1' then
2546 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2547 
                                        else
2548 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; EI
2549 
               end if;
2550 
 
2551 
                        -- STY $xx,X (zero page indexed)
2552 
                        when  ZXSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2553 
                        when  ZXSTY_OP1 =>
2554 
                              if x = '1' then
2555 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; EI
2556 
                                        else
2557 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; MP +1
2558 
               end if;
2559 
                        when  ZXSTY_OP2 =>
2560 
                              if x = '1' then
2561 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2562 
                                        else
2563 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRM_O; -- MP->MEM; Y->MEM; EI
2564 
               end if;
2565 
 
2566 
                        -- STZ $xx,X (zero page indexed)
2567 
                        when  ZXSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2568 
                        when  ZXSTZ_OP1 =>
2569 
                              if m = '1' then
2570 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; EI
2571 
                                        else
2572 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; MP+1
2573 
               end if;
2574 
                        when  ZXSTZ_OP2 =>
2575 
                              if m = '1' then
2576 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2577 
                                        else
2578 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; EI
2579 
               end if;
2580 
 
2581 
                        -- ADC $xx,X (zero page indexed)
2582 
                        when  ZXADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2583 
                        when  ZXADC_OP1 =>
2584 
                              if m = '1' then
2585 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+MEM; EI
2586 
                                        else
2587 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2588 
               end if;
2589 
                        when  ZXADC_OP2 =>
2590 
                              if m = '1' then
2591 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2592 
               else
2593 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
2594 
               end if;
2595 
 
2596 
                        -- SBC $xx,X (zero page indexed)
2597 
                        when  ZXSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2598 
                        when  ZXSBC_OP1 =>
2599 
                              if m = '1' then
2600 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-MEM; EI
2601 
                                        else
2602 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2603 
               end if;
2604 
                        when  ZXSBC_OP2 =>
2605 
                              if m = '1' then
2606 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2607 
               else
2608 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
2609 
               end if;
2610 
 
2611 
                        -- CMP $xx,X (zero page indexed)
2612 
                        when  ZXCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2613 
                        when  ZXCMP_OP1 =>
2614 
                              if m = '1' then
2615 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; EI
2616 
                                        else
2617 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2618 
               end if;
2619 
                        when  ZXCMP_OP2 =>
2620 
                              if m = '1' then
2621 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2622 
               else
2623 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
2624 
               end if;
2625 
 
2626 
                        -- AND $xx,X (zero page indexed)
2627 
                        when  ZXAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2628 
                        when  ZXAND_OP1 =>
2629 
                              if m = '1' then
2630 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM;  EI
2631 
                                        else
2632 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2633 
               end if;
2634 
                        when  ZXAND_OP2 =>
2635 
                              if m = '1' then
2636 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2637 
               else
2638 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A - AND O -> A (msb/lsb); EI
2639 
               end if;
2640 
 
2641 
                        -- ORA $xx,X (zero page indexed)
2642 
                        when  ZXORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2643 
                        when  ZXORA_OP1 =>
2644 
                              if m = '1' then
2645 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM;  EI
2646 
                                        else
2647 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2648 
               end if;
2649 
                        when  ZXORA_OP2 =>
2650 
                              if m = '1' then
2651 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2652 
               else
2653 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A - OR O -> A (msb/lsb); EI
2654 
               end if;
2655 
 
2656 
                        -- EOR $xx,X (zero page indexed)
2657 
                        when  ZXEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2658 
                        when  ZXEOR_OP1 =>
2659 
                              if m = '1' then
2660 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM;  EI
2661 
                                        else
2662 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2663 
               end if;
2664 
                        when  ZXEOR_OP2 =>
2665 
                              if m = '1' then
2666 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2667 
               else
2668 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A - XOR O -> A (msb/lsb); EI
2669 
               end if;
2670 
 
2671 
                        -- ASL $xx,X (zero page indexed)
2672 
                        when  ZXASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2673 
                        when  ZXASL_OP1 =>
2674 
                              if m = '1' then
2675 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2676 
                                        else
2677 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2678 
               end if;
2679 
                        when  ZXASL_OP2 =>
2680 
                              if m = '1' then
2681 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT;
2682 
                                        else
2683 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2684 
               end if;
2685 
                        when  ZXASL_OP3 =>
2686 
                              if m = '1' then
2687 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2688 
                                        else
2689 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & SHL_A & O16_R & ORD_O; -- O SHIFT LEFT; MP-1
2690 
               end if;
2691 
                        when  ZXASL_OP4 =>
2692 
                              if m = '1' then
2693 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2694 
               else
2695 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2696 
                                        end if;
2697 
                        when  ZXASL_OP5 =>
2698 
                              if m = '1' then
2699 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2700 
               else
2701 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2702 
                                        end if;
2703 
 
2704 
                        -- LSR $xx,X (zero page indexed)
2705 
                        when  ZXLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2706 
                        when  ZXLSR_OP1 =>
2707 
                              if m = '1' then
2708 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2709 
                                        else
2710 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2711 
               end if;
2712 
                        when  ZXLSR_OP2 =>
2713 
                              if m = '1' then
2714 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT
2715 
                                        else
2716 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2717 
               end if;
2718 
                        when  ZXLSR_OP3 =>
2719 
                              if m = '1' then
2720 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2721 
                                        else
2722 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & SHR_A & O16_R & ORD_O; -- O SHIFT LEFT; MP-1
2723 
               end if;
2724 
                        when  ZXLSR_OP4 =>
2725 
                              if m = '1' then
2726 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2727 
               else
2728 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2729 
                                        end if;
2730 
                        when  ZXLSR_OP5 =>
2731 
                              if m = '1' then
2732 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2733 
               else
2734 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2735 
                                        end if;
2736 
 
2737 
                        -- ROL $xx,X (zero page indexed)
2738 
                        when  ZXROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2739 
                        when  ZXROL_OP1 =>
2740 
                              if m = '1' then
2741 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2742 
                                        else
2743 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2744 
               end if;
2745 
                        when  ZXROL_OP2 =>
2746 
                              if m = '1' then
2747 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT;
2748 
                                        else
2749 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2750 
               end if;
2751 
                        when  ZXROL_OP3 =>
2752 
                              if m = '1' then
2753 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2754 
                                        else
2755 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & ROL_A & O16_R & ORD_O; -- O ROTATE LEFT; MP-1
2756 
               end if;
2757 
                        when  ZXROL_OP4 =>
2758 
                              if m = '1' then
2759 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2760 
               else
2761 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2762 
                                        end if;
2763 
                        when  ZXROL_OP5 =>
2764 
                              if m = '1' then
2765 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2766 
               else
2767 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2768 
                                        end if;
2769 
 
2770 
                        -- ROR $xx,X (zero page indexed)
2771 
                        when  ZXROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2772 
                        when  ZXROR_OP1 =>
2773 
                              if m = '1' then
2774 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2775 
                                        else
2776 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2777 
               end if;
2778 
                        when  ZXROR_OP2 =>
2779 
                              if m = '1' then
2780 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT
2781 
                                        else
2782 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2783 
               end if;
2784 
                        when  ZXROR_OP3 =>
2785 
                              if m = '1' then
2786 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2787 
                                        else
2788 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLC_P & ROR_A & O16_R & ORD_O; -- O ROTATE RIGHT; MP-1
2789 
               end if;
2790 
                        when  ZXROR_OP4 =>
2791 
                              if m = '1' then
2792 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2793 
               else
2794 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2795 
                                        end if;
2796 
                        when  ZXROR_OP5 =>
2797 
                              if m = '1' then
2798 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2799 
               else
2800 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2801 
                                        end if;
2802 
 
2803 
                        -- INC $xx,X (zero page indexed)
2804 
                        when  ZXINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2805 
                        when  ZXINC_OP1 =>
2806 
                              if m = '1' then
2807 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2808 
                                        else
2809 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2810 
               end if;
2811 
                        when  ZXINC_OP2 =>
2812 
                              if m = '1' then
2813 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
2814 
                                        else
2815 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
2816 
               end if;
2817 
                        when  ZXINC_OP3 =>
2818 
                              if m = '1' then
2819 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2820 
                                        else
2821 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLD_P & INC_A & O16_R & ORD_O; -- O = O +1; MP-1
2822 
               end if;
2823 
                        when  ZXINC_OP4 =>
2824 
                              if m = '1' then
2825 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2826 
               else
2827 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2828 
                                        end if;
2829 
                        when  ZXINC_OP5 =>
2830 
                              if m = '1' then
2831 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2832 
               else
2833 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2834 
                                        end if;
2835 
 
2836 
                        -- DEC $xx,X (zero page indexed)
2837 
                        when  ZXDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2838 
                        when  ZXDEC_OP1 =>
2839 
                              if m = '1' then
2840 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1;
2841 
                                        else
2842 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; MP +1
2843 
               end if;
2844 
                        when  ZXDEC_OP2 =>
2845 
                              if m = '1' then
2846 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
2847 
                                        else
2848 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O (msb);
2849 
               end if;
2850 
                        when  ZXDEC_OP3 =>
2851 
                              if m = '1' then
2852 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
2853 
                                        else
2854 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & DEC_M & FLD_P & DEC_A & O16_R & ORD_O; -- O = O -1; MP-1
2855 
               end if;
2856 
                        when  ZXDEC_OP4 =>
2857 
                              if m = '1' then
2858 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2859 
               else
2860 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O(lsb)->MEM; MP +1
2861 
                                        end if;
2862 
                        when  ZXDEC_OP5 =>
2863 
                              if m = '1' then
2864 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2865 
               else
2866 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O(msb)->MEM; EI
2867 
                                        end if;
2868 
 
2869 
                        -- BIT $xx,X (zero page indexed)
2870 
                        when  ZXBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2871 
                        when  ZXBIT_OP1 =>
2872 
                              if m = '1' then
2873 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT MEM; EI
2874 
                                        else
2875 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1; EI
2876 
               end if;
2877 
                        when  ZXBIT_OP2 =>
2878 
                              if m = '1' then
2879 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2880 
               else
2881 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT MEM(msb)\O(lsb); EI
2882 
               end if;
2883 
 
2884 
 
2885 
                        ------------------------------------
2886 
                        --          ZERO PAGE,Y           --
2887 
                        ------------------------------------
2888 
                        -- LDX $xx,Y (zero page indexed)
2889 
                        when  ZYLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2890 
                        when  ZYLDX_OP1 =>
2891 
                              if x = '1' then
2892 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; EI
2893 
                                        else
2894 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP +1
2895 
               end if;
2896 
                        when  ZYLDX_OP2 =>
2897 
                              if x = '1' then
2898 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2899 
                                        else
2900 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O
2901 
               end if;
2902 
                        when  ZYLDX_OP3 =>
2903 
                              if x = '1' then
2904 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2905 
                                        else
2906 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & ORD_O; -- O->X
2907 
               end if;
2908 
 
2909 
                        -- STX $xx,Y (zero page indexed)
2910 
                        when  ZYSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
2911 
                        when  ZYSTX_OP1 =>
2912 
                              if x = '1' then
2913 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; EI
2914 
                                        else
2915 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADDI & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; MP +1
2916 
               end if;
2917 
                        when  ZYSTX_OP2 =>
2918 
                              if x = '1' then
2919 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2920 
                                        else
2921 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRM_O; -- MP->MEM; X->MEM; EI
2922 
               end if;
2923 
 
2924 
 
2925 
                        ------------------------------------
2926 
                        --           INDIRECT             --
2927 
                        ------------------------------------
2928 
                        -- JMP ($xxxx) (indirect)
2929 
                        when  INJMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
2930 
                        when  INJMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
2931 
                        when  INJMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
2932 
                        when  INJMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MEM->PC; O->PC; EI
2933 
 
2934 
                        -- JML ($xxxx) (indirect)
2935 
                        when  INJML_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
2936 
                        when  INJML_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
2937 
                        when  INJML_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
2938 
                        when  INJML_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
2939 
                        when  INJML_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PBR; EI
2940 
 
2941 
                        ------------------------------------
2942 
                        --          INDIRECT,Y            --
2943 
                        ------------------------------------
2944 
                        -- LDA ($xx),Y (zeropage - indirect - indexed)
2945 
                        when  IYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2946 
                        when  IYLDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
2947 
                        when  IYLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
2948 
                        when  IYLDA_OP3 =>
2949 
                              if m = '1' then
2950 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
2951 
                                        else
2952 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
2953 
               end if;
2954 
                        when  IYLDA_OP4 =>
2955 
                              if m = '1' then
2956 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2957 
                                        else
2958 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
2959 
               end if;
2960 
 
2961 
                        -- STA ($xx),Y (zeropage - indirect - indexed)
2962 
                        when  IYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2963 
                        when  IYSTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
2964 
                        when  IYSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
2965 
                        when  IYSTA_OP3 =>
2966 
                              if m = '1' then
2967 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
2968 
                                        else
2969 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP +1
2970 
               end if;
2971 
                        when  IYSTA_OP5 =>
2972 
                              if m = '1' then
2973 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2974 
                                        else
2975 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; EI
2976 
               end if;
2977 
 
2978 
                        -- ADC ($xx),Y (zeropage - indirect - indexed)
2979 
                        when  IYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2980 
                        when  IYADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
2981 
                        when  IYADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
2982 
                        when  IYADC_OP3 =>
2983 
                              if m = '1' then
2984 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
2985 
                                        else
2986 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
2987 
               end if;
2988 
                        when  IYADC_OP4 =>
2989 
                              if m = '1' then
2990 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
2991 
                                        else
2992 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- A=A+MEM (msb)/O (lsb); EI
2993 
                                        end if;
2994 
 
2995 
                        -- SBC ($xx),Y (zeropage - indirect - indexed)
2996 
                        when  IYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
2997 
                        when  IYSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
2998 
                        when  IYSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
2999 
                        when  IYSBC_OP3 =>
3000 
                              if m = '1' then
3001 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
3002 
                                        else
3003 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3004 
               end if;
3005 
                        when  IYSBC_OP4 =>
3006 
                              if m = '1' then
3007 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3008 
                                        else
3009 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
3010 
                                        end if;
3011 
 
3012 
                        -- CMP ($xx),Y (zeropage - indirect - indexed)
3013 
                        when  IYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
3014 
                        when  IYCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
3015 
                        when  IYCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
3016 
                        when  IYCMP_OP3 =>
3017 
                              if m = '1' then
3018 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
3019 
                                        else
3020 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3021 
               end if;
3022 
                        when  IYCMP_OP4 =>
3023 
                              if m = '1' then
3024 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3025 
                                        else
3026 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
3027 
                                        end if;
3028 
 
3029 
                        -- AND ($xx),Y (zeropage - indirect - indexed)
3030 
                        when  IYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
3031 
                        when  IYAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
3032 
                        when  IYAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
3033 
                        when  IYAND_OP3 =>
3034 
                              if m = '1' then
3035 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
3036 
                                        else
3037 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3038 
               end if;
3039 
                        when  IYAND_OP4 =>
3040 
                              if m = '1' then
3041 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3042 
                                        else
3043 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM (msb)/O (lsb); EI
3044 
                                        end if;
3045 
 
3046 
                        -- ORA ($xx),Y (zeropage - indirect - indexed)
3047 
                        when  IYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
3048 
                        when  IYORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
3049 
                        when  IYORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
3050 
                        when  IYORA_OP3 =>
3051 
                              if m = '1' then
3052 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
3053 
                                        else
3054 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3055 
               end if;
3056 
                        when  IYORA_OP4 =>
3057 
                              if m = '1' then
3058 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3059 
                                        else
3060 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM (msb)/O (lsb); EI
3061 
                                        end if;
3062 
 
3063 
                        -- EOR ($xx),Y (zeropage - indirect - indexed)
3064 
                        when  IYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
3065 
                        when  IYEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
3066 
                        when  IYEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
3067 
                        when  IYEOR_OP3 =>
3068 
                              if m = '1' then
3069 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
3070 
                                        else
3071 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3072 
               end if;
3073 
                        when  IYEOR_OP4 =>
3074 
                              if m = '1' then
3075 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3076 
                                        else
3077 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM (msb)/O (lsb); EI
3078 
                                        end if;
3079 
 
3080 
 
3081 
                        ------------------------------------
3082 
                        --          INDIRECT,X            --
3083 
                        ------------------------------------
3084 
                        -- LDA ($xx,X) (zero page - indexed - indirect)
3085 
                        when  IXLDA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3086 
                        when  IXLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3087 
                        when  IXLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3088 
                        when  IXLDA_OP3 =>
3089 
                              if m = '1' then
3090 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI=1
3091 
                                        else
3092 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3093 
                                        end if;
3094 
                        when  IXLDA_OP4 =>
3095 
                              if m = '1' then
3096 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3097 
                                        else
3098 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
3099 
               end if;
3100 
 
3101 
                        -- STA ($xx,X) (zero page - indexed - indirect)
3102 
                        when  IXSTA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3103 
                        when  IXSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3104 
                        when  IXSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3105 
                        when  IXSTA_OP3 =>
3106 
                              if m = '1' then
3107 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- A->MEM; EI=1
3108 
                                        else
3109 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP +1
3110 
               end if;
3111 
                        when  IXSTA_OP4 =>
3112 
                              if m = '1' then
3113 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3114 
                                        else
3115 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; EI
3116 
               end if;
3117 
 
3118 
                        -- AND ($xx,X) (zero page - indexed - indirect)
3119 
                        when  IXAND_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3120 
                        when  IXAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3121 
                        when  IXAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3122 
                        when  IXAND_OP3 =>
3123 
                              if m = '1' then
3124 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- MP->MEM; A=A AND MEM; EI=1
3125 
                                        else
3126 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3127 
                                        end if;
3128 
                        when  IXAND_OP4 =>
3129 
                              if m = '1' then
3130 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3131 
                                        else
3132 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM (msb)/O (lsb); EI
3133 
                                        end if;
3134 
 
3135 
                        -- ORA ($xx,X) (zero page - indexed - indirect)
3136 
                        when  IXORA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3137 
                        when  IXORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3138 
                        when  IXORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3139 
                        when  IXORA_OP3 =>
3140 
                              if m = '1' then
3141 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- MP->MEM; A=A OR MEM; EI=1
3142 
                                        else
3143 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3144 
                                        end if;
3145 
                        when  IXORA_OP4 =>
3146 
                              if m = '1' then
3147 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3148 
                                        else
3149 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM (msb)/O (lsb); EI
3150 
                                        end if;
3151 
 
3152 
                        -- EOR ($xx,X) (zero page - indexed - indirect)
3153 
                        when  IXEOR_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3154 
                        when  IXEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3155 
                        when  IXEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3156 
                        when  IXEOR_OP3 =>
3157 
                              if m = '1' then
3158 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
3159 
                                        else
3160 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3161 
                                        end if;
3162 
                        when  IXEOR_OP4 =>
3163 
                              if m = '1' then
3164 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3165 
                                        else
3166 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM (msb)/O (lsb); EI
3167 
                                        end if;
3168 
 
3169 
                        -- ADC ($xx,X) (zero page - indexed - indirect)
3170 
                        when  IXADC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3171 
                        when  IXADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3172 
                        when  IXADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3173 
                        when  IXADC_OP3 =>
3174 
                              if m = '1' then
3175 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A + MEM; EI=1
3176 
                                        else
3177 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3178 
               end if;
3179 
                        when  IXADC_OP4 =>
3180 
                              if m = '1' then
3181 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3182 
                                        else
3183 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- A=A+MEM (msb)/O (lsb); EI
3184 
               end if;
3185 
 
3186 
                        -- SBC ($xx,X) (zero page - indexed - indirect)
3187 
                        when  IXSBC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3188 
                        when  IXSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3189 
                        when  IXSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3190 
                        when  IXSBC_OP3 =>
3191 
                              if m = '1' then
3192 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
3193 
                                        else
3194 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3195 
               end if;
3196 
                        when  IXSBC_OP4 =>
3197 
                              if m = '1' then
3198 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3199 
                                        else
3200 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
3201 
               end if;
3202 
 
3203 
                        -- CMP ($xx,X) (zero page - indexed - indirect)
3204 
                        when  IXCMP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
3205 
                        when  IXCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
3206 
                        when  IXCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
3207 
                        when  IXCMP_OP3 =>
3208 
                              if m = '1' then
3209 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM; A-MEM; EI=1
3210 
                                        else
3211 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3212 
               end if;
3213 
                        when  IXCMP_OP4 =>
3214 
                              if m = '1' then
3215 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3216 
                                        else
3217 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM (msb)/O (lsb); EI
3218 
               end if;
3219 
 
3220 
                        -- JMP ($xxxx,X) (absolute indexed - indirect)
3221 
                        when  IXJMP_OP0 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3222 
                        when  IXJMP_OP1 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ALL_M & AUC_P & SWC_A & NOP_R & XRD_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3223 
                        when  IXJMP_OP2 => q <= ORD_D &'1'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ICC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MP_MSB+CARRY, EI
3224 
                        when  IXJMP_OP3 => q <= ORD_D &'1'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
3225 
                        when  IXJMP_OP4 => q <= ORD_D &'1'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
3226 
 
3227 
                        -- JSR ($xxxx,X) (absolute indexed - indirect)
3228 
                        when  IXJSR_OP0 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3229 
                        when  IXJSR_OP1 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
3230 
                        when  IXJSR_OP2 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
3231 
                        when  IXJSR_OP3 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ALL_M & AUC_P & SWC_A & NOP_R & XRD_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3232 
                        when  IXJSR_OP4 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
3233 
                        when  IXJSR_OP5 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
3234 
 
3235 
                        ------------------------------------
3236 
                        --           ABSOLUTE             --
3237 
                        ------------------------------------
3238 
                        -- LDA $xxxx (absolute)
3239 
                        when  ABLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3240 
                        when  ABLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3241 
                        when  ABLDA_OP2 =>
3242 
                              if m = '1' then
3243 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A (lsb);
3244 
                    else
3245 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3246 
               end if;
3247 
                        when  ABLDA_OP3 =>
3248 
                              if m = '1' then
3249 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3250 
                    else
3251 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
3252 
               end if;
3253 
 
3254 
                        -- LDX $xxxx (absolute)
3255 
                        when  ABLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3256 
                        when  ABLDX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3257 
                        when  ABLDX_OP2 =>
3258 
                              if x = '1' then
3259 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->A (lsb);
3260 
                    else
3261 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3262 
               end if;
3263 
                        when  ABLDX_OP3 =>
3264 
                              if x = '1' then
3265 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3266 
                    else
3267 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
3268 
               end if;
3269 
 
3270 
                        -- LDY $xxxx (absolute)
3271 
                        when  ABLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3272 
                        when  ABLDY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3273 
                        when  ABLDY_OP2 =>
3274 
                              if x = '1' then
3275 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y (lsb);
3276 
                    else
3277 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3278 
               end if;
3279 
                        when  ABLDY_OP3 =>
3280 
                              if x = '1' then
3281 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3282 
                    else
3283 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & EXM_O; -- MP->MEM; MEM->Y; PC+1
3284 
               end if;
3285 
 
3286 
                        -- STA $xxxx (absolute)
3287 
                        when  ABSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3288 
                        when  ABSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3289 
                        when  ABSTA_OP2 =>
3290 
                              if m = '1' then
3291 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
3292 
                                        else
3293 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM;
3294 
               end if;
3295 
                        when  ABSTA_OP3 =>
3296 
                              if m = '1' then
3297 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3298 
               else
3299 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM;
3300 
               end if;
3301 
 
3302 
                        -- STX $xxxx (absolute)
3303 
                        when  ABSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3304 
                        when  ABSTX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3305 
                        when  ABSTX_OP2 =>
3306 
                              if x = '1' then
3307 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X (lsb) ->MEM;
3308 
                                        else
3309 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X (lsb) ->MEM;
3310 
               end if;
3311 
                        when  ABSTX_OP3 =>
3312 
                              if x = '1' then
3313 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3314 
               else
3315 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRM_O; -- MP->MEM; X (msb) ->MEM;
3316 
               end if;
3317 
 
3318 
                        -- STY $xxxx (absolute)
3319 
                        when  ABSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3320 
                        when  ABSTY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3321 
                        when  ABSTY_OP2 =>
3322 
                              if x = '1' then
3323 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y (lsb) ->MEM;
3324 
                                        else
3325 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y (lsb) ->MEM;
3326 
               end if;
3327 
                        when  ABSTY_OP3 =>
3328 
                              if x = '1' then
3329 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3330 
               else
3331 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRM_O; -- MP->MEM; Y (msb) ->MEM;
3332 
               end if;
3333 
 
3334 
                        -- STZ $xxxx (absolute)
3335 
                        when  ABSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3336 
                        when  ABSTZ_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3337 
                        when  ABSTZ_OP2 =>
3338 
                              if m = '1' then
3339 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; PC+1
3340 
                                        else
3341 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0 (lsb) ->MEM;
3342 
               end if;
3343 
                        when  ABSTZ_OP3 =>
3344 
                              if m = '1' then
3345 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3346 
               else
3347 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0 (msb) ->MEM;
3348 
               end if;
3349 
 
3350 
                        -- JMP $xxxx (absolute)
3351 
                        when  ABJMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
3352 
                        when  ABJMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
3353 
 
3354 
                        -- JSR $xxxx (absolute)
3355 
                        when  ABJSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
3356 
                        when  ABJSR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
3357 
                        when  ABJSR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
3358 
                        when  ABJSR_OP3 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
3359 
 
3360 
                        -- BIT $xxxx (absolute)
3361 
                        when  ABBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3362 
                        when  ABBIT_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3363 
                        when  ABBIT_OP2 =>
3364 
                              if m = '1' then
3365 
                            q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- MP->MEM; MEM->ALU; PC+1
3366 
                         else
3367 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3368 
               end if;
3369 
                        when  ABBIT_OP3 =>
3370 
                              if m = '1' then
3371 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3372 
                    else
3373 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- MP->MEM; BIT
3374 
               end if;
3375 
 
3376 
                        -- ADC $xxxx (absolute)
3377 
                        when  ABADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3378 
                        when  ABADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3379 
                        when  ABADC_OP2 =>
3380 
                              if m = '1' then
3381 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
3382 
               else
3383 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3384 
               end if;
3385 
                        when  ABADC_OP3 =>
3386 
                              if m = '1' then
3387 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3388 
               else
3389 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
3390 
               end if;
3391 
 
3392 
                        -- SBC $xxxx (absolute)
3393 
                        when  ABSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3394 
                        when  ABSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3395 
                        when  ABSBC_OP2 =>
3396 
                              if m = '1' then
3397 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
3398 
               else
3399 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3400 
               end if;
3401 
                        when  ABSBC_OP3 =>
3402 
                              if m = '1' then
3403 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3404 
               else
3405 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A = A - MEM(msb)\O(lsb); EI
3406 
               end if;
3407 
 
3408 
                        -- CMP $xxxx (absolute)
3409 
                        when  ABCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3410 
                        when  ABCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3411 
                        when  ABCMP_OP2 =>
3412 
                              if m = '1' then
3413 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
3414 
               else
3415 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3416 
               end if;
3417 
                        when  ABCMP_OP3 =>
3418 
                              if m = '1' then
3419 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3420 
               else
3421 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
3422 
               end if;
3423 
 
3424 
                        -- CPX $xxxx (absolute)
3425 
                        when  ABCPX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3426 
                        when  ABCPX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3427 
                        when  ABCPX_OP2 =>
3428 
                              if x = '1' then
3429 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-EXT; EI
3430 
               else
3431 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3432 
               end if;
3433 
                        when  ABCPX_OP3 =>
3434 
                              if x = '1' then
3435 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3436 
               else
3437 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-MEM(msb)\O(lsb); EI
3438 
               end if;
3439 
 
3440 
                        -- CPY $xxxx (absolute)
3441 
                        when  ABCPY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3442 
                        when  ABCPY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3443 
                        when  ABCPY_OP2 =>
3444 
                              if x = '1' then
3445 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- X-EXT; EI
3446 
               else
3447 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3448 
               end if;
3449 
                        when  ABCPY_OP3 =>
3450 
                              if x = '1' then
3451 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3452 
               else
3453 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-MEM(msb)\O(lsb); EI
3454 
               end if;
3455 
 
3456 
                        -- ORA $xxxx (absolute)
3457 
                        when  ABORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3458 
                        when  ABORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3459 
                        when  ABORA_OP2 =>
3460 
                              if m = '1' then
3461 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
3462 
               else
3463 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3464 
               end if;
3465 
                        when  ABORA_OP3 =>
3466 
                              if m = '1' then
3467 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3468 
               else
3469 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM(msb)\O(lsb); EI
3470 
               end if;
3471 
 
3472 
                        -- AND $xxxx (absolute)
3473 
                        when  ABAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3474 
                        when  ABAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3475 
                        when  ABAND_OP2 =>
3476 
                              if m = '1' then
3477 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
3478 
               else
3479 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3480 
               end if;
3481 
                        when  ABAND_OP3 =>
3482 
                              if m = '1' then
3483 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3484 
               else
3485 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM(msb)\O(lsb); EI
3486 
               end if;
3487 
 
3488 
                        -- EOR $xxxx (absolute)
3489 
                        when  ABEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3490 
                        when  ABEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3491 
                        when  ABEOR_OP2 =>
3492 
                              if m = '1' then
3493 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
3494 
               else
3495 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3496 
               end if;
3497 
                        when  ABEOR_OP3 =>
3498 
                              if m = '1' then
3499 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3500 
               else
3501 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM(msb)\O(lsb); EI
3502 
               end if;
3503 
 
3504 
                        -- ASL $xxxx (absolute)
3505 
                        when  ABASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3506 
                        when  ABASL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3507 
                        when  ABASL_OP2 =>
3508 
                              if m = '1' then
3509 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3510 
                                        else
3511 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3512 
               end if;
3513 
                        when  ABASL_OP3 =>
3514 
                              if m = '1' then
3515 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O (lsb) SHIFT LEFT;
3516 
                                        else
3517 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3518 
               end if;
3519 
                        when  ABASL_OP4 =>
3520 
                              if m = '1' then
3521 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3522 
                                        else
3523 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & SHL_A & O16_R & ORD_O; -- O (msb\lsb) SHIFT LEFT -> O; MP-1
3524 
               end if;
3525 
                        when  ABASL_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3526 
                        when  ABASL_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3527 
 
3528 
                        -- LSR $xxxx (absolute)
3529 
                        when  ABLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3530 
                        when  ABLSR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3531 
                        when  ABLSR_OP2 =>
3532 
                              if m = '1' then
3533 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3534 
                                        else
3535 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3536 
               end if;
3537 
                        when  ABLSR_OP3 =>
3538 
                              if m = '1' then
3539 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O (lsb) SHIFT RIGHT;
3540 
                                        else
3541 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3542 
               end if;
3543 
                        when  ABLSR_OP4 =>
3544 
                              if m = '1' then
3545 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3546 
                                        else
3547 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & SHR_A & O16_R & ORD_O; -- O (msb\lsb) SHIFT RIGHT -> O; MP-1
3548 
               end if;
3549 
                        when  ABLSR_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3550 
                        when  ABLSR_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3551 
 
3552 
                        -- ROL $xxxx (absolute)
3553 
                        when  ABROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3554 
                        when  ABROL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3555 
                        when  ABROL_OP2 =>
3556 
                              if m = '1' then
3557 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3558 
                                        else
3559 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3560 
               end if;
3561 
                        when  ABROL_OP3 =>
3562 
                              if m = '1' then
3563 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O (lsb) ROTATE LEFT;
3564 
                                        else
3565 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3566 
               end if;
3567 
                        when  ABROL_OP4 =>
3568 
                              if m = '1' then
3569 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3570 
                                        else
3571 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & ROL_A & O16_R & ORD_O; -- O (msb\lsb) ROTATE LEFT -> O; MP-1
3572 
               end if;
3573 
                        when  ABROL_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3574 
                        when  ABROL_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3575 
 
3576 
                        -- ROR $xxxx (absolute)
3577 
                        when  ABROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3578 
                        when  ABROR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3579 
                        when  ABROR_OP2 =>
3580 
                              if m = '1' then
3581 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3582 
                                        else
3583 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3584 
               end if;
3585 
                        when  ABROR_OP3 =>
3586 
                              if m = '1' then
3587 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O (lsb) ROTATE RIGHT;
3588 
                                        else
3589 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3590 
               end if;
3591 
                        when  ABROR_OP4 =>
3592 
                              if m = '1' then
3593 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3594 
                                        else
3595 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & ROR_A & O16_R & ORD_O; -- O (msb\lsb) ROTATE RIGHT -> O; MP-1
3596 
               end if;
3597 
                        when  ABROR_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3598 
                        when  ABROR_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3599 
 
3600 
                        -- INC $xxxx (absolute)
3601 
                        when  ABINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3602 
                        when  ABINC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3603 
                        when  ABINC_OP2 =>
3604 
                              if m = '1' then
3605 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3606 
                                        else
3607 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3608 
               end if;
3609 
                        when  ABINC_OP3 =>
3610 
                              if m = '1' then
3611 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O  = O +1 -> O (lsb)
3612 
                                        else
3613 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3614 
               end if;
3615 
                        when  ABINC_OP4 =>
3616 
                              if m = '1' then
3617 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3618 
                                        else
3619 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLD_P & INC_A & O16_R & ORD_O; -- O = O +1 (msb\lsb) -> O; MP-1
3620 
               end if;
3621 
                        when  ABINC_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3622 
                        when  ABINC_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3623 
 
3624 
                        -- DEC $xxxx (absolute)
3625 
                        when  ABDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3626 
                        when  ABDEC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3627 
                        when  ABDEC_OP2 =>
3628 
                              if m = '1' then
3629 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3630 
                                        else
3631 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3632 
               end if;
3633 
                        when  ABDEC_OP3 =>
3634 
                              if m = '1' then
3635 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O  = O -1 -> O (lsb)
3636 
                                        else
3637 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3638 
               end if;
3639 
                        when  ABDEC_OP4 =>
3640 
                              if m = '1' then
3641 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3642 
                                        else
3643 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLD_P & DEC_A & O16_R & ORD_O; -- O = O -1 (msb\lsb) -> O; MP-1
3644 
               end if;
3645 
                        when  ABDEC_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP+1
3646 
                        when  ABDEC_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3647 
 
3648 
                        -- TSB $xxxx (absolute)
3649 
                        when  ABTSB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3650 
                        when  ABTSB_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3651 
                        when  ABTSB_OP2 =>
3652 
                              if m = '1' then
3653 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
3654 
                                        else
3655 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
3656 
               end if;
3657 
                        when  ABTSB_OP3 =>
3658 
                              if m = '1' then
3659 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> O
3660 
                                        else
3661 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O;
3662 
                                        end if;
3663 
                        when  ABTSB_OP4 =>
3664 
                              if m = '1' then
3665 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & TSB_A & OLD_R & ARD_O; -- A OR O => O
3666 
                                        else
3667 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & O16_R & ARD_O; -- A AND O -> O
3668 
               end if;
3669 
                        when  ABTSB_OP5 =>
3670 
                              if m = '1' then
3671 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
3672 
                                        else
3673 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & NOP_P & TSB_A & O16_R & ARD_O; -- A OR O => O; MP-1
3674 
                                   end if;
3675 
                        when  ABTSB_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP+1
3676 
                        when  ABTSB_OP7 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3677 
 
3678 
                        -- TRB $xxxx (absolute)
3679 
                        when  ABTRB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
3680 
                        when  ABTRB_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
3681 
                        when  ABTRB_OP2 =>
3682 
                              if m = '1' then
3683 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
3684 
                                        else
3685 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
3686 
               end if;
3687 
                        when  ABTRB_OP3 =>
3688 
                              if m = '1' then
3689 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> O
3690 
                                        else
3691 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O;
3692 
                                        end if;
3693 
                        when  ABTRB_OP4 =>
3694 
                              if m = '1' then
3695 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & TSB_A & OLD_R & ARD_O; -- A OR O => O
3696 
                                        else
3697 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & O16_R & ARD_O; -- A AND O -> O
3698 
               end if;
3699 
                        when  ABTRB_OP5 =>
3700 
                              if m = '1' then
3701 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
3702 
                                        else
3703 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & NOP_P & TRB_A & O16_R & ARD_O; -- A NAND O => O; MP-1
3704 
                                   end if;
3705 
                        when  ABTRB_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP+1
3706 
                        when  ABTRB_OP7 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3707 
 
3708 
                        ------------------------------------
3709 
                        --          ABSOLUTE,X            --
3710 
                        ------------------------------------
3711 
              --                      DMUX: ALU operand #2 multiplexer
3712 
              --                      |       AI: effective address is indexed (X or Y)
3713 
              --                      |       |   VP: vector pull
3714 
              --                      |       |   |   ML: memory lock
3715 
              --                      |       |   |   |   VPA: vali program address
3716 
              --                      |       |   |   |   |   VDA: valid data address
3717 
              --                      |       |   |   |   |   |   EI: end of microcode sequence (the hidden extra cycle it's always executed after this microinstruction)
3718 
              --                      |       |   |   |   |   |   |   W: read/write control
3719 
              --                      |       |   |   |   |   |   |   |    CLI: clear interrupt request
3720 
              --                      |       |   |   |   |   |   |   |    |    PD: PC/MP address output multiplexer select
3721 
              --                      |       |   |   |   |   |   |   |    |    |      PCR: register PC (program counter)
3722 
              --                      |       |   |   |   |   |   |   |    |    |      |        MPR: register MP (memory pointer)
3723 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       P_OP: register P set/reset bit
3724 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       ALUOP: ALU operation
3725 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       REGOP: registers load/increment/decrement etc.
3726 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       RSEL: registers output multiplexer select
3727 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
3728 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
3729 
                   --                      DMUX    AI  VP  ML VPA VDA  EI  W    CLI  PD     PCR      MPR     P_OP    ALUOP   REGOP   RSEL
3730 
                        -- LDA $xxxx,X (absolute indexed)
3731 
                        when  AXLDA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3732 
                        when  AXLDA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3733 
                        when  AXLDA_OP2 =>
3734 
                              if m = '1' then
3735 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
3736 
                                        else
3737 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3738 
                                        end if;
3739 
                        when  AXLDA_OP3 =>
3740 
                              if m = '1' then
3741 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3742 
                                        else
3743 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; EI
3744 
               end if;
3745 
 
3746 
                        -- LDY $xxxx,X (absolute indexed)
3747 
                        when  AXLDY_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3748 
                        when  AXLDY_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3749 
                        when  AXLDY_OP2 =>
3750 
                              if m = '1' then
3751 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; EI
3752 
                                        else
3753 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3754 
                                        end if;
3755 
                        when  AXLDY_OP3 =>
3756 
                              if m = '1' then
3757 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3758 
                                        else
3759 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & Y16_R & EXM_O; -- MP->MEM; MEM->Y; EI
3760 
               end if;
3761 
 
3762 
                        -- STA $xxxx,X (absolute indexed)
3763 
                        when  AXSTA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3764 
                        when  AXSTA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3765 
                        when  AXSTA_OP2 =>
3766 
                              if m = '1' then
3767 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
3768 
                                        else
3769 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP+1
3770 
               end if;
3771 
                        when  AXSTA_OP3 =>
3772 
                              if m = '1' then
3773 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3774 
                                        else
3775 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; MP+1
3776 
               end if;
3777 
 
3778 
                        -- STZ $xxxx,X (absolute indexed)
3779 
                        when  AXSTZ_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3780 
                        when  AXSTZ_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3781 
                        when  AXSTZ_OP2 =>
3782 
                              if m = '1' then
3783 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; EI
3784 
                                        else
3785 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; MP+1
3786 
               end if;
3787 
                        when  AXSTZ_OP3 =>
3788 
                              if m = '1' then
3789 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3790 
                                        else
3791 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; EI
3792 
               end if;
3793 
 
3794 
                        -- ADC $xxxx,X (absolute indexed)
3795 
                        when  AXADC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3796 
                        when  AXADC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3797 
                        when  AXADC_OP2 =>
3798 
                              if m = '1' then
3799 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
3800 
                                        else
3801 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3802 
               end if;
3803 
                        when  AXADC_OP3 =>
3804 
                              if m = '1' then
3805 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3806 
               else
3807 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
3808 
               end if;
3809 
 
3810 
                        -- SBC $xxxx,X (absolute indexed)
3811 
                        when  AXSBC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3812 
                        when  AXSBC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3813 
                        when  AXSBC_OP2 =>
3814 
                              if m = '1' then
3815 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
3816 
                                        else
3817 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3818 
               end if;
3819 
                        when  AXSBC_OP3 =>
3820 
                              if m = '1' then
3821 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3822 
               else
3823 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A - MEM(msb)\O(lsb)=> A (msb\lsb); EI
3824 
               end if;
3825 
 
3826 
                        -- CMP $xxxx,X (absolute indexed)
3827 
                        when  AXCMP_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3828 
                        when  AXCMP_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3829 
                        when  AXCMP_OP2 =>
3830 
                              if m = '1' then
3831 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
3832 
               else
3833 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3834 
               end if;
3835 
                        when  AXCMP_OP3 =>
3836 
                              if m = '1' then
3837 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3838 
               else
3839 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
3840 
               end if;
3841 
 
3842 
                        -- INC $xxxx,X (absolute indexed)
3843 
                        when  AXINC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3844 
                        when  AXINC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3845 
                        when  AXINC_OP2 =>
3846 
                              if m = '1' then
3847 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3848 
                                        else
3849 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3850 
               end if;
3851 
                        when  AXINC_OP3 =>
3852 
                              if m = '1' then
3853 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1 -> O (lsb)
3854 
                                        else
3855 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3856 
               end if;
3857 
                        when  AXINC_OP4 =>
3858 
                              if m = '1' then
3859 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3860 
                                        else
3861 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLD_P & INC_A & O16_R & ORD_O; -- O = O +1 (msb\lsb) -> O; MP-1
3862 
               end if;
3863 
                        when  AXINC_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3864 
                        when  AXINC_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3865 
 
3866 
                        -- DEC $xxxx,X (absolute indexed)
3867 
                        when  AXDEC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3868 
                        when  AXDEC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3869 
                        when  AXDEC_OP2 =>
3870 
                              if m = '1' then
3871 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3872 
                                        else
3873 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3874 
               end if;
3875 
                        when  AXDEC_OP3 =>
3876 
                              if m = '1' then
3877 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O  = O -1 -> O (lsb)
3878 
                                        else
3879 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3880 
               end if;
3881 
                        when  AXDEC_OP4 =>
3882 
                              if m = '1' then
3883 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3884 
                                        else
3885 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLD_P & DEC_A & O16_R & ORD_O; -- O = O -1 (msb\lsb) -> O; MP-1
3886 
               end if;
3887 
                        when  AXDEC_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3888 
                        when  AXDEC_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3889 
 
3890 
                        -- ASL $xxxx,X (absolute indexed)
3891 
                        when  AXASL_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3892 
                        when  AXASL_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3893 
                        when  AXASL_OP2 =>
3894 
                              if m = '1' then
3895 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3896 
                                        else
3897 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3898 
               end if;
3899 
                        when  AXASL_OP3 =>
3900 
                              if m = '1' then
3901 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O (lsb) SHIFT LEFT;
3902 
                                        else
3903 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3904 
               end if;
3905 
                        when  AXASL_OP4 =>
3906 
                              if m = '1' then
3907 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3908 
                                        else
3909 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & SHL_A & O16_R & ORD_O; -- O (msb\lsb) SHIFT LEFT -> O; MP-1
3910 
               end if;
3911 
                        when  AXASL_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3912 
                        when  AXASL_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3913 
 
3914 
                        -- LSR $xxxx,X (absolute indexed)
3915 
                        when  AXLSR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3916 
                        when  AXLSR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3917 
                        when  AXLSR_OP2 =>
3918 
                              if m = '1' then
3919 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3920 
                                        else
3921 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3922 
               end if;
3923 
                        when  AXLSR_OP3 =>
3924 
                              if m = '1' then
3925 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O (lsb) SHIFT RIGHT;
3926 
                                        else
3927 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3928 
               end if;
3929 
                        when  AXLSR_OP4 =>
3930 
                              if m = '1' then
3931 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3932 
                                        else
3933 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & SHR_A & O16_R & ORD_O; -- O (msb\lsb) SHIFT RIGHT -> O; MP-1
3934 
               end if;
3935 
                        when  AXLSR_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3936 
                        when  AXLSR_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3937 
 
3938 
                        -- ROL $xxxx,X (absolute indexed)
3939 
                        when  AXROL_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3940 
                        when  AXROL_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3941 
                        when  AXROL_OP2 =>
3942 
                              if m = '1' then
3943 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3944 
                                        else
3945 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3946 
               end if;
3947 
                        when  AXROL_OP3 =>
3948 
                              if m = '1' then
3949 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O (lsb) ROTATE LEFT;
3950 
                                        else
3951 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3952 
               end if;
3953 
                        when  AXROL_OP4 =>
3954 
                              if m = '1' then
3955 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3956 
                                        else
3957 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & ROL_A & O16_R & ORD_O; -- O (msb\lsb) ROTATE LEFT -> O; MP-1
3958 
               end if;
3959 
                        when  AXROL_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3960 
                        when  AXROL_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3961 
 
3962 
                        -- ROR $xxxx,X (absolute indexed)
3963 
                        when  AXROR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3964 
                        when  AXROR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3965 
                        when  AXROR_OP2 =>
3966 
                              if m = '1' then
3967 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb);
3968 
                                        else
3969 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
3970 
               end if;
3971 
                        when  AXROR_OP3 =>
3972 
                              if m = '1' then
3973 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O (lsb) ROTATE RIGHT;
3974 
                                        else
3975 
                                                     q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
3976 
               end if;
3977 
                        when  AXROR_OP4 =>
3978 
                              if m = '1' then
3979 
                            q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; PC+1
3980 
                                        else
3981 
                                           q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & DEC_M & FLC_P & ROR_A & O16_R & ORD_O; -- O (msb\lsb) ROTATE RIGHT -> O; MP-1
3982 
               end if;
3983 
                        when  AXROR_OP5 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O (lsb) ->MEM; MP +1
3984 
                        when  AXROR_OP6 => q <= NOP_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & OMD_O; -- MP->MEM; O (msb) ->MEM;
3985 
 
3986 
                        -- AND $xxxx,X (absolute indexed)
3987 
                        when  AXAND_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
3988 
                        when  AXAND_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
3989 
                        when  AXAND_OP2 =>
3990 
                              if m = '1' then
3991 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & NOP_R & ARD_O; -- A AND EXT; EI
3992 
               else
3993 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
3994 
               end if;
3995 
                        when  AXAND_OP3 =>
3996 
                              if m = '1' then
3997 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
3998 
               else
3999 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & NOP_R & ARD_O; -- A AND MEM(msb)\O(lsb); EI
4000 
               end if;
4001 
 
4002 
                        -- ORA $xxxx,X (absolute indexed)
4003 
                        when  AXORA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4004 
                        when  AXORA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
4005 
                        when  AXORA_OP2 =>
4006 
                              if m = '1' then
4007 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & NOP_R & ARD_O; -- A OR EXT; EI
4008 
               else
4009 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4010 
               end if;
4011 
                        when  AXORA_OP3 =>
4012 
                              if m = '1' then
4013 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4014 
               else
4015 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & NOP_R & ARD_O; -- A OR MEM(msb)\O(lsb); EI
4016 
               end if;
4017 
 
4018 
                        -- EOR $xxxx,X (absolute indexed)
4019 
                        when  AXEOR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4020 
                        when  AXEOR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
4021 
                        when  AXEOR_OP2 =>
4022 
                              if m = '1' then
4023 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & NOP_R & ARD_O; -- A XOR EXT; EI
4024 
               else
4025 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4026 
               end if;
4027 
                        when  AXEOR_OP3 =>
4028 
                              if m = '1' then
4029 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4030 
               else
4031 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & NOP_R & ARD_O; -- A XOR MEM(msb)\O(lsb); EI
4032 
               end if;
4033 
 
4034 
                        -- BIT $xxxx,X (absolute indexed)
4035 
                        when  AXBIT_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4036 
                        when  AXBIT_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
4037 
                        when  AXBIT_OP2 =>
4038 
                              if m = '1' then
4039 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT EXT; EI
4040 
               else
4041 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4042 
               end if;
4043 
                        when  AXBIT_OP3 =>
4044 
                              if m = '1' then
4045 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4046 
               else
4047 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A BIT MEM(msb)\O(lsb); EI
4048 
               end if;
4049 
 
4050 
                        ------------------------------------
4051 
                        --          ABSOLUTE,Y            --
4052 
                        ------------------------------------
4053 
                        -- LDA $xxxx,Y (absolute indexed)
4054 
                        when  AYLDA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4055 
                        when  AYLDA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4056 
                        when  AYLDA_OP2 =>
4057 
                              if m = '1' then
4058 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
4059 
                                        else
4060 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4061 
                                        end if;
4062 
                        when  AYLDA_OP3 =>
4063 
                              if m = '1' then
4064 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4065 
                                        else
4066 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; EI
4067 
               end if;
4068 
 
4069 
                        -- LDX $xxxx,Y (absolute indexed)
4070 
                        when  AYLDX_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4071 
                        when  AYLDX_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4072 
                        when  AYLDX_OP2 =>
4073 
                              if m = '1' then
4074 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; EI
4075 
                                        else
4076 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4077 
                                        end if;
4078 
                        when  AYLDX_OP3 =>
4079 
                              if m = '1' then
4080 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4081 
                                        else
4082 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & EXM_O; -- MP->MEM; MEM->X; EI
4083 
               end if;
4084 
 
4085 
                        -- STA $xxxx,Y (absolute indexed)
4086 
                        when  AYSTA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4087 
                        when  AYSTA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4088 
                        when  AYSTA_OP2 =>
4089 
                              if m = '1' then
4090 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
4091 
                                        else
4092 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP+1
4093 
               end if;
4094 
                        when  AYSTA_OP3 =>
4095 
                              if m = '1' then
4096 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4097 
                                        else
4098 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; MP+1
4099 
               end if;
4100 
 
4101 
                        -- ADC $xxxx,Y (absolute indexed)
4102 
                        when  AYADC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4103 
                        when  AYADC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4104 
                        when  AYADC_OP2 =>
4105 
                              if m = '1' then
4106 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
4107 
                                        else
4108 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4109 
               end if;
4110 
                        when  AYADC_OP3 =>
4111 
                              if m = '1' then
4112 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4113 
               else
4114 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
4115 
               end if;
4116 
 
4117 
                        -- SBC $xxxx,Y (absolute indexed)
4118 
                        when  AYSBC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4119 
                        when  AYSBC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4120 
                        when  AYSBC_OP2 =>
4121 
                              if m = '1' then
4122 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
4123 
                                        else
4124 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4125 
               end if;
4126 
                        when  AYSBC_OP3 =>
4127 
                              if m = '1' then
4128 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4129 
               else
4130 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A - MEM(msb)\O(lsb)=> A (msb\lsb); EI
4131 
               end if;
4132 
 
4133 
                        -- CMP $xxxx,Y (absolute indexed)
4134 
                        when  AYCMP_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4135 
                        when  AYCMP_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
4136 
                        when  AYCMP_OP2 =>
4137 
                              if m = '1' then
4138 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
4139 
               else
4140 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4141 
               end if;
4142 
                        when  AYCMP_OP3 =>
4143 
                              if m = '1' then
4144 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4145 
               else
4146 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
4147 
               end if;
4148 
 
4149 
                        -- AND $xxxx,Y (absolute indexed)
4150 
                        when  AYAND_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4151 
                        when  AYAND_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4152 
                        when  AYAND_OP2 =>
4153 
                              if m = '1' then
4154 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & NOP_R & ARD_O; -- A AND EXT; EI
4155 
               else
4156 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4157 
               end if;
4158 
                        when  AYAND_OP3 =>
4159 
                              if m = '1' then
4160 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4161 
               else
4162 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & NOP_R & ARD_O; -- A AND MEM(msb)\O(lsb); EI
4163 
               end if;
4164 
 
4165 
                        -- ORA $xxxx,Y (absolute indexed)
4166 
                        when  AYORA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4167 
                        when  AYORA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4168 
                        when  AYORA_OP2 =>
4169 
                              if m = '1' then
4170 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & NOP_R & ARD_O; -- A OR EXT; EI
4171 
               else
4172 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4173 
               end if;
4174 
                        when  AYORA_OP3 =>
4175 
                              if m = '1' then
4176 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4177 
               else
4178 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & NOP_R & ARD_O; -- A OR MEM(msb)\O(lsb); EI
4179 
               end if;
4180 
 
4181 
                        -- EOR $xxxx,Y (absolute indexed)
4182 
                        when  AYEOR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4183 
                        when  AYEOR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
4184 
                        when  AYEOR_OP2 =>
4185 
                              if m = '1' then
4186 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & NOP_R & ARD_O; -- A XOR EXT; EI
4187 
               else
4188 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4189 
               end if;
4190 
                        when  AYEOR_OP3 =>
4191 
                              if m = '1' then
4192 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4193 
               else
4194 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & NOP_R & ARD_O; -- A XOR MEM(msb)\O(lsb); EI
4195 
               end if;
4196 
 
4197 
 
4198 
                        --------------------------------------
4199 
                        --          ABSOLUTE LONG           --
4200 
                        --------------------------------------
4201 
                        -- JML $xxxxxx (absolute long)
4202 
                        when  ABJML_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4203 
                        when  ABJML_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4204 
                        when  ABJML_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PBR; EI
4205 
 
4206 
                        -- JSL $xxxxxx (absolute long)
4207 
                        when  ABJSL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4208 
                        when  ABJSL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4209 
                        when  ABJSL_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- PBR->S; SP-1;
4210 
                        when  ABJSL_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
4211 
                        when  ABJSL_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
4212 
                        when  ABJSL_OP5 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PBR; EI
4213 
 
4214 
                        ------------------------------------
4215 
                        --            RELATIVE            --
4216 
                        ------------------------------------
4217 
                        -- BRA xx
4218 
                        when    BRA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4219 
 
4220 
                        -- BEQ xx
4221 
                        when    BEQ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4222 
 
4223 
                        -- BNE xx
4224 
                        when    BNE_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4225 
 
4226 
                        -- BCC xx
4227 
                        when    BCC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4228 
 
4229 
                        -- BCS xx
4230 
                        when    BCS_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4231 
 
4232 
                        -- BVC xx
4233 
                        when    BVC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4234 
 
4235 
                        -- BVS xx
4236 
                        when    BVS_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4237 
 
4238 
                        -- BPL xx
4239 
                        when    BPL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4240 
 
4241 
                        -- BMI xx
4242 
                        when    BMI_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
4243 
 
4244 
                        -----------------------------------------
4245 
                        --            RELATIVE LONG            --
4246 
                        -----------------------------------------
4247 
                        -- BRL xxxx
4248 
                        when    BRL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb offset);
4249 
                        when    BRL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRL_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset
4250 
 
4251 
         -------------------------------
4252 
         --           STACK           --
4253 
         -------------------------------
4254 
         -- PEA xxxx
4255 
         when    PEA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
4256 
         when    PEA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; PC+1
4257 
                        when    PEA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
4258 
                        when    PEA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
4259 
 
4260 
         -- PEI xx
4261 
                        when    PEI_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4262 
                        when    PEI_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4263 
                        when    PEI_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4264 
                        when    PEI_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
4265 
                        when    PEI_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
4266 
 
4267 
         -- PER xxxx
4268 
                        when    PER_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb offset);
4269 
                        when    PER_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (msb offset)
4270 
                        when    PER_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & SWC_A & O16_R & PCR_O; -- O = O + PC
4271 
                        when    PER_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
4272 
                        when    PER_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
4273 
 
4274 
                        ----------------------------------
4275 
                        --          DIRECT,Y            --
4276 
                        ----------------------------------
4277 
                        -- LDA [$xx],Y (zeropage - direct long - indexed)
4278 
                        when  DYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4279 
                        when  DYLDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4280 
                        when  DYLDA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4281 
                        when  DYLDA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MPR MSB
4282 
                        when  DYLDA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4283 
                        when  DYLDA_OP5 =>
4284 
                              if m = '1' then
4285 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
4286 
                                        else
4287 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4288 
               end if;
4289 
                        when  DYLDA_OP6 =>
4290 
                              if m = '1' then
4291 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4292 
                                        else
4293 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
4294 
               end if;
4295 
 
4296 
                        -- STA [$xx],Y (zeropage - indirect long - indexed)
4297 
                        when  DYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4298 
                        when  DYSTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4299 
                        when  DYSTA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4300 
                        when  DYSTA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4301 
                        when  DYSTA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4302 
                        when  DYSTA_OP5 =>
4303 
                              if m = '1' then
4304 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
4305 
                                        else
4306 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP +1
4307 
               end if;
4308 
                        when  DYSTA_OP6 =>
4309 
                              if m = '1' then
4310 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4311 
                                        else
4312 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; EI
4313 
               end if;
4314 
 
4315 
                        -- ADC [$xx],Y (zeropage - indirect long - indexed)
4316 
                        when  DYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4317 
                        when  DYADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4318 
                        when  DYADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4319 
                        when  DYADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4320 
                        when  DYADC_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4321 
                        when  DYADC_OP5 =>
4322 
                              if m = '1' then
4323 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
4324 
                                        else
4325 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4326 
               end if;
4327 
                        when  DYADC_OP6 =>
4328 
                              if m = '1' then
4329 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4330 
                                        else
4331 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- A=A+MEM (msb)/O (lsb); EI
4332 
                                        end if;
4333 
 
4334 
                        -- SBC [$xx],Y (zeropage - indirect long - indexed)
4335 
                        when  DYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4336 
                        when  DYSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4337 
                        when  DYSBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4338 
                        when  DYSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4339 
                        when  DYSBC_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4340 
                        when  DYSBC_OP5 =>
4341 
                              if m = '1' then
4342 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
4343 
                                        else
4344 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4345 
               end if;
4346 
                        when  DYSBC_OP6 =>
4347 
                              if m = '1' then
4348 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4349 
                                        else
4350 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
4351 
                                        end if;
4352 
 
4353 
                        -- CMP [$xx],Y (zeropage - indirect long - indexed)
4354 
                        when  DYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4355 
                        when  DYCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4356 
                        when  DYCMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4357 
                        when  DYCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4358 
                        when  DYCMP_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4359 
                        when  DYCMP_OP5 =>
4360 
                              if m = '1' then
4361 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
4362 
                                        else
4363 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4364 
               end if;
4365 
                        when  DYCMP_OP6 =>
4366 
                              if m = '1' then
4367 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4368 
                                        else
4369 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
4370 
                                        end if;
4371 
 
4372 
                        -- AND [$xx],Y (zeropage - indirect long - indexed)
4373 
                        when  DYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4374 
                        when  DYAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4375 
                        when  DYAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4376 
                        when  DYAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4377 
                        when  DYAND_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4378 
                        when  DYAND_OP5 =>
4379 
                              if m = '1' then
4380 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
4381 
                                        else
4382 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4383 
               end if;
4384 
                        when  DYAND_OP6 =>
4385 
                              if m = '1' then
4386 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4387 
                                        else
4388 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM (msb)/O (lsb); EI
4389 
                                        end if;
4390 
 
4391 
                        -- ORA [$xx],Y (zeropage - indirect long - indexed)
4392 
                        when  DYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4393 
                        when  DYORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4394 
                        when  DYORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4395 
                        when  DYORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4396 
                        when  DYORA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4397 
                        when  DYORA_OP5 =>
4398 
                              if m = '1' then
4399 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
4400 
                                        else
4401 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4402 
               end if;
4403 
                        when  DYORA_OP6 =>
4404 
                              if m = '1' then
4405 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4406 
                                        else
4407 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM (msb)/O (lsb); EI
4408 
                                        end if;
4409 
 
4410 
                        -- EOR [$xx],Y (zeropage - indirect long - indexed)
4411 
                        when  DYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4412 
                        when  DYEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4413 
                        when  DYEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4414 
                        when  DYEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4415 
                        when  DYEOR_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4416 
                        when  DYEOR_OP5 =>
4417 
                              if m = '1' then
4418 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
4419 
                                        else
4420 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4421 
               end if;
4422 
                        when  DYEOR_OP6 =>
4423 
                              if m = '1' then
4424 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4425 
                                        else
4426 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM (msb)/O (lsb); EI
4427 
                                        end if;
4428 
 
4429 
                        --------------------------------
4430 
                        --          DIRECT            --
4431 
                        --------------------------------
4432 
                        -- LDA [$xx] (zeropage - direct long)
4433 
                        when  DILDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4434 
                        when  DILDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4435 
                        when  DILDA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4436 
                        when  DILDA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4437 
                        when  DILDA_OP4 =>
4438 
                              if m = '1' then
4439 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
4440 
                                        else
4441 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4442 
               end if;
4443 
                        when  DILDA_OP5 =>
4444 
                              if m = '1' then
4445 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4446 
                                        else
4447 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
4448 
               end if;
4449 
 
4450 
                        -- STA [$xx] (zeropage - indirect long)
4451 
                        when  DISTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4452 
                        when  DISTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4453 
                        when  DISTA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4454 
                        when  DISTA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4455 
                        when  DISTA_OP4 =>
4456 
                              if m = '1' then
4457 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
4458 
                                        else
4459 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; MP +1
4460 
               end if;
4461 
                        when  DISTA_OP5 =>
4462 
                              if m = '1' then
4463 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4464 
                                        else
4465 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A->MEM; EI
4466 
               end if;
4467 
 
4468 
                        -- ADC [$xx] (zeropage - indirect long)
4469 
                        when  DIADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4470 
                        when  DIADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4471 
                        when  DIADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4472 
                        when  DIADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4473 
                        when  DIADC_OP4 =>
4474 
                              if m = '1' then
4475 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
4476 
                                        else
4477 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4478 
               end if;
4479 
                        when  DIADC_OP5 =>
4480 
                              if m = '1' then
4481 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4482 
                                        else
4483 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- A=A+MEM (msb)/O (lsb); EI
4484 
                                        end if;
4485 
 
4486 
                        -- SBC [$xx] (zeropage - indirect long)
4487 
                        when  DISBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4488 
                        when  DISBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4489 
                        when  DISBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4490 
                        when  DISBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4491 
                        when  DISBC_OP4 =>
4492 
                              if m = '1' then
4493 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
4494 
                                        else
4495 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4496 
               end if;
4497 
                        when  DISBC_OP5 =>
4498 
                              if m = '1' then
4499 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4500 
                                        else
4501 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
4502 
                                        end if;
4503 
 
4504 
                        -- CMP [$xx] (zeropage - indirect long)
4505 
                        when  DICMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4506 
                        when  DICMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4507 
                        when  DICMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4508 
                        when  DICMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4509 
                        when  DICMP_OP4 =>
4510 
                              if m = '1' then
4511 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
4512 
                                        else
4513 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4514 
               end if;
4515 
                        when  DICMP_OP5 =>
4516 
                              if m = '1' then
4517 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4518 
                                        else
4519 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A=A-MEM (msb)/O (lsb); EI
4520 
                                        end if;
4521 
 
4522 
                        -- AND [$xx] (zeropage - indirect long)
4523 
                        when  DIAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4524 
                        when  DIAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4525 
                        when  DIAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4526 
                        when  DIAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4527 
                        when  DIAND_OP4 =>
4528 
                              if m = '1' then
4529 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
4530 
                                        else
4531 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4532 
               end if;
4533 
                        when  DIAND_OP5 =>
4534 
                              if m = '1' then
4535 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4536 
                                        else
4537 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM (msb)/O (lsb); EI
4538 
                                        end if;
4539 
 
4540 
                        -- ORA [$xx] (zeropage - indirect long)
4541 
                        when  DIORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4542 
                        when  DIORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4543 
                        when  DIORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4544 
                        when  DIORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4545 
                        when  DIORA_OP4 =>
4546 
                              if m = '1' then
4547 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
4548 
                                        else
4549 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4550 
               end if;
4551 
                        when  DIORA_OP5 =>
4552 
                              if m = '1' then
4553 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4554 
                                        else
4555 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM (msb)/O (lsb); EI
4556 
                                        end if;
4557 
 
4558 
                        -- EOR [$xx] (zeropage - indirect long)
4559 
                        when  DIEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
4560 
                        when  DIEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
4561 
                        when  DIEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
4562 
                        when  DIEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
4563 
                        when  DIEOR_OP4 =>
4564 
                              if m = '1' then
4565 
                                           q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
4566 
                                        else
4567 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4568 
               end if;
4569 
                        when  DIEOR_OP5 =>
4570 
                              if m = '1' then
4571 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4572 
                                        else
4573 
                                           q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM (msb)/O (lsb); EI
4574 
                                        end if;
4575 
 
4576 
                        ----------------------------------------
4577 
                        --           ABSOLUTE LONG            --
4578 
                        ----------------------------------------
4579 
                        -- LDA $xxxxxx (absolute long)
4580 
                        when  ALLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4581 
                        when  ALLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4582 
                        when  ALLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4583 
                        when  ALLDA_OP3 =>
4584 
                              if m = '1' then
4585 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A (lsb);
4586 
                    else
4587 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4588 
               end if;
4589 
                        when  ALLDA_OP4 =>
4590 
                              if m = '1' then
4591 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4592 
                    else
4593 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
4594 
               end if;
4595 
 
4596 
                        -- STA $xxxxxx (absolute long)
4597 
                        when  ALSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4598 
                        when  ALSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4599 
                        when  ALSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4600 
                        when  ALSTA_OP3 =>
4601 
                              if m = '1' then
4602 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
4603 
                                        else
4604 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM;
4605 
               end if;
4606 
                        when  ALSTA_OP4 =>
4607 
                              if m = '1' then
4608 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4609 
               else
4610 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM;
4611 
               end if;
4612 
 
4613 
                        -- ADC $xxxxxx (absolute long)
4614 
                        when  ALADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4615 
                        when  ALADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4616 
                        when  ALADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4617 
                        when  ALADC_OP3 =>
4618 
                              if m = '1' then
4619 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
4620 
               else
4621 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4622 
               end if;
4623 
                        when  ALADC_OP4 =>
4624 
                              if m = '1' then
4625 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4626 
               else
4627 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
4628 
               end if;
4629 
 
4630 
                        -- SBC $xxxxxx (absolute long)
4631 
                        when  ALSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4632 
                        when  ALSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4633 
                        when  ALSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4634 
                        when  ALSBC_OP3 =>
4635 
                              if m = '1' then
4636 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
4637 
               else
4638 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4639 
               end if;
4640 
                        when  ALSBC_OP4 =>
4641 
                              if m = '1' then
4642 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4643 
               else
4644 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A = A - MEM(msb)\O(lsb); EI
4645 
               end if;
4646 
 
4647 
                        -- CMP $xxxxxx (absolute long)
4648 
                        when  ALCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4649 
                        when  ALCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4650 
                        when  ALCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4651 
                        when  ALCMP_OP3 =>
4652 
                              if m = '1' then
4653 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
4654 
               else
4655 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4656 
               end if;
4657 
                        when  ALCMP_OP4 =>
4658 
                              if m = '1' then
4659 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4660 
               else
4661 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
4662 
               end if;
4663 
 
4664 
                        -- ORA $xxxxxx (absolute long)
4665 
                        when  ALORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4666 
                        when  ALORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4667 
                        when  ALORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4668 
                        when  ALORA_OP3 =>
4669 
                              if m = '1' then
4670 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
4671 
               else
4672 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4673 
               end if;
4674 
                        when  ALORA_OP4 =>
4675 
                              if m = '1' then
4676 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4677 
               else
4678 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM(msb)\O(lsb); EI
4679 
               end if;
4680 
 
4681 
                        -- AND $xxxxxx (absolute long)
4682 
                        when  ALAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4683 
                        when  ALAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4684 
                        when  ALAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4685 
                        when  ALAND_OP3 =>
4686 
                              if m = '1' then
4687 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
4688 
               else
4689 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4690 
               end if;
4691 
                        when  ALAND_OP4 =>
4692 
                              if m = '1' then
4693 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4694 
               else
4695 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM(msb)\O(lsb); EI
4696 
               end if;
4697 
 
4698 
                        -- EOR $xxxxxx (absolute long)
4699 
                        when  ALEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4700 
                        when  ALEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4701 
                        when  ALEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4702 
                        when  ALEOR_OP3 =>
4703 
                              if m = '1' then
4704 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
4705 
               else
4706 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4707 
               end if;
4708 
                        when  ALEOR_OP4 =>
4709 
                              if m = '1' then
4710 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4711 
               else
4712 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM(msb)\O(lsb); EI
4713 
               end if;
4714 
 
4715 
                        ------------------------------------------
4716 
                        --           ABSOLUTE LONG,X            --
4717 
                        ------------------------------------------
4718 
                        -- LDA $xxxxxx,X (absolute long indexed X)
4719 
                        when  AILDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4720 
                        when  AILDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4721 
                        when  AILDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4722 
                        when  AILDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4723 
                        when  AILDA_OP4 =>
4724 
                              if m = '1' then
4725 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A (lsb);
4726 
                    else
4727 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4728 
               end if;
4729 
                        when  AILDA_OP5 =>
4730 
                              if m = '1' then
4731 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4732 
                    else
4733 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
4734 
               end if;
4735 
 
4736 
                        -- STA $xxxxxx,X (absolute long indexed X)
4737 
                        when  AISTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4738 
                        when  AISTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4739 
                        when  AISTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4740 
                        when  AISTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4741 
                        when  AISTA_OP4 =>
4742 
                              if m = '1' then
4743 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
4744 
                                        else
4745 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM;
4746 
               end if;
4747 
                        when  AISTA_OP5 =>
4748 
                              if m = '1' then
4749 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4750 
               else
4751 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM;
4752 
               end if;
4753 
 
4754 
        -- ADC $xxxxxx,X (absolute long indexed X)
4755 
                        when  AIADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4756 
                        when  AIADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4757 
                        when  AIADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4758 
                        when  AIADC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4759 
                        when  AIADC_OP4 =>
4760 
                              if m = '1' then
4761 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
4762 
               else
4763 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4764 
               end if;
4765 
                        when  AIADC_OP5 =>
4766 
                              if m = '1' then
4767 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4768 
               else
4769 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
4770 
               end if;
4771 
 
4772 
                        -- SBC $xxxxxx,X (absolute long indexed X)
4773 
                        when  AISBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4774 
                        when  AISBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4775 
                        when  AISBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4776 
                        when  AISBC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4777 
                        when  AISBC_OP4 =>
4778 
                              if m = '1' then
4779 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
4780 
               else
4781 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4782 
               end if;
4783 
                        when  AISBC_OP5 =>
4784 
                              if m = '1' then
4785 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4786 
               else
4787 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A = A - MEM(msb)\O(lsb); EI
4788 
               end if;
4789 
 
4790 
                        -- CMP $xxxxxx,X (absolute long indexed X)
4791 
                        when  AICMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4792 
                        when  AICMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4793 
                        when  AICMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4794 
                        when  AICMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4795 
                        when  AICMP_OP4 =>
4796 
                              if m = '1' then
4797 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
4798 
               else
4799 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4800 
               end if;
4801 
                        when  AICMP_OP5 =>
4802 
                              if m = '1' then
4803 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4804 
               else
4805 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
4806 
               end if;
4807 
 
4808 
                        -- ORA $xxxxxx,X (absolute long indexed X)
4809 
                        when  AIORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4810 
                        when  AIORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4811 
                        when  AIORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4812 
                        when  AIORA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4813 
                        when  AIORA_OP4 =>
4814 
                              if m = '1' then
4815 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
4816 
               else
4817 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4818 
               end if;
4819 
                        when  AIORA_OP5 =>
4820 
                              if m = '1' then
4821 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4822 
               else
4823 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM(msb)\O(lsb); EI
4824 
               end if;
4825 
 
4826 
                        -- AND $xxxxxx,X (absolute long indexed X)
4827 
                        when  AIAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4828 
                        when  AIAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4829 
                        when  AIAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4830 
                        when  AIAND_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4831 
                        when  AIAND_OP4 =>
4832 
                              if m = '1' then
4833 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
4834 
               else
4835 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4836 
               end if;
4837 
                        when  AIAND_OP5 =>
4838 
                              if m = '1' then
4839 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4840 
               else
4841 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM(msb)\O(lsb); EI
4842 
               end if;
4843 
 
4844 
                        -- EOR $xxxxxx,X (absolute long indexed X)
4845 
                        when  AIEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
4846 
                        when  AIEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
4847 
                        when  AIEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
4848 
                        when  AIEOR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
4849 
                        when  AIEOR_OP4 =>
4850 
                              if m = '1' then
4851 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
4852 
               else
4853 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4854 
               end if;
4855 
                        when  AIEOR_OP5 =>
4856 
                              if m = '1' then
4857 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4858 
               else
4859 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM(msb)\O(lsb); EI
4860 
               end if;
4861 
 
4862 
                        ----------------------------------------
4863 
                        --          STACK RELATIVE            --
4864 
                        ----------------------------------------
4865 
                        -- LDA $xx,S (S + offset)
4866 
                        when  SRLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4867 
                        when  SRLDA_OP1 =>
4868 
                              if m = '1' then
4869 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
4870 
                                        else
4871 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4872 
               end if;
4873 
                        when  SRLDA_OP2 =>
4874 
                              if m = '1' then
4875 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4876 
                                        else
4877 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
4878 
               end if;
4879 
 
4880 
                        -- STA $xx,S (S + offset)
4881 
                        when  SRSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4882 
                        when  SRSTA_OP1 =>
4883 
                              if m = '1' then
4884 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
4885 
                                        else
4886 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM;
4887 
               end if;
4888 
                        when  SRSTA_OP2 =>
4889 
                              if m = '1' then
4890 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4891 
               else
4892 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM;
4893 
               end if;
4894 
 
4895 
                        -- ADC $xx,S (S + offset)
4896 
                        when  SRADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4897 
                        when  SRADC_OP1 =>
4898 
                              if m = '1' then
4899 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
4900 
               else
4901 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4902 
               end if;
4903 
                        when  SRADC_OP2 =>
4904 
                              if m = '1' then
4905 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4906 
               else
4907 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
4908 
               end if;
4909 
 
4910 
                        -- SBC $xx,S (S + offset)
4911 
                        when  SRSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4912 
                        when  SRSBC_OP1 =>
4913 
                              if m = '1' then
4914 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
4915 
               else
4916 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4917 
               end if;
4918 
                        when  SRSBC_OP2 =>
4919 
                              if m = '1' then
4920 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4921 
               else
4922 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A = A - MEM(msb)\O(lsb); EI
4923 
               end if;
4924 
 
4925 
                        -- CMP $xx,S (S + offset)
4926 
                        when  SRCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4927 
                        when  SRCMP_OP1 =>
4928 
                              if m = '1' then
4929 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
4930 
               else
4931 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4932 
               end if;
4933 
                        when  SRCMP_OP2 =>
4934 
                              if m = '1' then
4935 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4936 
               else
4937 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
4938 
               end if;
4939 
 
4940 
                        -- ORA $xx,S (S + offset)
4941 
                        when  SRORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4942 
                        when  SRORA_OP1 =>
4943 
                              if m = '1' then
4944 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
4945 
               else
4946 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4947 
               end if;
4948 
                        when  SRORA_OP2 =>
4949 
                              if m = '1' then
4950 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4951 
               else
4952 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM(msb)\O(lsb); EI
4953 
               end if;
4954 
 
4955 
                        -- AND $xx,S (S + offset)
4956 
                        when  SRAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4957 
                        when  SRAND_OP1 =>
4958 
                              if m = '1' then
4959 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
4960 
               else
4961 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4962 
               end if;
4963 
                        when  SRAND_OP2 =>
4964 
                              if m = '1' then
4965 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4966 
               else
4967 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM(msb)\O(lsb); EI
4968 
               end if;
4969 
 
4970 
                        -- EOR $xx,S (S + offset)
4971 
                        when  SREOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4972 
                        when  SREOR_OP1 =>
4973 
                              if m = '1' then
4974 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
4975 
               else
4976 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
4977 
               end if;
4978 
                        when  SREOR_OP2 =>
4979 
                              if m = '1' then
4980 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
4981 
               else
4982 
                                                     q <= EXM_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM(msb)\O(lsb); EI
4983 
               end if;
4984 
 
4985 
                        -------------------------------------------------
4986 
                        --          STACK RELATIVE INDEXED Y           --
4987 
                        -------------------------------------------------
4988 
                        -- LDA ($xx,S),Y
4989 
                        when  SYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
4990 
                        when  SYLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
4991 
                        when  SYLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
4992 
                        when  SYLDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
4993 
                        when  SYLDA_OP4 =>
4994 
                              if m = '1' then
4995 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
4996 
                                        else
4997 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb); MP+1
4998 
               end if;
4999 
                        when  SYLDA_OP5 =>
5000 
                              if m = '1' then
5001 
                                           q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5002 
                                        else
5003 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & EXM_O; -- MP->MEM; MEM->A; PC+1
5004 
               end if;
5005 
 
5006 
                        -- STA ($xx,S),Y
5007 
                        when  SYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5008 
                        when  SYSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5009 
                        when  SYSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5010 
                        when  SYSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5011 
                        when  SYSTA_OP4 =>
5012 
                              if m = '1' then
5013 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
5014 
                                        else
5015 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A (lsb) ->MEM;
5016 
               end if;
5017 
                        when  SYSTA_OP5 =>
5018 
                              if m = '1' then
5019 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5020 
               else
5021 
                            q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARM_O; -- MP->MEM; A (msb) ->MEM;
5022 
               end if;
5023 
 
5024 
                        -- ADC ($xx,S),Y
5025 
                        when  SYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5026 
                        when  SYADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5027 
                        when  SYADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5028 
                        when  SYADC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5029 
                        when  SYADC_OP4 =>
5030 
                              if m = '1' then
5031 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
5032 
               else
5033 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5034 
               end if;
5035 
                        when  SYADC_OP5 =>
5036 
                              if m = '1' then
5037 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5038 
               else
5039 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & A16_R & ARD_O; -- MEM(msb)\O(lsb) + A => A (msb\lsb); PC +1; EI
5040 
               end if;
5041 
 
5042 
                        -- SBC ($xx,S),Y
5043 
                        when  SYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5044 
                        when  SYSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5045 
                        when  SYSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5046 
                        when  SYSBC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5047 
                        when  SYSBC_OP4 =>
5048 
                              if m = '1' then
5049 
                                           q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
5050 
               else
5051 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5052 
               end if;
5053 
                        when  SYSBC_OP5 =>
5054 
                              if m = '1' then
5055 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5056 
               else
5057 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & A16_R & ARD_O; -- A = A - MEM(msb)\O(lsb); EI
5058 
               end if;
5059 
 
5060 
                        -- CMP ($xx,S),Y
5061 
                        when  SYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5062 
                        when  SYCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5063 
                        when  SYCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5064 
                        when  SYCMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5065 
                        when  SYCMP_OP4 =>
5066 
                              if m = '1' then
5067 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
5068 
               else
5069 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5070 
               end if;
5071 
                        when  SYCMP_OP5 =>
5072 
                              if m = '1' then
5073 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5074 
               else
5075 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A - MEM(msb)\O(lsb); EI
5076 
               end if;
5077 
 
5078 
                        -- ORA ($xx,S),Y
5079 
                        when  SYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5080 
                        when  SYORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5081 
                        when  SYORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5082 
                        when  SYORA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5083 
                        when  SYORA_OP4 =>
5084 
                              if m = '1' then
5085 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
5086 
               else
5087 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5088 
               end if;
5089 
                        when  SYORA_OP5 =>
5090 
                              if m = '1' then
5091 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5092 
               else
5093 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & A16_R & ARD_O; -- A=A OR MEM(msb)\O(lsb); EI
5094 
               end if;
5095 
 
5096 
                        -- AND ($xx,S),Y
5097 
                        when  SYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5098 
                        when  SYAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5099 
                        when  SYAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5100 
                        when  SYAND_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5101 
                        when  SYAND_OP4 =>
5102 
                              if m = '1' then
5103 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
5104 
               else
5105 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5106 
               end if;
5107 
                        when  SYAND_OP5 =>
5108 
                              if m = '1' then
5109 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5110 
               else
5111 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & A16_R & ARD_O; -- A=A AND MEM(msb)\O(lsb); EI
5112 
               end if;
5113 
 
5114 
                        -- EOR ($xx,S),Y
5115 
                        when  SYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
5116 
                        when  SYEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
5117 
                        when  SYEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
5118 
                        when  SYEOR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
5119 
                        when  SYEOR_OP4 =>
5120 
                              if m = '1' then
5121 
                                                     q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
5122 
               else
5123 
                                           q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM=>O (lsb); MP +1;
5124 
               end if;
5125 
                        when  SYEOR_OP5 =>
5126 
                              if m = '1' then
5127 
                            q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5128 
               else
5129 
                                                     q <= EXM_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & A16_R & ARD_O; -- A=A XOR MEM(msb)\O(lsb); EI
5130 
               end if;
5131 
 
5132 
                        ------------------------------------
5133 
                        --          MOVE BLOCK            --
5134 
                        ------------------------------------
5135 
         when  MBMVN_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (source)
5136 
                        when  MBMVN_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADXR & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; read byte
5137 
         when  MBMVN_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (destination)
5138 
         when  MBMVN_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADYR & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O->MEM; write byte
5139 
         when  MBMVN_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MVN_R & EXT_O; -- X +1; Y +1; A -1;
5140 
         when  MBMVN_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & DE3_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- check for A = $FFFF
5141 
 
5142 
         when  MBMVP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (source)
5143 
                        when  MBMVP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADXR & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; read byte
5144 
         when  MBMVP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (destination)
5145 
         when  MBMVP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADYR & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O->MEM; write byte
5146 
         when  MBMVP_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MVP_R & EXT_O; -- X -1; Y -1; A -1;
5147 
         when  MBMVP_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & DE3_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- check for A = $FFFF
5148 
 
5149 
                        ----------------------------------
5150 
                        --          MULTIPLY            --
5151 
                        ----------------------------------
5152 
                        when    MPU_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUI_R & EXT_O; -- load A/B & X on multiplier
5153 
                        when    MPU_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUS_R & EXT_O; -- start multiplication (unsigned)
5154 
                        when    MPU_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & MUF_P & NOP_A & MUL_R & EXT_O; -- load result on A/B and X
5155 
                        when    MPU_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- EI
5156 
 
5157 
                        when    MPS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUI_R & EXT_O; -- load A/B & X on multiplier
5158 
                        when    MPS_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MSS_R & EXT_O; -- start multiplication (signed)
5159 
                        when    MPS_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & MSF_P & NOP_A & MUL_R & EXT_O; -- load result on A/B and X
5160 
                        when    MPS_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- EI
5161 
 
5162 
                        when    others  => q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5163 
 
5164 
                end case;
5165 
          else
5166 
                 -----------------------------------
5167 
                 --        EMULATION MODE         --
5168 
                 -----------------------------------
5169 
            --                        DMUX: ALU operand #2 multiplexer
5170 
            --                        |       AI: effective address is indexed (X or Y)
5171 
            --                        |       |   VP: vector pull
5172 
            --                        |       |   |   ML: memory lock
5173 
            --                        |       |   |   |   VPA: vali program address
5174 
            --                        |       |   |   |   |   VDA: valid data address
5175 
            --                        |       |   |   |   |   |   EI: end of microcode sequence (the hidden extra cycle it's always executed after this microinstruction)
5176 
            --                        |       |   |   |   |   |   |   W: read/write control
5177 
            --                        |       |   |   |   |   |   |   |    CLI: clear interrupt request
5178 
            --                        |       |   |   |   |   |   |   |    |    PD: PC/MP address output multiplexer select
5179 
            --                        |       |   |   |   |   |   |   |    |    |      PCR: register PC (program counter)
5180 
            --                        |       |   |   |   |   |   |   |    |    |      |        MPR: register MP (memory pointer)
5181 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       P_OP: register P set/reset bit
5182 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       |       ALUOP: ALU operation
5183 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       |       |       REGOP: registers load/increment/decrement etc.
5184 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       RSEL: registers output multiplexer select
5185 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
5186 
            --                        |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
5187 
                 case a is              -- DMUX    AI  VP  ML VPA VDA  EI  W    CLI  PD     PCR      MPR     P_OP    ALUOP   REGOP   RSEL
5188 
                        ------------------------------------
5189 
                        --            IMPLIED             --
5190 
                        ------------------------------------
5191 
                        -- BRK
5192 
                        when    BRK_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & IN2_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- if no interrupt request then PC=PC+2
5193 
                        when    BRK_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1
5194 
                        when    BRK_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1
5195 
                        when    BRK_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & VEC_M & SID_P & NOP_A & SDW_R & PRD_O; -- VEC->MP; SEI; CLD; 1->B (stack); P->S;
5196 
                        when    BRK_OP4 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'0'& RDE &'1'& ADMP & LSB_PC & INC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCL; MP+1; interrupt ack; VP
5197 
                        when    BRK_OP5 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'1'& RDE &'1'& ADMP & MSB_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCH; EI; VP
5198 
 
5199 
                        -- COP
5200 
                        when    COP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & IN2_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC=PC+2
5201 
                        when    COP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1
5202 
                        when    COP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRL &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1
5203 
                        when    COP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & VEC_M & SID_P & NOP_A & SDW_R & PRD_O; -- VEC->MP; SEI; CLD; 1->B (stack); P->S;
5204 
                        when    COP_OP4 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'0'& RDE &'1'& ADMP & LSB_PC & INC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCL; MP+1; interrupt ack; VP
5205 
                        when    COP_OP5 => q <= ORD_D &'0'&'1'&'0'&'0'&'1'&'1'& RDE &'1'& ADMP & MSB_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->PCH; EI; VP
5206 
 
5207 
                        -- NOP
5208 
                   when    NOP_OP0 => q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5209 
 
5210 
                        -- CLC
5211 
                        when    CLC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLC_P & NOP_A & NOP_R & EXT_O; -- 0->C; EI
5212 
 
5213 
                        -- SEC
5214 
                        when    SEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SEC_P & NOP_A & NOP_R & EXT_O; -- 1->C; EI
5215 
 
5216 
                        -- CLI
5217 
                        when    CLI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLI_P & NOP_A & NOP_R & EXT_O; -- 0->I; EI
5218 
 
5219 
                        -- SEI
5220 
                        when    SEI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SEI_P & NOP_A & NOP_R & EXT_O; -- 1->I; EI
5221 
 
5222 
                        -- CLV
5223 
                        when    CLV_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLV_P & NOP_A & NOP_R & EXT_O; -- 0->V; EI
5224 
 
5225 
                        -- CLD
5226 
                        when    CLD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & CLD_P & NOP_A & NOP_R & EXT_O; -- 0->D; EI
5227 
 
5228 
                        -- SED
5229 
                        when    SED_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & SED_P & NOP_A & NOP_R & EXT_O; -- 1->D; EI
5230 
 
5231 
                        -- TAX
5232 
                        when    TAX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & ARD_O; -- A->X; EI
5233 
 
5234 
                        -- TXA
5235 
                        when    TXA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & XRD_O; -- X->A; EI
5236 
 
5237 
                        -- TAY
5238 
                        when    TAY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & ARD_O; -- A->Y; EI
5239 
 
5240 
                        -- TYA
5241 
                        when    TYA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & YRD_O; -- Y->A; EI
5242 
 
5243 
                        -- TXY
5244 
                        when    TXY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & XRD_O; -- X->Y; EI
5245 
 
5246 
                        -- TYX
5247 
                        when    TYX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & YRD_O; -- Y->X; EI
5248 
 
5249 
                        -- TCD
5250 
                        when    TCD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & D16_R & ARD_O; -- C->D; EI
5251 
 
5252 
                        -- TDC
5253 
                        when    TDC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & DRD_O; -- D->C; EI
5254 
 
5255 
                        -- TXS
5256 
                        when    TXS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & S16_R & XRD_O; -- X->S; EI
5257 
 
5258 
                        -- TSX
5259 
                        when    TSX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & X16_R & SRD_O; -- S->X; EI
5260 
 
5261 
                        -- INC A
5262 
                        when    INC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & ALL_R & ARD_O; -- A+1; EI
5263 
 
5264 
                        -- DEC A
5265 
                        when    DEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & ALL_R & ARD_O; -- A-1; EI
5266 
 
5267 
                        -- INX
5268 
                        when    INX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & XLL_R & XRD_O; -- X+1; EI
5269 
 
5270 
                        -- DEX
5271 
                        when    DEX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & XLL_R & XRD_O; -- X-1; EI
5272 
 
5273 
                        -- INY
5274 
                        when    INY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & INC_A & YLL_R & YRD_O; -- Y+1; EI
5275 
 
5276 
                        -- DEY
5277 
                        when    DEY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & DEC_A & YLL_R & YRD_O; -- Y-1; EI
5278 
 
5279 
                        -- PHP
5280 
                        when    PHP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PRD_O; -- P->S; SP-1; EI
5281 
 
5282 
                        -- PHD
5283 
                        when    PHD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRM_O; -- D (msb) ->S; SP-1;
5284 
                        when    PHD_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRD_O; -- D (lsb) ->S; SP-1; EI
5285 
 
5286 
                        -- PHA
5287 
                        when    PHA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A->S; SP-1; EI
5288 
 
5289 
                        -- PHX
5290 
                        when    PHX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X->S; SP-1; EI
5291 
 
5292 
                        -- PHY
5293 
                        when    PHY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRD_O; -- X->S; SP-1; EI
5294 
 
5295 
                        -- PHR (in emulation mode PHR pushes ALWAYS XY 8 bit registers and A as 16 bit register)
5296 
                        when    PHR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARM_O; -- A(msb)->S; SP-1;  (two byte instruction)
5297 
                        when    PHR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A(lsb)->S; SP-1;  (two byte instruction)
5298 
                        when    PHR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X->S; SP-1;       (two byte instruction)
5299 
                        when    PHR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & SDW_R & YRD_O; -- Y->S; SP-1; EI    (two byte instruction)
5300 
 
5301 
                        -- PLP
5302 
                        when    PLP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5303 
                        when    PLP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & PLD_P & NOP_A & NOP_R & EXT_O; -- S->P; EI
5304 
 
5305 
                        -- SAV (in emulation mode SAV pushes ALWAYS XY 8 bit registers and A as 16 bit register)
5306 
                        when    SAV_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARM_O; -- A(msb)->S; SP-1;  (two byte instruction)
5307 
                        when    SAV_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ARD_O; -- A(lsb)->S; SP-1;  (two byte instruction)
5308 
                        when    SAV_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & XRD_O; -- X->S; SP-1;     (two byte instruction)
5309 
                        when    SAV_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & YRD_O; -- Y->S; SP-1;     (two byte instruction)
5310 
                        when    SAV_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & BRD_O; -- B->S; SP-1;          (two byte instruction)
5311 
                        when    SAV_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & DRM_O; -- D (msb) ->S; SP-1;   (two byte instruction)
5312 
                        when    SAV_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & SDW_R & DRD_O; -- D (lsb) ->S; SP-1;   (two byte instruction)
5313 
 
5314 
                        -- RST (in emulation mode RST pulls ALWAYS AXY 8 bit registers)
5315 
                        when    RST_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP;     SP+1 (two byte instruction)
5316 
                        when    RST_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- S->O (lsb); SP+1
5317 
                        when    RST_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & DLS_R & EXM_O; -- S msb) & O (lsb) -> D;/SP+1
5318 
                        when    RST_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & BLS_R & EXT_O; -- S->B; SP +1
5319 
                        when    RST_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYU_R & EXT_O; -- S->Y;            (two byte instruction)
5320 
                        when    RST_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXU_R & EXT_O; -- S->X;            (two byte instruction)
5321 
                        when    RST_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SAU_R & EXT_O; -- S->A (lsb); SP+1 (two byte instruction)
5322 
                        when    RST_OP7 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & ALM_R & EXT_O; -- S->A (msb); EI   (two byte instruction)
5323 
 
5324 
                        -- PLD
5325 
                        when    PLD_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5326 
                        when    PLD_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OSU_R & EXT_O; -- S->O (lsb); SP+1
5327 
                        when    PLD_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & D16_R & EXM_O; -- S msb) & O (lsb) -> D;
5328 
 
5329 
                        -- PLA
5330 
                        when    PLA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5331 
                        when    PLA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- S->A; EI
5332 
 
5333 
                        -- PLX
5334 
                        when    PLX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5335 
                        when    PLX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- S->X; EI
5336 
 
5337 
                        -- PLY
5338 
                        when    PLY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5339 
                        when    PLY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- S->Y; EI
5340 
 
5341 
                        -- PLR (in emulation mode PLR pulls ALWAYS XY 8 bit registers and A as 16 bit register)
5342 
                        when    PLR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1     (two byte instruction)
5343 
                        when    PLR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SYU_R & EXT_O; -- S->Y;            (two byte instruction)
5344 
                        when    PLR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SXU_R & EXT_O; -- S->X;            (two byte instruction)
5345 
                        when    PLR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SAU_R & EXT_O; -- S->A (lsb); SP+1 (two byte instruction)
5346 
                        when    PLR_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & WDC_P & NOP_A & ALM_R & EXT_O; -- S->A (msb); EI   (two byte instruction)
5347 
 
5348 
                        -- RTI
5349 
                        when    RTI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- PC->MEM; MP=01XX (STACK)
5350 
                        when    RTI_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & PLD_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; MEM->P; SP +1
5351 
                        when    RTI_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB PC->O; SP +1;
5352 
                        when    RTI_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
5353 
                        when    RTI_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; MSB->MP; EI
5354 
 
5355 
                        -- RTS
5356 
                        when    RTS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
5357 
                        when    RTS_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB->O;
5358 
                        when    RTS_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
5359 
                        when    RTS_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MEM->PC
5360 
                        when    RTS_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC+1; PC->MEM; EI
5361 
 
5362 
                        -- ASL (A)
5363 
                        when    ASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHL_A & ALL_R & ARD_O; -- A SHIFT LEFT; EI
5364 
 
5365 
                        -- LSR (A)
5366 
                        when    LSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & SHR_A & ALL_R & ARD_O; -- A SHIFT RIGHT; EI
5367 
 
5368 
                        -- ROL (A)
5369 
                        when    ROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROL_A & ALL_R & ARD_O; -- A ROTATE LEFT; EI
5370 
 
5371 
                        -- ROR (A)
5372 
                        when    ROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLC_P & ROR_A & ALL_R & ARD_O; -- A ROTATE RIGHT; EI
5373 
 
5374 
                        -- EXT (A)
5375 
                        when    EXT_OP0 => q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- NOP; EI        (two byte instruction)
5376 
 
5377 
                        -- NEG (A)
5378 
                        when    NEG_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NEG_A & ALL_R & ARD_O; -- negates A (lsb); EI (two byte instruction)
5379 
 
5380 
                        -- XYX
5381 
                        when    XYX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & XRD_O; -- X->O;          (two byte instruction)
5382 
                        when    XYX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & XLL_R & YRD_O; -- Y->X;
5383 
                        when    XYX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & YLL_R & ORD_O; -- O->Y; EI
5384 
 
5385 
                        -- XAX
5386 
                        when    XAX_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & XRD_O; -- X->O;          (two byte instruction)
5387 
                        when    XAX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & XLL_R & ARD_O; -- A->X;
5388 
                        when    XAX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & ALL_R & ORD_O; -- O->A; EI
5389 
 
5390 
                        -- XAY
5391 
                        when    XAY_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & YRD_O; -- Y->O;          (two byte instruction)
5392 
                        when    XAY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & YLL_R & ARD_O; -- A->Y;
5393 
                        when    XAY_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLW_P & NOP_A & ALL_R & ORD_O; -- O->A; EI
5394 
 
5395 
                        -- TCS
5396 
                        when    TCS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & S16_R & ARD_O; -- C->S;
5397 
 
5398 
                        -- TSC
5399 
                        when    TSC_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & SRD_O; -- S->C;
5400 
 
5401 
                        -- XCE
5402 
                        when    XCE_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & XCE_P & NOP_A & NOP_R & EXT_O; -- E-<>C; EI
5403 
 
5404 
                   -- WDM
5405 
                        when    WDM_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDM_P & NOP_A & NOP_R & EXT_O; -- set two byte instruction bit
5406 
 
5407 
                        -- PHK
5408 
                        when    PHK_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- K->S; SP-1; EI
5409 
 
5410 
                        -- PHB
5411 
                        when    PHB_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & BRD_O; -- B->S; SP-1; EI
5412 
 
5413 
                        -- PLB
5414 
                        when    PLB_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MP; SP+1
5415 
                        when    PLB_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADSP & NOP_PC & NOP_M & FLD_P & NOP_A & BLD_R & EXT_O; -- S->B; EI
5416 
 
5417 
                        -- RTL
5418 
                        when    RTL_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
5419 
                        when    RTL_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; LSB->O;
5420 
                        when    RTL_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- SP->MEM; SP +1
5421 
                        when    RTL_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MSB->O;
5422 
                        when    RTL_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SUP_R & EXT_O; -- MP->MEM; SP +1;
5423 
                        when    RTL_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADSP & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; MEM->PBR;
5424 
                        when    RTL_OP6 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC+1; PC->MEM; EI
5425 
 
5426 
                        -- XBA
5427 
                        when    XBA_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLD_P & NOP_A & A16_R & ARM_O; -- swap A<->B; EI
5428 
 
5429 
                        -- WAI
5430 
                        when    WAI_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & WAI_R & EXT_O; -- set WAI flipflop
5431 
                        when    WAI_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5432 
 
5433 
                        -- STP
5434 
                        when    STP_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & STP_R & EXT_O; -- set STP flipflop
5435 
                        when    STP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
5436 
 
5437 
                        ------------------------------------
5438 
                        --           IMMEDIATE            --
5439 
                        ------------------------------------
5440 
                        -- LDA #xx
5441 
                        when  IMLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MEM->A; PC +1; EI
5442 
 
5443 
                        -- LDX #xx
5444 
                        when  IMLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MEM->X; PC +1; EI
5445 
 
5446 
                        -- LDY #yy
5447 
                        when  IMLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MEM->Y; PC +1; EI
5448 
 
5449 
                        -- ADC #xx (immediate)
5450 
                        when  IMADC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; PC +1; EI
5451 
                        when  IMADC_OP1 => q <= BCD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
5452 
 
5453 
                        -- SBC #xx (immediate)
5454 
                        when  IMSBC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-EXT; PC +1; EI
5455 
                        when  IMSBC_OP1 => q <= BCD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A-BCD ADJ (DAA); PC +1; EI
5456 
 
5457 
                        -- CMP #xx (immediate)
5458 
                        when  IMCMP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; PC +1; EI
5459 
 
5460 
                        -- CPX #xx (immediate)
5461 
                        when  IMCPX_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-MEM; PC +1; EI
5462 
 
5463 
                        -- CPY #xx (immediate)
5464 
                        when  IMCPY_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-MEM; PC +1; EI
5465 
 
5466 
                        -- AND #xx (immediate)
5467 
                        when  IMAND_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A AND MEM -> A; PC +1;
5468 
 
5469 
                        -- ORA #xx (immediate)
5470 
                        when  IMORA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A OR MEM -> A; PC +1;
5471 
 
5472 
                        -- EOR #xx (immediate)
5473 
                        when  IMEOR_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A XOR MEM -> A; PC +1;
5474 
 
5475 
                        -- BIT #xx (immediate)
5476 
                        when  IMBIT_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & LDZ_P & BIT_A & NOP_R & ARD_O; -- A AND MEM; PC +1;
5477 
 
5478 
                        -- SEP #xx (immediate)
5479 
                        when  IMSEP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & SEP_P &  OR_A & ALL_R & ARD_O; -- P = P OR MEM; PC +1;
5480 
 
5481 
                        -- REP #xx (immediate)
5482 
                        when  IMREP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & INC_PC & NOP_M & REP_P &  OR_A & ALL_R & ARD_O; -- P = P AND NOT MEM; PC +1;
5483 
 
5484 
                        ------------------------------------
5485 
                        --           ZERO PAGE            --
5486 
                        ------------------------------------
5487 
                        -- LDA $xx (zero page)
5488 
                        when  ZPLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5489 
                        when  ZPLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; PC+1; EI
5490 
 
5491 
                        -- LDX $xx (zero page)
5492 
                        when  ZPLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5493 
                        when  ZPLDX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; PC+1; EI
5494 
 
5495 
                        -- LDY $xx (zero page)
5496 
                        when  ZPLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5497 
                        when  ZPLDY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; PC+1; EI
5498 
 
5499 
                        -- STA $xx (zero page)
5500 
                        when  ZPSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5501 
                        when  ZPSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1; EI
5502 
 
5503 
                        -- STX $xx (zero page)
5504 
                        when  ZPSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5505 
                        when  ZPSTX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; PC+1; EI
5506 
 
5507 
                        -- STY $xx (zero page)
5508 
                        when  ZPSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5509 
                        when  ZPSTY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; PC+1; EI
5510 
 
5511 
                        -- STZ $xx (zero page)
5512 
                        when  ZPSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5513 
                        when  ZPSTZ_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; PC+1; EI
5514 
 
5515 
                        -- ADC $xx (zero page)
5516 
                        when  ZPADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5517 
                        when  ZPADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+MEM; EI
5518 
                        when  ZPADC_OP2 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
5519 
 
5520 
                        -- SBC $xx (zero page)
5521 
                        when  ZPSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5522 
                        when  ZPSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-MEM; EI
5523 
                        when  ZPSBC_OP2 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A-BCD ADJ (DAS); PC +1; EI
5524 
 
5525 
                        -- CMP $xx (zeropage)
5526 
                        when  ZPCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5527 
                        when  ZPCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; EI
5528 
 
5529 
                        -- CPX $xx (zeropage)
5530 
                        when  ZPCPX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5531 
                        when  ZPCPX_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-MEM; EI
5532 
 
5533 
                        -- CPY $xx (zeropage)
5534 
                        when  ZPCPY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5535 
                        when  ZPCPY_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-MEM; EI
5536 
 
5537 
                        -- AND $xx (zeropage)
5538 
                        when  ZPAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5539 
                        when  ZPAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM;  EI
5540 
 
5541 
                        -- ORA $xx (zeropage)
5542 
                        when  ZPORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5543 
                        when  ZPORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM;  EI
5544 
 
5545 
                        -- EOR $xx (zeropage)
5546 
                        when  ZPEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5547 
                        when  ZPEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM;  EI
5548 
 
5549 
                        -- BIT $xx (zero page)
5550 
                        when  ZPBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5551 
                        when  ZPBIT_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & INC_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- MP->MEM; MEM->ALU; PC+1; EI
5552 
 
5553 
                        -- ASL $xx (zero page)
5554 
                        when  ZPASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5555 
                        when  ZPASL_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5556 
                        when  ZPASL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT;
5557 
                        when  ZPASL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5558 
 
5559 
                        -- LSR $xx (zero page)
5560 
                        when  ZPLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5561 
                        when  ZPLSR_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5562 
                        when  ZPLSR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT;
5563 
                        when  ZPLSR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5564 
 
5565 
                        -- ROL $xx (zero page)
5566 
                        when  ZPROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5567 
                        when  ZPROL_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5568 
                        when  ZPROL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT;
5569 
                        when  ZPROL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5570 
 
5571 
                        -- ROR $xx (zero page)
5572 
                        when  ZPROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5573 
                        when  ZPROR_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5574 
                        when  ZPROR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT;
5575 
                        when  ZPROR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5576 
 
5577 
                        -- INC $xx (zero page)
5578 
                        when  ZPINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5579 
                        when  ZPINC_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5580 
                        when  ZPINC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
5581 
                        when  ZPINC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5582 
 
5583 
                        -- DEC $xx (zero page)
5584 
                        when  ZPDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5585 
                        when  ZPDEC_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5586 
                        when  ZPDEC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
5587 
                        when  ZPDEC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5588 
 
5589 
                        -- TSB $xx (zero page)
5590 
                        when  ZPTSB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5591 
                        when  ZPTSB_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5592 
                        when  ZPTSB_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
5593 
                        when  ZPTSB_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & TSB_A & OLD_R & ARD_O; -- A OR O -> O
5594 
                        when  ZPTSB_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5595 
 
5596 
                        -- TRB $xx (zero page)
5597 
                        when  ZPTRB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5598 
                        when  ZPTRB_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1; EI
5599 
                        when  ZPTRB_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
5600 
                        when  ZPTRB_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & TRB_A & OLD_R & ARD_O; -- A NAND O -> O
5601 
                        when  ZPTRB_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1; EI
5602 
 
5603 
                        ------------------------------------
5604 
                        --          ZERO PAGE,X           --
5605 
                        ------------------------------------
5606 
                        -- LDA $xx,X (zero page indexed)
5607 
                        when  ZXLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5608 
                        when  ZXLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
5609 
 
5610 
                        -- LDY $xx,X (zero page indexed)
5611 
                        when  ZXLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5612 
                        when  ZXLDY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; EI
5613 
 
5614 
                        -- STA $xx,X (zero page indexed)
5615 
                        when  ZXSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5616 
                        when  ZXSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
5617 
 
5618 
                        -- STY $xx,X (zero page indexed)
5619 
                        when  ZXSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5620 
                        when  ZXSTY_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; EI
5621 
 
5622 
                        -- STZ $xx,X (zero page indexed)
5623 
                        when  ZXSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5624 
                        when  ZXSTZ_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; X->MEM; EI
5625 
 
5626 
                        -- ADC $xx,X (zero page indexed)
5627 
                        when  ZXADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5628 
                        when  ZXADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+MEM; EI
5629 
                        when  ZXADC_OP2 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); EI
5630 
 
5631 
                        -- SBC $xx,X (zero page indexed)
5632 
                        when  ZXSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5633 
                        when  ZXSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-MEM; EI
5634 
                        when  ZXSBC_OP2 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A-BCD ADJ (DAS); EI
5635 
 
5636 
                        -- CMP $xx,X (zero page indexed)
5637 
                        when  ZXCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5638 
                        when  ZXCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-MEM; EI
5639 
 
5640 
                        -- AND $xx,X (zero page indexed)
5641 
                        when  ZXAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5642 
                        when  ZXAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM;  EI
5643 
 
5644 
                        -- ORA $xx,X (zero page indexed)
5645 
                        when  ZXORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5646 
                        when  ZXORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM;  EI
5647 
 
5648 
                        -- EOR $xx,X (zero page indexed)
5649 
                        when  ZXEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5650 
                        when  ZXEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM;  EI
5651 
 
5652 
                        -- ASL $xx,X (zero page indexed)
5653 
                        when  ZXASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5654 
                        when  ZXASL_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5655 
                        when  ZXASL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT;
5656 
                        when  ZXASL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5657 
 
5658 
                        -- LSR $xx,X (zero page indexed)
5659 
                        when  ZXLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5660 
                        when  ZXLSR_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5661 
                        when  ZXLSR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT;
5662 
                        when  ZXLSR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5663 
 
5664 
                        -- ROL $xx,X (zero page indexed)
5665 
                        when  ZXROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5666 
                        when  ZXROL_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5667 
                        when  ZXROL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT;
5668 
                        when  ZXROL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5669 
 
5670 
                        -- ROR $xx,X (zero page indexed)
5671 
                        when  ZXROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5672 
                        when  ZXROR_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5673 
                        when  ZXROR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT;
5674 
                        when  ZXROR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5675 
 
5676 
                        -- INC $xx,X (zero page indexed)
5677 
                        when  ZXINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5678 
                        when  ZXINC_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5679 
                        when  ZXINC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
5680 
                        when  ZXINC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5681 
 
5682 
                        -- DEC $xx,X (zero page indexed)
5683 
                        when  ZXDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5684 
                        when  ZXDEC_OP1 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O;
5685 
                        when  ZXDEC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
5686 
                        when  ZXDEC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
5687 
 
5688 
                        -- BIT $xx,X (zero page indexed)
5689 
                        when  ZXBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5690 
                        when  ZXBIT_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- A = A AND MEM;  EI
5691 
 
5692 
                        ------------------------------------
5693 
                        --          ZERO PAGE,Y           --
5694 
                        ------------------------------------
5695 
                        -- LDX $xx,Y (zero page indexed)
5696 
                        when  ZYLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5697 
                        when  ZYLDX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADDI & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; EI
5698 
 
5699 
                        -- STX $xx,Y (zero page indexed)
5700 
                        when  ZYSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & DOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+=D+O+X; PC+1;
5701 
                        when  ZYSTX_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADDI & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; EI
5702 
 
5703 
                        ------------------------------------
5704 
                        --           INDIRECT             --
5705 
                        ------------------------------------
5706 
                        -- JMP ($xxxx) (indirect)
5707 
                        when  INJMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5708 
                        when  INJMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5709 
                        when  INJMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
5710 
                        when  INJMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MEM->PC; O->PC; EI
5711 
 
5712 
                        -- JML ($xxxx) (indirect)
5713 
                        when  INJML_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5714 
                        when  INJML_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5715 
                        when  INJML_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
5716 
                        when  INJML_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MP->MEM; MEM->O; MP+1
5717 
                        when  INJML_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PBR; EI
5718 
 
5719 
                        ------------------------------------
5720 
                        --          INDIRECT,Y            --
5721 
                        ------------------------------------
5722 
                        -- LDA ($xx),Y (zeropage - indirect - indexed)
5723 
                        when  IYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5724 
                        when  IYLDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5725 
                        when  IYLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5726 
                        when  IYLDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
5727 
 
5728 
                        -- STA ($xx),Y (zeropage - indirect - indexed)
5729 
                        when  IYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5730 
                        when  IYSTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5731 
                        when  IYSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5732 
                        when  IYSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
5733 
 
5734 
                        -- ADC ($xx),Y (zeropage - indirect - indexed)
5735 
                        when  IYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5736 
                        when  IYADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5737 
                        when  IYADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5738 
                        when  IYADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
5739 
 
5740 
                        -- SBC ($xx),Y (zeropage - indirect - indexed)
5741 
                        when  IYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5742 
                        when  IYSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5743 
                        when  IYSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5744 
                        when  IYSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
5745 
 
5746 
                        -- CMP ($xx),Y (zeropage - indirect - indexed)
5747 
                        when  IYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5748 
                        when  IYCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5749 
                        when  IYCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5750 
                        when  IYCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
5751 
 
5752 
                        -- AND ($xx),Y (zeropage - indirect - indexed)
5753 
                        when  IYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5754 
                        when  IYAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5755 
                        when  IYAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5756 
                        when  IYAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
5757 
 
5758 
                        -- ORA ($xx),Y (zeropage - indirect - indexed)
5759 
                        when  IYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5760 
                        when  IYORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5761 
                        when  IYORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5762 
                        when  IYORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
5763 
 
5764 
                        -- EOR ($xx),Y (zeropage - indirect - indexed)
5765 
                        when  IYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
5766 
                        when  IYEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
5767 
                        when  IYEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ABY_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O+Y->MP
5768 
                        when  IYEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
5769 
 
5770 
                        ------------------------------------
5771 
                        --          INDIRECT,X            --
5772 
                        ------------------------------------
5773 
                        -- LDA ($xx,X) (zero page - indexed - indirect)
5774 
                        when  IXLDA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5775 
                        when  IXLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5776 
                        when  IXLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5777 
                        when  IXLDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI=1
5778 
 
5779 
                        -- STA ($xx,X) (zero page - indexed - indirect)
5780 
                        when  IXSTA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5781 
                        when  IXSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5782 
                        when  IXSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5783 
                        when  IXSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- A->MEM; EI=1
5784 
 
5785 
                        -- AND ($xx,X) (zero page - indexed - indirect)
5786 
                        when  IXAND_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5787 
                        when  IXAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5788 
                        when  IXAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5789 
                        when  IXAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- MP->MEM; A=A AND MEM; EI=1
5790 
 
5791 
                        -- ORA ($xx,X) (zero page - indexed - indirect)
5792 
                        when  IXORA_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5793 
                        when  IXORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5794 
                        when  IXORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5795 
                        when  IXORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- MP->MEM; A=A OR MEM; EI=1
5796 
 
5797 
                        -- EOR ($xx,X) (zero page - indexed - indirect)
5798 
                        when  IXEOR_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5799 
                        when  IXEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5800 
                        when  IXEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5801 
                        when  IXEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
5802 
 
5803 
                        -- ADC ($xx,X) (zero page - indexed - indirect)
5804 
                        when  IXADC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5805 
                        when  IXADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB;
5806 
                        when  IXADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5807 
                        when  IXADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
5808 
                        when  IXADC_OP4 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
5809 
 
5810 
                        -- SBC ($xx,X) (zero page - indexed - indirect)
5811 
                        when  IXSBC_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5812 
                        when  IXSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
5813 
                        when  IXSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5814 
                        when  IXSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
5815 
                        when  IXSBC_OP4 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
5816 
 
5817 
                        -- CMP ($xx,X) (zero page - indexed - indirect)
5818 
                        when  IXCMP_OP0 => q <= EXT_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ZPL_M & NOP_P & SWC_A & NOP_R & XRD_O; -- ZP+X->MP; PC+1
5819 
                        when  IXCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- O<=LSB; MP+=1
5820 
                        when  IXCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ALL_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP<=MSB & LSB (O)
5821 
                        when  IXCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM; A=A XOR MEM; EI=1
5822 
 
5823 
                        -- JMP ($xxxx,X) (absolute indexed - indirect)
5824 
                        when  IXJMP_OP0 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
5825 
                        when  IXJMP_OP1 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ALL_M & AUC_P & SWC_A & NOP_R & XRD_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
5826 
                        when  IXJMP_OP2 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ICC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MEM->A; MP_MSB+CARRY, EI
5827 
                        when  IXJMP_OP3 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
5828 
                        when  IXJMP_OP4 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
5829 
 
5830 
                        -- JSR ($xxxx,X) (absolute indexed - indirect)
5831 
                        when  IXJSR_OP0 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
5832 
                        when  IXJSR_OP1 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
5833 
                        when  IXJSR_OP2 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
5834 
                        when  IXJSR_OP3 => q <= ORD_D &'1'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ALL_M & AUC_P & SWC_A & NOP_R & XRD_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
5835 
                        when  IXJSR_OP4 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
5836 
                        when  IXJSR_OP5 => q <= ORD_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
5837 
 
5838 
                        ------------------------------------
5839 
                        --           ABSOLUTE             --
5840 
                        ------------------------------------
5841 
                        -- LDA $xxxx (absolute)
5842 
                        when  ABLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5843 
                        when  ABLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5844 
                        when  ABLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; PC+1
5845 
 
5846 
                        -- LDX $xxxx (absolute)
5847 
                        when  ABLDX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5848 
                        when  ABLDX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5849 
                        when  ABLDX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; PC+1
5850 
 
5851 
                        -- LDY $xxxx (absolute)
5852 
                        when  ABLDY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5853 
                        when  ABLDY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5854 
                        when  ABLDY_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->Y; PC+1
5855 
 
5856 
                        -- STA $xxxx (absolute)
5857 
                        when  ABSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5858 
                        when  ABSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5859 
                        when  ABSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
5860 
 
5861 
                        -- STX $xxxx (absolute)
5862 
                        when  ABSTX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5863 
                        when  ABSTX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5864 
                        when  ABSTX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & XRD_O; -- MP->MEM; X->MEM; PC+1
5865 
 
5866 
                        -- STY $xxxx (absolute)
5867 
                        when  ABSTY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5868 
                        when  ABSTY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5869 
                        when  ABSTY_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & YRD_O; -- MP->MEM; Y->MEM; PC+1
5870 
 
5871 
                        -- STZ $xxxx (absolute)
5872 
                        when  ABSTZ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5873 
                        when  ABSTZ_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5874 
                        when  ABSTZ_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; PC+1
5875 
 
5876 
                        -- JMP $xxxx (absolute)
5877 
                        when  ABJMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
5878 
                        when  ABJMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
5879 
 
5880 
                        -- JSR $xxxx (absolute)
5881 
                        when  ABJSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
5882 
                        when  ABJSR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
5883 
                        when  ABJSR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
5884 
                        when  ABJSR_OP3 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LOD_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->PC; O->PC; EI
5885 
 
5886 
                        -- BIT $xxxx (absolute)
5887 
                        when  ABBIT_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5888 
                        when  ABBIT_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5889 
                        when  ABBIT_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- MP->MEM; MEM->ALU; PC+1
5890 
 
5891 
                        -- ADC $xxxx (absolute)
5892 
                        when  ABADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5893 
                        when  ABADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5894 
                        when  ABADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
5895 
                        when  ABADC_OP3 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
5896 
 
5897 
                        -- SBC $xxxx (absolute)
5898 
                        when  ABSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5899 
                        when  ABSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5900 
                        when  ABSBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A-EXT; EI
5901 
                        when  ABSBC_OP3 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A-BCD ADJ (DAA); PC +1; EI
5902 
 
5903 
                        -- CMP $xxxx (absolute)
5904 
                        when  ABCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5905 
                        when  ABCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5906 
                        when  ABCMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
5907 
 
5908 
                        -- CPX $xxxx (absolute)
5909 
                        when  ABCPX_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5910 
                        when  ABCPX_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5911 
                        when  ABCPX_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & XRD_O; -- X-EXT; EI
5912 
 
5913 
                        -- CPY $xxxx (absolute)
5914 
                        when  ABCPY_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5915 
                        when  ABCPY_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5916 
                        when  ABCPY_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & YRD_O; -- Y-EXT; EI
5917 
 
5918 
                        -- ORA $xxxx (absolute)
5919 
                        when  ABORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5920 
                        when  ABORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5921 
                        when  ABORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
5922 
 
5923 
                        -- AND $xxxx (absolute)
5924 
                        when  ABAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5925 
                        when  ABAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5926 
                        when  ABAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
5927 
 
5928 
                        -- EOR $xxxx (absolute)
5929 
                        when  ABEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5930 
                        when  ABEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5931 
                        when  ABEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
5932 
 
5933 
                        -- ASL $xxxx (absolute)
5934 
                        when  ABASL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5935 
                        when  ABASL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5936 
                        when  ABASL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5937 
                        when  ABASL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT;
5938 
                        when  ABASL_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5939 
 
5940 
                        -- LSR $xxxx (absolute)
5941 
                        when  ABLSR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5942 
                        when  ABLSR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5943 
                        when  ABLSR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5944 
                        when  ABLSR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT;
5945 
                        when  ABLSR_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5946 
 
5947 
                        -- ROL $xxxx (absolute)
5948 
                        when  ABROL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5949 
                        when  ABROL_OP1 => q <= ORD_D &'0'&'0'&'1'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5950 
                        when  ABROL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5951 
                        when  ABROL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT;
5952 
                        when  ABROL_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5953 
 
5954 
                        -- ROR $xxxx (absolute)
5955 
                        when  ABROR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5956 
                        when  ABROR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5957 
                        when  ABROR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5958 
                        when  ABROR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT;
5959 
                        when  ABROR_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5960 
 
5961 
                        -- INC $xxxx (absolute)
5962 
                        when  ABINC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5963 
                        when  ABINC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5964 
                        when  ABINC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5965 
                        when  ABINC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
5966 
                        when  ABINC_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5967 
 
5968 
                        -- DEC $xxxx (absolute)
5969 
                        when  ABDEC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5970 
                        when  ABDEC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5971 
                        when  ABDEC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5972 
                        when  ABDEC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
5973 
                        when  ABDEC_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5974 
 
5975 
                        -- TSB $xxxx (absolute)
5976 
                        when  ABTSB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5977 
                        when  ABTSB_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5978 
                        when  ABTSB_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5979 
                        when  ABTSB_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
5980 
                        when  ABTSB_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & TSB_A & OLD_R & ARD_O; -- A OR O => O
5981 
                        when  ABTSB_OP5 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5982 
 
5983 
                        -- TRB $xxxx (absolute)
5984 
                        when  ABTRB_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & LSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- LSB->MP; PC+1
5985 
                        when  ABTRB_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MSB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MSB->MP; PC+1
5986 
                        when  ABTRB_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; PC+1
5987 
                        when  ABTRB_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & LDZ_P & AND_A & NOP_R & ARD_O; -- A AND O -> Z
5988 
                        when  ABTRB_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & TRB_A & OLD_R & ARD_O; -- A NAND O => O
5989 
                        when  ABTRB_OP5 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; PC+1
5990 
 
5991 
                        ------------------------------------
5992 
                        --          ABSOLUTE,X            --
5993 
                        ------------------------------------
5994 
              --                      DMUX: ALU operand #2 multiplexer
5995 
              --                      |       AI: effective address is indexed (X or Y)
5996 
              --                      |       |   VP: vector pull
5997 
              --                      |       |   |   ML: memory lock
5998 
              --                      |       |   |   |   VPA: vali program address
5999 
              --                      |       |   |   |   |   VDA: valid data address
6000 
              --                      |       |   |   |   |   |   EI: end of microcode sequence (the hidden extra cycle it's always executed after this microinstruction)
6001 
              --                      |       |   |   |   |   |   |   W: read/write control
6002 
              --                      |       |   |   |   |   |   |   |    CLI: clear interrupt request
6003 
              --                      |       |   |   |   |   |   |   |    |    PD: PC/MP address output multiplexer select
6004 
              --                      |       |   |   |   |   |   |   |    |    |      PCR: register PC (program counter)
6005 
              --                      |       |   |   |   |   |   |   |    |    |      |        MPR: register MP (memory pointer)
6006 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       P_OP: register P set/reset bit
6007 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       ALUOP: ALU operation
6008 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       REGOP: registers load/increment/decrement etc.
6009 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       RSEL: registers output multiplexer select
6010 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
6011 
              --                      |       |   |   |   |   |   |   |    |    |      |        |       |       |       |       |
6012 
                   --                      DMUX    AI  VP  ML VPA VDA  EI  W    CLI  PD     PCR      MPR     P_OP    ALUOP   REGOP   RSEL
6013 
                        -- LDA $xxxx,X (absolute indexed)
6014 
                        when  AXLDA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6015 
                        when  AXLDA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6016 
                        when  AXLDA_OP2 => q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6017 
 
6018 
                        -- LDY $xxxx,X (absolute indexed)
6019 
                        when  AXLDY_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6020 
                        when  AXLDY_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6021 
                        when  AXLDY_OP2 => q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & YLL_R & EXT_O; -- MP->MEM; MEM->A; EI
6022 
 
6023 
                        -- STA $xxxx,X (absolute indexed)
6024 
                        when  AXSTA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6025 
                        when  AXSTA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6026 
                        when  AXSTA_OP2 => q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
6027 
 
6028 
                        -- STZ $xxxx,X (absolute indexed)
6029 
                        when  AXSTZ_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6030 
                        when  AXSTZ_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6031 
                        when  AXSTZ_OP2 => q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & Z00_O; -- MP->MEM; 0->MEM; EI
6032 
 
6033 
                        -- ADC $xxxx,X (absolute indexed)
6034 
                        when  AXADC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6035 
                        when  AXADC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6036 
                        when  AXADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
6037 
 
6038 
                        -- SBC $xxxx,X (absolute indexed)
6039 
                        when  AXSBC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6040 
                        when  AXSBC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6041 
                        when  AXSBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT; EI
6042 
 
6043 
                        -- CMP $xxxx,X (absolute indexed)
6044 
                        when  AXCMP_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6045 
                        when  AXCMP_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6046 
                        when  AXCMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM; A-MEM MP_MSB+CARRY, EI
6047 
 
6048 
                        -- INC $xxxx,X (absolute indexed)
6049 
                        when  AXINC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6050 
                        when  AXINC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6051 
                        when  AXINC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6052 
                        when  AXINC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & INC_A & OLD_R & ORD_O; -- O = O +1
6053 
                        when  AXINC_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6054 
 
6055 
                        -- DEC $xxxx,X (absolute indexed)
6056 
                        when  AXDEC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6057 
                        when  AXDEC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6058 
                        when  AXDEC_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6059 
                        when  AXDEC_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & DEC_A & OLD_R & ORD_O; -- O = O -1
6060 
                        when  AXDEC_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6061 
 
6062 
                        -- ASL $xxxx,X (absolute indexed)
6063 
                        when  AXASL_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6064 
                        when  AXASL_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6065 
                        when  AXASL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6066 
                        when  AXASL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHL_A & OLD_R & ORD_O; -- O SHIFT LEFT
6067 
                        when  AXASL_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6068 
 
6069 
                        -- LSR $xxxx,X (absolute indexed)
6070 
                        when  AXLSR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6071 
                        when  AXLSR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6072 
                        when  AXLSR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6073 
                        when  AXLSR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & SHR_A & OLD_R & ORD_O; -- O SHIFT RIGHT
6074 
                        when  AXLSR_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6075 
 
6076 
                        -- ROL $xxxx,X (absolute indexed)
6077 
                        when  AXROL_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6078 
                        when  AXROL_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6079 
                        when  AXROL_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6080 
                        when  AXROL_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROL_A & OLD_R & ORD_O; -- O ROTATE LEFT
6081 
                        when  AXROL_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6082 
 
6083 
                        -- ROR $xxxx,X (absolute indexed)
6084 
                        when  AXROR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6085 
                        when  AXROR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6086 
                        when  AXROR_OP2 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O; EI
6087 
                        when  AXROR_OP3 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & ROR_A & OLD_R & ORD_O; -- O ROTATE RIGHT
6088 
                        when  AXROR_OP4 => q <= ORD_D &'0'&'0'&'1'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- MP->MEM; O->MEM; EI
6089 
 
6090 
                        -- AND $xxxx,X (absolute indexed)
6091 
                        when  AXAND_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6092 
                        when  AXAND_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6093 
                        when  AXAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- MP->MEM; EXT AND A; EI
6094 
 
6095 
                        -- ORA $xxxx,X (absolute indexed)
6096 
                        when  AXORA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6097 
                        when  AXORA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6098 
                        when  AXORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- MP->MEM; EXT OR A; EI
6099 
 
6100 
                        -- EOR $xxxx,X (absolute indexed)
6101 
                        when  AXEOR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6102 
                        when  AXEOR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6103 
                        when  AXEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- MP->MEM; EXT XOR A; EI
6104 
 
6105 
                        -- BIT $xxxx,X (absolute indexed)
6106 
                        when  AXBIT_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6107 
                        when  AXBIT_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+X->MP_LSB; PC+1;
6108 
                        when  AXBIT_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & BIT_A & NOP_R & ARD_O; -- MP->MEM; EXT BIT A; EI
6109 
 
6110 
                        ------------------------------------
6111 
                        --          ABSOLUTE,Y            --
6112 
                        ------------------------------------
6113 
                        -- LDA $xxxx,X (absolute indexed)
6114 
                        when  AYLDA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6115 
                        when  AYLDA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6116 
                        when  AYLDA_OP2 => q <= NOP_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6117 
 
6118 
                        -- LDX $xxxx,Y (absolute indexed)
6119 
                        when  AYLDX_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6120 
                        when  AYLDX_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6121 
                        when  AYLDX_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & ICC_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; MP_MSB+CARRY, EI
6122 
                        when  AYLDX_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & XLL_R & EXT_O; -- MP->MEM; MEM->X; EI
6123 
 
6124 
                        -- STA $xxxx,Y (absolute indexed)
6125 
                        when  AYSTA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6126 
                        when  AYSTA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6127 
                        when  AYSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ICC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; MP_MSB+CARRY, EI
6128 
                        when  AYSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
6129 
 
6130 
                        -- ADC $xxxx,Y (absolute indexed)
6131 
                        when  AYADC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6132 
                        when  AYADC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6133 
                        when  AYADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ICC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; A=A+EXT; MP_MSB+CARRY, EI
6134 
                        when  AYADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
6135 
                        when  AYADC_OP4 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAA_A & ALL_R & ARD_O; -- A=A+BCD ADJ (DAA); PC +1; EI
6136 
 
6137 
                        -- SBC $xxxx,Y (absolute indexed)
6138 
                        when  AYSBC_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6139 
                        when  AYSBC_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6140 
                        when  AYSBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ICC_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP->MEM; A=A-EXT; MP_MSB+CARRY, EI
6141 
                        when  AYSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
6142 
                        when  AYSBC_OP4 => q <= BCD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & FLV_P & DAS_A & ALL_R & ARD_O; -- A=A-BCD ADJ (DAS); PC +1; EI
6143 
 
6144 
                        -- CMP $xxxx,Y (absolute indexed)
6145 
                        when  AYCMP_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6146 
                        when  AYCMP_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6147 
                        when  AYCMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & ICC_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM; A-MEM MP_MSB+CARRY, EI
6148 
                        when  AYCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM; A-MEM; EI
6149 
 
6150 
                        -- AND $xxxx,Y (absolute indexed)
6151 
                        when  AYAND_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6152 
                        when  AYAND_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6153 
                        when  AYAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & ICC_M & FLD_P & AND_A & ALL_R & ARD_O; -- MP->MEM; EXT AND A; MP_MSB+CARRY, EI
6154 
                        when  AYAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- MP->MEM; EXT AND A; EI
6155 
 
6156 
                        -- ORA $xxxx,Y (absolute indexed)
6157 
                        when  AYORA_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6158 
                        when  AYORA_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6159 
                        when  AYORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & ICC_M & FLD_P &  OR_A & ALL_R & ARD_O; -- MP->MEM; EXT OR A; MP_MSB+CARRY, EI
6160 
                        when  AYORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- MP->MEM; EXT OR A; EI
6161 
 
6162 
                        -- EOR $xxxx,Y (absolute indexed)
6163 
                        when  AYEOR_OP0 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6164 
                        when  AYEOR_OP1 => q <= NOP_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & ABY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->MP_MSB; MEM->O+Y->MP_LSB; PC+1;
6165 
                        when  AYEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & ICC_M & FLD_P & XOR_A & ALL_R & ARD_O; -- MP->MEM; EXT XOR A; MP_MSB+CARRY, EI
6166 
                        when  AYEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- MP->MEM; EXT XOR A; EI
6167 
 
6168 
                        --------------------------------------
6169 
                        --          ABSOLUTE LONG           --
6170 
                        --------------------------------------
6171 
                        -- JML $xxxxxx (absolute long)
6172 
                        when  ABJML_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6173 
                        when  ABJML_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6174 
                        when  ABJML_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PRB; EI
6175 
 
6176 
                        -- JSL $xxxxxx (absolute long)
6177 
                        when  ABJSL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6178 
                        when  ABJSL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6179 
                        when  ABJSL_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & KRD_O; -- PBR->S; SP-1;
6180 
                        when  ABJSL_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PHR_O; -- PCH->S; SP-1;
6181 
                        when  ABJSL_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & PLR_O; -- PCL->S; SP-1;
6182 
                        when  ABJSL_OP5 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & LML_PC & NOP_M & NOP_P & NOP_A & KLD_R & EXT_O; -- O->PC; EXT->PBR; EI
6183 
 
6184 
                        ------------------------------------
6185 
                        --            RELATIVE            --
6186 
                        ------------------------------------
6187 
                        -- BRA xx
6188 
                        when    BRA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6189 
 
6190 
                        -- BEQ xx
6191 
                        when    BEQ_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6192 
 
6193 
                        -- BNE xx
6194 
                        when    BNE_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6195 
 
6196 
                        -- BCC xx
6197 
                        when    BCC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6198 
 
6199 
                        -- BCS xx
6200 
                        when    BCS_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6201 
 
6202 
                        -- BVC xx
6203 
                        when    BVC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6204 
 
6205 
                        -- BVS xx
6206 
                        when    BVS_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6207 
 
6208 
                        -- BPL xx
6209 
                        when    BPL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6210 
 
6211 
                        -- BMI xx
6212 
                        when    BMI_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRA_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset;
6213 
 
6214 
                        -----------------------------------------
6215 
                        --            RELATIVE LONG            --
6216 
                        -----------------------------------------
6217 
                        -- BRL xxxx
6218 
                        when    BRL_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb offset);
6219 
                        when    BRL_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'1'& RDE &'0'& ADPC & BRL_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- PC +1 + offset
6220 
 
6221 
         -------------------------------
6222 
         --           STACK           --
6223 
         -------------------------------
6224 
         -- PEA xxxx
6225 
         when    PEA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; PC+1
6226 
         when    PEA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; PC+1
6227 
                        when    PEA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
6228 
                        when    PEA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
6229 
 
6230 
         -- PEI xx
6231 
                        when    PEI_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6232 
                        when    PEI_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6233 
                        when    PEI_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6234 
                        when    PEI_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
6235 
                        when    PEI_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
6236 
 
6237 
         -- PER xxxx
6238 
                        when    PER_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MP->MEM; MEM->O (lsb offset);
6239 
                        when    PER_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (msb offset)
6240 
                        when    PER_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & SWC_A & O16_R & PCR_O; -- O = O + PC
6241 
                        when    PER_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & OMD_O; -- O (msb) ->S; SP-1;
6242 
                        when    PER_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADSP & NOP_PC & NOP_M & NOP_P & NOP_A & SDW_R & ORD_O; -- O (lsb) ->S; SP-1;
6243 
 
6244 
                        ----------------------------------
6245 
                        --          DIRECT,Y            --
6246 
                        ----------------------------------
6247 
                        -- LDA [$xx],Y (zeropage - direct long - indexed)
6248 
                        when  DYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6249 
                        when  DYLDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6250 
                        when  DYLDA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6251 
                        when  DYLDA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6252 
                        when  DYLDA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6253 
                        when  DYLDA_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6254 
 
6255 
                        -- STA [$xx],Y (zeropage - indirect long - indexed)
6256 
                        when  DYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6257 
                        when  DYSTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6258 
                        when  DYSTA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6259 
                        when  DYSTA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6260 
                        when  DYSTA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6261 
                        when  DYSTA_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
6262 
 
6263 
                        -- ADC [$xx],Y (zeropage - indirect long - indexed)
6264 
                        when  DYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6265 
                        when  DYADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6266 
                        when  DYADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6267 
                        when  DYADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6268 
                        when  DYADC_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6269 
                        when  DYADC_OP5 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
6270 
 
6271 
                        -- SBC [$xx],Y (zeropage - indirect long - indexed)
6272 
                        when  DYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6273 
                        when  DYSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6274 
                        when  DYSBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6275 
                        when  DYSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6276 
                        when  DYSBC_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6277 
                        when  DYSBC_OP5 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
6278 
 
6279 
                        -- CMP [$xx],Y (zeropage - indirect long - indexed)
6280 
                        when  DYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6281 
                        when  DYCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6282 
                        when  DYCMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6283 
                        when  DYCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6284 
                        when  DYCMP_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6285 
                        when  DYCMP_OP5 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
6286 
 
6287 
                        -- AND [$xx],Y (zeropage - indirect long - indexed)
6288 
                        when  DYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6289 
                        when  DYAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6290 
                        when  DYAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6291 
                        when  DYAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6292 
                        when  DYAND_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6293 
                        when  DYAND_OP5 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
6294 
 
6295 
                        -- ORA [$xx],Y (zeropage - indirect long - indexed)
6296 
                        when  DYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6297 
                        when  DYORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6298 
                        when  DYORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6299 
                        when  DYORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6300 
                        when  DYORA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6301 
                        when  DYORA_OP5 => q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
6302 
 
6303 
                        -- EOR [$xx],Y (zeropage - indirect long - indexed)
6304 
                        when  DYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6305 
                        when  DYEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6306 
                        when  DYEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6307 
                        when  DYEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6308 
                        when  DYEOR_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & ADY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6309 
                        when  DYEOR_OP5 => q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
6310 
 
6311 
                        --------------------------------
6312 
                        --          DIRECT            --
6313 
                        --------------------------------
6314 
                        -- LDA [$xx] (zeropage - direct long)
6315 
                        when  DILDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6316 
                        when  DILDA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6317 
                        when  DILDA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6318 
                        when  DILDA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6319 
                   when  DILDA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6320 
 
6321 
                        -- STA [$xx] (zeropage - indirect long)
6322 
                        when  DISTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6323 
                        when  DISTA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6324 
                        when  DISTA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6325 
                        when  DISTA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6326 
                        when  DISTA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; EI
6327 
 
6328 
                        -- ADC [$xx] (zeropage - indirect long)
6329 
                        when  DIADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6330 
                        when  DIADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6331 
                        when  DIADC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6332 
                        when  DIADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6333 
                        when  DIADC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- MP->MEM; A=A+EXT
6334 
 
6335 
                        -- SBC [$xx] (zeropage - indirect long)
6336 
                        when  DISBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6337 
                        when  DISBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6338 
                        when  DISBC_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6339 
                        when  DISBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6340 
                        when  DISBC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- MP->MEM; A=A-EXT
6341 
 
6342 
                        -- CMP [$xx] (zeropage - indirect long)
6343 
                        when  DICMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6344 
                        when  DICMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6345 
                        when  DICMP_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6346 
                        when  DICMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6347 
                        when  DICMP_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- MP->MEM;  A-MEM; EI
6348 
 
6349 
                        -- AND [$xx] (zeropage - indirect long)
6350 
                        when  DIAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6351 
                        when  DIAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6352 
                        when  DIAND_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6353 
                        when  DIAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6354 
                        when  DIAND_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A = A AND MEM; EI
6355 
 
6356 
                        -- ORA [$xx] (zeropage - indirect long)
6357 
                        when  DIORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6358 
                        when  DIORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6359 
                        when  DIORA_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6360 
                        when  DIORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6361 
                        when  DIORA_OP4 => q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A = A OR MEM; EI
6362 
 
6363 
                        -- EOR [$xx] (zeropage - indirect long)
6364 
                        when  DIEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & ZPL_M & NOP_P & NOP_A & NOP_R & EXT_O; -- ZP->MP; PC+1
6365 
                        when  DIEOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & INC_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; (LSB POINTER)
6366 
                        when  DIEOR_OP2 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MEM->O; (MSB POINTER)
6367 
                        when  DIEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MEM->B
6368 
                        when  DIEOR_OP4 => q <= EXT_D &'1'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A = A XOR MEM; EI
6369 
 
6370 
                        ----------------------------------------
6371 
                        --           ABSOLUTE LONG            --
6372 
                        ----------------------------------------
6373 
                        -- LDA $xxxxxx (absolute long)
6374 
                        when  ALLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6375 
                        when  ALLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6376 
                        when  ALLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6377 
                        when  ALLDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A
6378 
 
6379 
                        -- STA $xxxxxx (absolute long)
6380 
                        when  ALSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6381 
                        when  ALSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6382 
                        when  ALSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6383 
                        when  ALSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM;
6384 
 
6385 
                        -- ADC $xxxxxx (absolute long)
6386 
                        when  ALADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6387 
                        when  ALADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6388 
                        when  ALADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6389 
                        when  ALADC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
6390 
 
6391 
                        -- SBC $xxxxxx (absolute long)
6392 
                        when  ALSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6393 
                        when  ALSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6394 
                        when  ALSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6395 
                        when  ALSBC_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
6396 
 
6397 
                        -- CMP $xxxxxx (absolute long)
6398 
                        when  ALCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6399 
                        when  ALCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6400 
                        when  ALCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6401 
                        when  ALCMP_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
6402 
 
6403 
                        -- ORA $xxxxxx (absolute long)
6404 
                        when  ALORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6405 
                        when  ALORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6406 
                        when  ALORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6407 
                        when  ALORA_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
6408 
 
6409 
                        -- AND $xxxxxx (absolute long)
6410 
                        when  ALAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6411 
                        when  ALAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6412 
                        when  ALAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6413 
                        when  ALAND_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
6414 
 
6415 
                        -- EOR $xxxxxx (absolute long)
6416 
                        when  ALEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6417 
                        when  ALEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6418 
                        when  ALEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6419 
                        when  ALEOR_OP3 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
6420 
 
6421 
                        ------------------------------------------
6422 
                        --           ABSOLUTE LONG,X            --
6423 
                        ------------------------------------------
6424 
                        -- LDA $xxxxxx,X (absolute long indexed X)
6425 
                        when  AILDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6426 
                        when  AILDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6427 
                        when  AILDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6428 
                        when  AILDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6429 
                        when  AILDA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A (lsb);
6430 
 
6431 
                        -- STA $xxxxxx,X (absolute long indexed X)
6432 
                        when  AISTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6433 
                        when  AISTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6434 
                        when  AISTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6435 
                        when  AISTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6436 
                        when  AISTA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
6437 
 
6438 
                        -- ADC $xxxxxx,X (absolute long indexed X)
6439 
                        when  AIADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6440 
                        when  AIADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6441 
                        when  AIADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6442 
                        when  AIADC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6443 
                        when  AIADC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
6444 
 
6445 
                        -- SBC $xxxxxx,X (absolute long indexed X)
6446 
                        when  AISBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6447 
                        when  AISBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6448 
                        when  AISBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6449 
                        when  AISBC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6450 
                        when  AISBC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
6451 
 
6452 
                        -- CMP $xxxxxx,X (absolute long indexed X)
6453 
                        when  AICMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6454 
                        when  AICMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6455 
                        when  AICMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6456 
                        when  AICMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6457 
                        when  AICMP_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
6458 
 
6459 
                        -- ORA $xxxxxx,X (absolute long indexed X)
6460 
                        when  AIORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6461 
                        when  AIORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6462 
                        when  AIORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6463 
                        when  AIORA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6464 
                        when  AIORA_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
6465 
 
6466 
                        -- AND $xxxxxx,X (absolute long indexed X)
6467 
                        when  AIAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6468 
                        when  AIAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6469 
                        when  AIAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6470 
                        when  AIAND_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6471 
                        when  AIAND_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
6472 
 
6473 
                        -- EOR $xxxxxx,X (absolute long indexed X)
6474 
                        when  AIEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; PC+1
6475 
                        when  AIEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O; PC+1
6476 
                        when  AIEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & MHB_M & NOP_P & NOP_A & NOP_R & EXT_O; -- HIGH->MP; PC+1
6477 
                        when  AIEOR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & ADX_M & NOP_P & NOP_A & NOP_R & EXT_O; -- O+Y->MP (24 bit)
6478 
                        when  AIEOR_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
6479 
 
6480 
                        ----------------------------------------
6481 
                        --          STACK RELATIVE            --
6482 
                        ----------------------------------------
6483 
                        -- LDA $xx,S (S + offset)
6484 
                        when  SRLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6485 
                        when  SRLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6486 
 
6487 
                        -- STA $xx,S (S + offset)
6488 
                        when  SRSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6489 
                        when  SRSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
6490 
 
6491 
                        -- ADC $xx,S (S + offset)
6492 
                        when  SRADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6493 
                        when  SRADC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
6494 
 
6495 
                        -- SBC $xx,S (S + offset)
6496 
                        when  SRSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6497 
                        when  SRSBC_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
6498 
 
6499 
                        -- CMP $xx,S (S + offset)
6500 
                        when  SRCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6501 
                        when  SRCMP_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
6502 
 
6503 
                        -- ORA $xx,S (S + offset)
6504 
                        when  SRORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6505 
                        when  SRORA_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
6506 
 
6507 
                        -- AND $xx,S (S + offset)
6508 
                        when  SRAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6509 
                        when  SRAND_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
6510 
 
6511 
                        -- EOR $xx,S (S + offset)
6512 
                        when  SREOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6513 
                        when  SREOR_OP1 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
6514 
 
6515 
                        -------------------------------------------------
6516 
                        --          STACK RELATIVE INDEXED Y           --
6517 
                        -------------------------------------------------
6518 
                        -- LDA ($xx,S),Y
6519 
                        when  SYLDA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6520 
                        when  SYLDA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6521 
                        when  SYLDA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6522 
                        when  SYLDA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6523 
                        when  SYLDA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & NOP_A & ALL_R & EXT_O; -- MP->MEM; MEM->A; EI
6524 
 
6525 
                        -- STA ($xx,S),Y
6526 
                        when  SYSTA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6527 
                        when  SYSTA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6528 
                        when  SYSTA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6529 
                        when  SYSTA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6530 
                        when  SYSTA_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'1'& WRE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ARD_O; -- MP->MEM; A->MEM; PC+1
6531 
 
6532 
                        -- ADC ($xx,S),Y
6533 
                        when  SYADC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6534 
                        when  SYADC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6535 
                        when  SYADC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6536 
                        when  SYADC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6537 
                        when  SYADC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUM_A & ALL_R & ARD_O; -- A=A+EXT; EI
6538 
 
6539 
                        -- SBC ($xx,S),Y
6540 
                        when  SYSBC_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6541 
                        when  SYSBC_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6542 
                        when  SYSBC_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6543 
                        when  SYSBC_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6544 
                        when  SYSBC_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLV_P & SUB_A & ALL_R & ARD_O; -- A=A+EXT; EI
6545 
 
6546 
                        -- CMP ($xx,S),Y
6547 
                        when  SYCMP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6548 
                        when  SYCMP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6549 
                        when  SYCMP_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6550 
                        when  SYCMP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6551 
                        when  SYCMP_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLC_P & CMP_A & NOP_R & ARD_O; -- A-EXT; EI
6552 
 
6553 
                        -- ORA ($xx,S),Y
6554 
                        when  SYORA_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6555 
                        when  SYORA_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6556 
                        when  SYORA_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6557 
                        when  SYORA_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6558 
                        when  SYORA_OP5 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P &  OR_A & ALL_R & ARD_O; -- A=A OR MEM; EI
6559 
 
6560 
                        -- AND ($xx,S),Y
6561 
                        when  SYAND_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6562 
                        when  SYAND_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6563 
                        when  SYAND_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6564 
                        when  SYAND_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6565 
                        when  SYAND_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & AND_A & ALL_R & ARD_O; -- A=A AND MEM; EI
6566 
 
6567 
                        -- EOR ($xx,S),Y
6568 
                        when  SYEOR_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & AOS_M & NOP_P & NOP_A & NOP_R & EXT_O; -- S+OFFSET->MP; PC+1
6569 
                        when  SYEOR_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & INC_M & NOP_P & NOP_A & OLD_R & EXT_O; -- LSB->O; MP+1
6570 
                        when  SYEOR_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADMP & NOP_PC & NOP_M & NOP_P & NOP_A & OMD_R & EXT_O; -- MSB->O;
6571 
                        when  SYEOR_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADMP & NOP_PC & AOY_M & NOP_P & NOP_A & NOP_R & EXT_O; -- MP+O+Y
6572 
                        when  SYEOR_OP4 => q <= EXT_D &'0'&'0'&'0'&'0'&'1'&'1'& RDE &'0'& ADMP & NOP_PC & NOP_M & FLD_P & XOR_A & ALL_R & ARD_O; -- A=A XOR MEM; EI
6573 
 
6574 
                        ------------------------------------
6575 
                        --          MOVE BLOCK            --
6576 
                        ------------------------------------
6577 
         when  MBMVN_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (source)
6578 
                        when  MBMVN_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADXR & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; read byte
6579 
         when  MBMVN_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (destination)
6580 
         when  MBMVN_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADYR & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O->MEM; write byte
6581 
         when  MBMVN_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MVN_R & EXT_O; -- X +1; Y +1; A -1;
6582 
         when  MBMVN_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & DE3_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- check for A = $FFFF
6583 
 
6584 
         when  MBMVP_OP0 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (source)
6585 
                        when  MBMVP_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& RDE &'0'& ADXR & NOP_PC & NOP_M & NOP_P & NOP_A & OLD_R & EXT_O; -- MEM->O; read byte
6586 
         when  MBMVP_OP2 => q <= ORD_D &'0'&'0'&'0'&'1'&'0'&'0'& RDE &'0'& ADPC & INC_PC & NOP_M & NOP_P & NOP_A & BLD_R & EXT_O; -- MEM->DBR (destination)
6587 
         when  MBMVP_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'1'&'0'& WRE &'0'& ADYR & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & ORD_O; -- O->MEM; write byte
6588 
         when  MBMVP_OP4 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MVP_R & EXT_O; -- X -1; Y -1; A -1;
6589 
         when  MBMVP_OP5 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & DE3_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- check for A = $FFFF
6590 
 
6591 
                        ----------------------------------
6592 
                        --          MULTIPLY            --
6593 
                        ----------------------------------
6594 
                when    MPU_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUI_R & EXT_O; -- load A/B & X on multiplier
6595 
                        when    MPU_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUS_R & EXT_O; -- start multiplication (unsigned)
6596 
                        when    MPU_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & MUF_P & NOP_A & MUL_R & EXT_O; -- load result on A/B and X
6597 
                        when    MPU_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- EI
6598 
 
6599 
                        when    MPS_OP0 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MUI_R & EXT_O; -- load A/B & X on multiplier
6600 
                        when    MPS_OP1 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & MSS_R & EXT_O; -- start multiplication (signed)
6601 
                        when    MPS_OP2 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'0'& RDE &'0'& ADPC & NOP_PC & NOP_M & MSF_P & NOP_A & MUL_R & EXT_O; -- load result on A/B and X
6602 
                        when    MPS_OP3 => q <= ORD_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & WDC_P & NOP_A & NOP_R & EXT_O; -- EI
6603 
 
6604 
                        when    others  => q <= NOP_D &'0'&'0'&'0'&'0'&'0'&'1'& RDE &'0'& ADPC & NOP_PC & NOP_M & NOP_P & NOP_A & NOP_R & EXT_O; -- EI
6605 
                 end case;
6606 
          end if;
6607 
  end process;
6608 
end comb;
6609 
 
6610 
 

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