URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [logic.v] - Blame information for rev 79

Go to most recent revision | Details | Compare with Previous | View Log


//////////////////////////////////////////////////////////////////////
////                                                              ////
////  Logic functions                                             ////
////                                                              ////
////  Description                                                 ////
////  Logic functions such as multiplexers                        ////
////                                                              ////
////                                                              ////
////  To Do:                                                      ////
////   -                                                          ////
////                                                              ////
////  Author(s):                                                  ////
////      - Michael Unneback, unneback@opencores.org              ////
////        ORSoC AB                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2010 Authors and OPENCORES.ORG                 ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
`ifdef MUX_ANDOR
`define MODULE mux_andor
module `BASE`MODULE ( a, sel, dout);
`undef MODULE
 
parameter width = 32;
parameter nr_of_ports = 4;
 
input [nr_of_ports*width-1:0] a;
input [nr_of_ports-1:0] sel;
output reg [width-1:0] dout;
 
integer i,j;
 
always @ (a, sel)
begin
    dout = a[width-1:0] & {width{sel[0]}};
    for (i=1;i<nr_of_ports;i=i+1)
        for (j=0;j<width;j=j+1)
            dout[j] = (a[i*width + j] & sel[i]) | dout[j];
end
 
endmodule
`endif
 
`ifdef MUX2_ANDOR
`define MODULE mux2_andor
module `BASE`MODULE ( a1, a0, sel, dout);
`undef MODULE
 
parameter width = 32;
localparam nr_of_ports = 2;
input [width-1:0] a1, a0;
input [nr_of_ports-1:0] sel;
output [width-1:0] dout;
 
`define MODULE mux_andor
`BASE`MODULE
    # ( .width(width), .nr_of_ports(nr_of_ports))
    mux0( .a({a1,a0}), .sel(sel), .dout(dout));
`undef MODULE
 
endmodule
`endif
 
`ifdef MUX3_ANDOR
`define MODULE mux3_andor
module `BASE`MODULE ( a2, a1, a0, sel, dout);
`undef MODULE
 
parameter width = 32;
localparam nr_of_ports = 3;
input [width-1:0] a2, a1, a0;
input [nr_of_ports-1:0] sel;
output [width-1:0] dout;
 
`define MODULE mux_andor
`BASE`MODULE
    # ( .width(width), .nr_of_ports(nr_of_ports))
    mux0( .a({a2,a1,a0}), .sel(sel), .dout(dout));
`undef MODULE
endmodule
`endif
 
`ifdef MUX4_ANDOR
`define MODULE mux4_andor
module `BASE`MODULE ( a3, a2, a1, a0, sel, dout);
`undef MODULE
 
parameter width = 32;
localparam nr_of_ports = 4;
input [width-1:0] a3, a2, a1, a0;
input [nr_of_ports-1:0] sel;
output [width-1:0] dout;
 
`define MODULE mux_andor
`BASE`MODULE
    # ( .width(width), .nr_of_ports(nr_of_ports))
    mux0( .a({a3,a2,a1,a0}), .sel(sel), .dout(dout));
`undef MODULE
 
endmodule
`endif
 
`ifdef MUX5_ANDOR
`define MODULE mux5_andor
module `BASE`MODULE ( a4, a3, a2, a1, a0, sel, dout);
`undef MODULE
 
parameter width = 32;
localparam nr_of_ports = 5;
input [width-1:0] a4, a3, a2, a1, a0;
input [nr_of_ports-1:0] sel;
output [width-1:0] dout;
 
`define MODULE mux_andor
`BASE`MODULE
    # ( .width(width), .nr_of_ports(nr_of_ports))
    mux0( .a({a4,a3,a2,a1,a0}), .sel(sel), .dout(dout));
`undef MODULE
 
endmodule
`endif
 
`ifdef MUX6_ANDOR
`define MODULE mux6_andor
module `BASE`MODULE ( a5, a4, a3, a2, a1, a0, sel, dout);
`undef MODULE
 
parameter width = 32;
localparam nr_of_ports = 6;
input [width-1:0] a5, a4, a3, a2, a1, a0;
input [nr_of_ports-1:0] sel;
output [width-1:0] dout;
 
`define MODULE mux_andor
`BASE`MODULE
    # ( .width(width), .nr_of_ports(nr_of_ports))
    mux0( .a({a5,a4,a3,a2,a1,a0}), .sel(sel), .dout(dout));
`undef MODULE
 
endmodule
`endif
 
`ifdef PARITY
 
`define MODULE parity_generate
module `BASE`MODULE (data, parity);
`undef MODULE
parameter word_size = 32;
parameter chunk_size = 8;
parameter parity_type = 1'b0; // 0 - even, 1 - odd parity
input [word_size-1:0] data;
output reg [word_size/chunk_size-1:0] parity;
integer i,j;
always @ (data)
for (i=0;i<word_size/chunk_size;i=i+1) begin
    parity[i] = parity_type;
    for (j=0;j<chunk_size;j=j+1) begin
        parity[i] = data[i*chunk_size+j] ^ parity[i];
    end
end
endmodule
 
`define MODULE parity_check
module `BASE`MODULE( data, parity, parity_error);
`undef MODULE
parameter word_size = 32;
parameter chunk_size = 8;
parameter parity_type = 1'b0; // 0 - even, 1 - odd parity
input [word_size-1:0] data;
input [word_size/chunk_size-1:0] parity;
output parity_error;
reg [word_size/chunk_size-1:0] error_flag;
integer i,j;
always @ (data or parity)
for (i=0;i<word_size/chunk_size;i=i+1) begin
    error_flag[i] = parity[i] ^ parity_type;
    for (j=0;j<chunk_size;j=j+1) begin
        error_flag[i] = data[i*chunk_size+j] ^ error_flag[i];
    end
end
assign parity_error = |error_flag;
endmodule
 
`endif

Line No.	Rev	Author	Line
1	32	unneback	`//////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// Logic functions ////`
4			`//// ////`
5			`//// Description ////`
6			`//// Logic functions such as multiplexers ////`
7			`//// ////`
8			`//// ////`
9			`//// To Do: ////`
10			`//// - ////`
11			`//// ////`
12			`//// Author(s): ////`
13			`//// - Michael Unneback, unneback@opencores.org ////`
14			`//// ORSoC AB ////`
15			`//// ////`
16			`//////////////////////////////////////////////////////////////////////`
17			`//// ////`
18			`//// Copyright (C) 2010 Authors and OPENCORES.ORG ////`
19			`//// ////`
20			`//// This source file may be used and distributed without ////`
21			`//// restriction provided that this copyright statement is not ////`
22			`//// removed from the file and that any derivative work contains ////`
23			`//// the original copyright notice and the associated disclaimer. ////`
24			`//// ////`
25			`//// This source file is free software; you can redistribute it ////`
26			`//// and/or modify it under the terms of the GNU Lesser General ////`
27			`//// Public License as published by the Free Software Foundation; ////`
28			`//// either version 2.1 of the License, or (at your option) any ////`
29			`//// later version. ////`
30			`//// ////`
31			`//// This source is distributed in the hope that it will be ////`
32			`//// useful, but WITHOUT ANY WARRANTY; without even the implied ////`
33			`//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////`
34			`//// PURPOSE. See the GNU Lesser General Public License for more ////`
35			`//// details. ////`
36			`//// ////`
37			`//// You should have received a copy of the GNU Lesser General ////`
38			`//// Public License along with this source; if not, download it ////`
39			`//// from http://www.opencores.org/lgpl.shtml ////`
40			`//// ////`
41			`//////////////////////////////////////////////////////////////////////`
42	40	unneback	`ifdef MUX_ANDOR
43			`define MODULE mux_andor
44			module `BASE`MODULE ( a, sel, dout);
45			`undef MODULE
46	36	unneback
47			`parameter width = 32;`
48			`parameter nr_of_ports = 4;`
49
50			`input [nr_of_ports*width-1:0] a;`
51			`input [nr_of_ports-1:0] sel;`
52			`output reg [width-1:0] dout;`
53
54	38	unneback	`integer i,j;`
55
56	36	unneback	`always @ (a, sel)`
57			`begin`
58			`dout = a[width-1:0] & {width{sel[0]}};`
59	42	unneback	`for (i=1;i<nr_of_ports;i=i+1)`
60			`for (j=0;j<width;j=j+1)`
61			`dout[j] = (a[i*width + j] & sel[i]) \| dout[j];`
62	36	unneback	`end`
63
64			`endmodule`
65	40	unneback	`endif
66	36	unneback
67	40	unneback	`ifdef MUX2_ANDOR
68			`define MODULE mux2_andor
69			module `BASE`MODULE ( a1, a0, sel, dout);
70			`undef MODULE
71	32	unneback
72	34	unneback	`parameter width = 32;`
73	35	unneback	`localparam nr_of_ports = 2;`
74	34	unneback	`input [width-1:0] a1, a0;`
75			`input [nr_of_ports-1:0] sel;`
76			`output [width-1:0] dout;`
77
78	40	unneback	`define MODULE mux_andor
79			`BASE`MODULE
80	38	unneback	`# ( .width(width), .nr_of_ports(nr_of_ports))`
81	36	unneback	`mux0( .a({a1,a0}), .sel(sel), .dout(dout));`
82	40	unneback	`undef MODULE
83
84	34	unneback	`endmodule`
85	40	unneback	`endif
86	34	unneback
87	40	unneback	`ifdef MUX3_ANDOR
88			`define MODULE mux3_andor
89			module `BASE`MODULE ( a2, a1, a0, sel, dout);
90			`undef MODULE
91	34	unneback
92			`parameter width = 32;`
93	35	unneback	`localparam nr_of_ports = 3;`
94	34	unneback	`input [width-1:0] a2, a1, a0;`
95			`input [nr_of_ports-1:0] sel;`
96			`output [width-1:0] dout;`
97
98	40	unneback	`define MODULE mux_andor
99			`BASE`MODULE
100	38	unneback	`# ( .width(width), .nr_of_ports(nr_of_ports))`
101	36	unneback	`mux0( .a({a2,a1,a0}), .sel(sel), .dout(dout));`
102	40	unneback	`undef MODULE
103	34	unneback	`endmodule`
104	40	unneback	`endif
105	34	unneback
106	40	unneback	`ifdef MUX4_ANDOR
107			`define MODULE mux4_andor
108			module `BASE`MODULE ( a3, a2, a1, a0, sel, dout);
109			`undef MODULE
110	32	unneback
111			`parameter width = 32;`
112	35	unneback	`localparam nr_of_ports = 4;`
113	32	unneback	`input [width-1:0] a3, a2, a1, a0;`
114			`input [nr_of_ports-1:0] sel;`
115			`output [width-1:0] dout;`
116
117	40	unneback	`define MODULE mux_andor
118			`BASE`MODULE
119	38	unneback	`# ( .width(width), .nr_of_ports(nr_of_ports))`
120	36	unneback	`mux0( .a({a3,a2,a1,a0}), .sel(sel), .dout(dout));`
121	40	unneback	`undef MODULE
122	32	unneback
123			`endmodule`
124	40	unneback	`endif
125	32	unneback
126	40	unneback	`ifdef MUX5_ANDOR
127			`define MODULE mux5_andor
128			module `BASE`MODULE ( a4, a3, a2, a1, a0, sel, dout);
129			`undef MODULE
130	32	unneback
131			`parameter width = 32;`
132	35	unneback	`localparam nr_of_ports = 5;`
133	32	unneback	`input [width-1:0] a4, a3, a2, a1, a0;`
134			`input [nr_of_ports-1:0] sel;`
135			`output [width-1:0] dout;`
136
137	40	unneback	`define MODULE mux_andor
138			`BASE`MODULE
139	38	unneback	`# ( .width(width), .nr_of_ports(nr_of_ports))`
140	36	unneback	`mux0( .a({a4,a3,a2,a1,a0}), .sel(sel), .dout(dout));`
141	40	unneback	`undef MODULE
142	32	unneback
143			`endmodule`
144	40	unneback	`endif
145	32	unneback
146	40	unneback	`ifdef MUX6_ANDOR
147			`define MODULE mux6_andor
148			module `BASE`MODULE ( a5, a4, a3, a2, a1, a0, sel, dout);
149			`undef MODULE
150	32	unneback
151			`parameter width = 32;`
152	35	unneback	`localparam nr_of_ports = 6;`
153	32	unneback	`input [width-1:0] a5, a4, a3, a2, a1, a0;`
154			`input [nr_of_ports-1:0] sel;`
155			`output [width-1:0] dout;`
156
157	40	unneback	`define MODULE mux_andor
158			`BASE`MODULE
159	38	unneback	`# ( .width(width), .nr_of_ports(nr_of_ports))`
160	36	unneback	`mux0( .a({a5,a4,a3,a2,a1,a0}), .sel(sel), .dout(dout));`
161	40	unneback	`undef MODULE
162	32	unneback
163			`endmodule`
164	40	unneback	`endif
165	43	unneback
166			`ifdef PARITY
167
168			`define MODULE parity_generate
169			module `BASE`MODULE (data, parity);
170			`undef MODULE
171			`parameter word_size = 32;`
172			`parameter chunk_size = 8;`
173			`parameter parity_type = 1'b0; // 0 - even, 1 - odd parity`
174			`input [word_size-1:0] data;`
175			`output reg [word_size/chunk_size-1:0] parity;`
176			`integer i,j;`
177			`always @ (data)`
178			`for (i=0;i<word_size/chunk_size;i=i+1) begin`
179			`parity[i] = parity_type;`
180			`for (j=0;j<chunk_size;j=j+1) begin`
181	46	unneback	`parity[i] = data[i*chunk_size+j] ^ parity[i];`
182	43	unneback	`end`
183			`end`
184			`endmodule`
185
186			`define MODULE parity_check
187			module `BASE`MODULE( data, parity, parity_error);
188			`undef MODULE
189			`parameter word_size = 32;`
190			`parameter chunk_size = 8;`
191			`parameter parity_type = 1'b0; // 0 - even, 1 - odd parity`
192			`input [word_size-1:0] data;`
193			`input [word_size/chunk_size-1:0] parity;`
194			`output parity_error;`
195	44	unneback	`reg [word_size/chunk_size-1:0] error_flag;`
196	43	unneback	`integer i,j;`
197			`always @ (data or parity)`
198			`for (i=0;i<word_size/chunk_size;i=i+1) begin`
199			`error_flag[i] = parity[i] ^ parity_type;`
200			`for (j=0;j<chunk_size;j=j+1) begin`
201	46	unneback	`error_flag[i] = data[i*chunk_size+j] ^ error_flag[i];`
202	43	unneback	`end`
203			`end`
204			`assign parity_error = \|error_flag;`
205			`endmodule`
206
207			`endif

Browse

Tools

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [logic.v] - Blame information for rev 79