1 |
2 |
rherveille |
--
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2 |
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-- generate clocks
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3 |
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--
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4 |
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-- wishbone clock 200MHz
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5 |
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force -freeze vga/clk_i 0 0ns, 1 2.5ns -r {5ns}
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6 |
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-- pixel clock 36MHz
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7 |
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force -freeze vga/pclk 0 0ns, 1 13ns -r {26ns}
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8 |
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9 |
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10 |
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--
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11 |
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-- generate resets
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12 |
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--
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13 |
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force -freeze vga/nreset 1 0ns
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14 |
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force -freeze vga/rst_i 1 0ns, 0 100ns
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15 |
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16 |
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17 |
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--
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18 |
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-- fill registers
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19 |
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--
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20 |
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-- horizontal timing register thsync: 5pixels, thgdel: 10pixels, thgate 25pixels, this should trigger ERR_O (no 32bit access)
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21 |
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force -freeze /vga/cyc_i 1 118ns, 0 123ns
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22 |
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force -freeze /vga/sel_i 1101 118ns, 0000 123ns
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23 |
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force -freeze /vga/stb_i 1 118ns, 0 123ns
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24 |
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force -freeze /vga/we_i 1 118ns, 0 123ns
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25 |
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force -freeze /vga/adr_i 010 118ns, ZZZ 123ns
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26 |
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force -freeze /vga/sdat_i 16#04090018 118ns, 16#ZZZZZZZZ 123ns
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27 |
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28 |
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-- horizontal timing register thsync: 5pixels, thgdel: 10pixels, thgate 25pixels, normal cycle
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29 |
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force -freeze /vga/cyc_i 1 128ns, 0 133ns
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30 |
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force -freeze /vga/sel_i 1111 128ns, 0000 133ns
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31 |
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force -freeze /vga/stb_i 1 128ns, 0 133ns
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32 |
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force -freeze /vga/we_i 1 128ns, 0 133ns
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33 |
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force -freeze /vga/adr_i 010 128ns, ZZZ 133ns
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34 |
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force -freeze /vga/sdat_i 16#04090018 128ns, 16#ZZZZZZZZ 133ns
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35 |
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36 |
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-- vertical timing register tvsync: 5lines, thgdel: 1line, thgate 2lines
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37 |
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force -freeze /vga/cyc_i 1 138ns, 0 143ns
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38 |
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force -freeze /vga/sel_i 1111 138ns, 0000 143ns
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39 |
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force -freeze /vga/stb_i 1 138ns, 0 143ns
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40 |
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force -freeze /vga/we_i 1 138ns, 0 143ns
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41 |
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force -freeze /vga/adr_i 011 138ns, ZZZ 143ns
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42 |
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force -freeze /vga/sdat_i 16#05010002 138ns, 16#ZZZZZZZZ 143ns
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43 |
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44 |
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-- horizontal/vertical length register: hlen: 45pixels, vlen: 10lines
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45 |
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force -freeze /vga/cyc_i 1 148ns, 0 153ns
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46 |
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force -freeze /vga/sel_i 1111 148ns, 0000 153ns
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47 |
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force -freeze /vga/stb_i 1 148ns, 0 153ns
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48 |
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force -freeze /vga/we_i 1 148ns, 0 153ns
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49 |
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force -freeze /vga/adr_i 100 148ns, ZZZ 153ns
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50 |
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force -freeze /vga/sdat_i 16#002c000A 148ns, 16#ZZZZZZZZ 153ns
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51 |
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52 |
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-- color lookup table base address 0x20000000
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53 |
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force -freeze /vga/cyc_i 1 158ns, 0 163ns
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54 |
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force -freeze /vga/sel_i 1111 158ns, 0000 163ns
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55 |
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force -freeze /vga/stb_i 1 158ns, 0 163ns
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56 |
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force -freeze /vga/we_i 1 158ns, 0 163ns
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57 |
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force -freeze /vga/adr_i 111 158ns, ZZZ 163ns
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58 |
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force -freeze /vga/sdat_i 16#20000000 158ns, 16#ZZZZZZZZ 163ns
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59 |
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60 |
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-- video memory base address A: 0x00000000
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61 |
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force -freeze /vga/cyc_i 1 168ns, 0 173ns
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62 |
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force -freeze /vga/sel_i 1111 168ns, 0000 173ns
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63 |
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force -freeze /vga/stb_i 1 168ns, 0 173ns
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64 |
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force -freeze /vga/we_i 1 168ns, 0 173ns
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65 |
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force -freeze /vga/adr_i 101 168ns, ZZZ 173ns
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66 |
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force -freeze /vga/sdat_i 16#00000000 168ns, 16#ZZZZZZZZ 173ns
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67 |
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68 |
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-- video memory base address B: 0x15000000
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69 |
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force -freeze /vga/cyc_i 1 178ns, 0 183ns
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70 |
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force -freeze /vga/sel_i 1111 178ns, 0000 183ns
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71 |
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force -freeze /vga/stb_i 1 178ns, 0 183ns
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72 |
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force -freeze /vga/we_i 1 178ns, 0 183ns
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73 |
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force -freeze /vga/adr_i 110 178ns, ZZZ 183ns
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74 |
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force -freeze /vga/sdat_i 16#15000000 178ns, 16#ZZZZZZZZ 183ns
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75 |
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76 |
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-- control register, bl-pos, cl-pos, vs-pos, hs-pos, x, 16bpp, vbl-4cycle, bs-en, bsi-en, hi-en, vi-en, v-en
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77 |
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force -freeze /vga/cyc_i 1 188ns, 0 193ns
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78 |
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force -freeze /vga/sel_i 1111 188ns, 0000 193ns
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79 |
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force -freeze /vga/stb_i 1 188ns, 0 193ns
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80 |
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force -freeze /vga/we_i 1 188ns, 0 193ns
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81 |
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force -freeze /vga/adr_i 000 188ns, ZZZ 193ns
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82 |
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force -freeze /vga/sdat_i 16#0000031f 188ns, 16#ZZZZZZZZ 193ns
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83 |
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84 |
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-- present video memory data to vga controller
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85 |
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force -freeze /vga/mdat_i 16#01234567 208ns, 16#89abcdef 213ns, 16#76543210 218ns, 16#fedcba98 223ns
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86 |
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force -freeze /vga/mdat_i 16#01234567 228ns, 16#89abcdef 233ns, 16#76543210 238ns, 16#fedcba98 243ns
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87 |
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force -freeze /vga/mdat_i 16#01234567 248ns, 16#89abcdef 253ns, 16#76543210 258ns
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88 |
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force -freeze /vga/ack_i 0 0ns, 1 208ns, 0 258ns
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89 |
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force -freeze /vga/err_i 0 0ns
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90 |
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91 |
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-- present color lookup table data to vga controller
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92 |
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force -freeze /vga/mdat_i 16#00112233 265ns, 16#00445566 270ns, 16#00778899 275ns, 16#00aabbcc 280ns
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93 |
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force -freeze /vga/ack_i 1 265ns, 0 285ns
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94 |
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95 |
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force -freeze /vga/mdat_i 16#00ddeeff 310ns, 16#00332211 315ns, 16#00665544 320ns, 16#00998877 325ns
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96 |
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force -freeze /vga/ack_i 1 310ns, 0 330ns
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97 |
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98 |
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99 |
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-- keep ACK_I signal asserted (acknowledge all cycles)
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100 |
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force -freeze /vga/ack_i 1 350ns
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101 |
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102 |
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-- INTA_O is asserted (bank switch), clear it
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103 |
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force -freeze /vga/cyc_i 1 1048ns, 0 1053ns
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104 |
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force -freeze /vga/sel_i 1111 1048ns, 0000 1053ns
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105 |
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force -freeze /vga/stb_i 1 1048ns, 0 1053ns
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106 |
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force -freeze /vga/we_i 1 1048ns, 0 1053ns
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107 |
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force -freeze /vga/adr_i 001 1048ns, ZZZ 1053ns
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108 |
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force -freeze /vga/sdat_i 16#00000040 1048ns, 16#ZZZZZZZZ 1053ns
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109 |
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110 |
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-- INTA_O is asserted (horizontal interrupt), clear it
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111 |
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force -freeze /vga/cyc_i 1 1408ns, 0 1413ns
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112 |
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force -freeze /vga/sel_i 1111 1408ns, 0000 1413ns
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113 |
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force -freeze /vga/stb_i 1 1408ns, 0 1413ns
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114 |
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force -freeze /vga/we_i 1 1408ns, 0 1413ns
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115 |
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force -freeze /vga/adr_i 001 1408ns, ZZZ 1413ns
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116 |
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force -freeze /vga/sdat_i 16#00000020 1408ns, 16#ZZZZZZZZ 1413ns
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117 |
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118 |
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119 |
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120 |
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121 |
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122 |
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123 |
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