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[/] [vga_lcd/] [trunk/] [rtl/] [verilog/] [vga_colproc.v] - Blame information for rev 19

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//
// File colproc.vhd, Color Processor
// Project: VGA
// Author : Richard Herveille. Ideas and thoughts: Sherif Taher Eid
//
// rev. 1.0 August   2nd, 2001. Initial Verilog release
// rev. 1.1 August  29th, 2001. Changed statemachine to increase bandwidth.
// rev. 2.0 October  2nd, 2001. Revised core. Included color lookup table in Color Processor
 
`include "timescale.v"
 
module vga_colproc(clk, srst, pixel_buffer_di, ColorDepth, PseudoColor,
                                                pixel_buffer_empty, pixel_buffer_rreq, RGB_fifo_full,
                                                RGB_fifo_wreq, R, G, B,
                                                clut_req, clut_ack, clut_offs, clut_q);
 
        //
        // inputs & outputs
        //
        input clk;                    // master clock
        input srst;                   // synchronous reset
 
        input [31:0] pixel_buffer_di; // Pixel Buffer data input
 
        input [1:0] ColorDepth;       // color depth (8bpp, 16bpp, 24bpp)
        input       PseudoColor;      // pseudo color enabled (only for 8bpp color depth)
 
        input  pixel_buffer_empty;
        output pixel_buffer_rreq;     // pixel buffer read request
        reg    pixel_buffer_rreq;
 
        input  RGB_fifo_full;
        output RGB_fifo_wreq;
        reg    RGB_fifo_wreq;
        output [7:0] R, G, B;         // pixel color information
        reg    [7:0] R, G, B;
 
        output        clut_req;  // clut request
        reg clut_req;
        input         clut_ack;  // clut acknowledge
        output [ 7:0] clut_offs; // clut offset
        reg [7:0] clut_offs;
        input  [23:0] clut_q;    // clut data in
 
        //
        // variable declarations
        //
        reg [31:0] DataBuffer;
 
        reg [7:0] Ra, Ga, Ba;
        reg [1:0] colcnt;
        reg RGBbuf_wreq;
 
        //
        // Module body
        //
 
        // store word from pixelbuffer / wishbone input
        always@(posedge clk)
                if (pixel_buffer_rreq)
                        DataBuffer <= #1 pixel_buffer_di;
 
        //
        // generate statemachine
        //
        // extract color information from data buffer
        parameter idle        = 6'b00_0000,
                  fill_buf    = 6'b00_0001,
                  bw_8bpp     = 6'b00_0010,
                  col_8bpp    = 6'b00_0100,
                  col_16bpp_a = 6'b00_1000,
                  col_16bpp_b = 6'b01_0000,
                  col_24bpp   = 6'b10_0000;
 
        reg [5:0] c_state; // synopsis enum_state
        reg [5:0] nxt_state; // synopsis enum_state
 
        // next state decoder
        always@(c_state or pixel_buffer_empty or ColorDepth or PseudoColor or RGB_fifo_full or colcnt or clut_ack)
        begin : nxt_state_decoder
                // initial value
                nxt_state = c_state;
 
                case (c_state) // synopsis full_case parallel_case
                        // idle state
                        idle:
                                if (!pixel_buffer_empty)
                                        nxt_state = fill_buf;
 
                        // fill data buffer
                        fill_buf:
                                case (ColorDepth) // synopsis full_case parallel_case
                                        2'b00:
                                                if (PseudoColor)
                                                        nxt_state = col_8bpp;
                                                else
                                                        nxt_state = bw_8bpp;
 
                                        2'b01:
                                                nxt_state = col_16bpp_a;
 
                                        default:
                                                nxt_state = col_24bpp;
 
                                endcase
 
                        //
                        // 8 bits per pixel
                        //
                        bw_8bpp:
                                if (!RGB_fifo_full && !(|colcnt) )
                                        if (!pixel_buffer_empty)
                                                nxt_state = fill_buf;
                                        else
                                                nxt_state = idle;
 
                        col_8bpp:
                                if (!RGB_fifo_full && !(|colcnt) )
                                        if (clut_ack)
                                                if (!pixel_buffer_empty)
                                                        nxt_state = fill_buf;
                                                else
                                                        nxt_state = idle;
 
                        //
                        // 16 bits per pixel
                        //
                        col_16bpp_a:
                                if (!RGB_fifo_full)
                                        nxt_state = col_16bpp_b;
 
                        col_16bpp_b:
                                if (!RGB_fifo_full)
                                        if (!pixel_buffer_empty)
                                                nxt_state = fill_buf;
                                        else
                                                nxt_state = idle;
 
                        //
                        // 24 bits per pixel
                        //
                        col_24bpp:
                                if (!RGB_fifo_full)
                                        if (colcnt == 2'h1) // (colcnt == 1)
                                                nxt_state = col_24bpp; // stay in current state
                                        else if (!pixel_buffer_empty)
                                                nxt_state = fill_buf;
                                        else
                                                nxt_state = idle;
 
                endcase
        end // next state decoder
 
        // generate state registers
        always@(posedge clk)
                        if (srst)
                                c_state <= #1 idle;
                        else
                                c_state <= #1 nxt_state;
 
 
        reg iclut_req;
        reg pixelbuf_rreq;
        reg [7:0] iR, iG, iB, iRa, iGa, iBa;
 
        // output decoder
        always@(c_state or pixel_buffer_empty or colcnt or DataBuffer or RGB_fifo_full or clut_ack or clut_q or Ba or Ga or Ra)
        begin : output_decoder
 
                // initial values
                pixelbuf_rreq = 1'b0;
                RGBbuf_wreq = 1'b0;
                iclut_req = 1'b0;
 
                iR  = 'h0;
                iG  = 'h0;
                iB  = 'h0;
                iRa = 'h0;
                iGa = 'h0;
                iBa = 'h0;
 
                case (c_state) // synopsis full_case parallel_case
                        idle:
                                if (!pixel_buffer_empty)
                                        pixelbuf_rreq = 1'b1;
 
                        //              
                        // 8 bits per pixel
                        //
                        bw_8bpp:
                        begin
                                if (!RGB_fifo_full)
                                        begin
                                                RGBbuf_wreq = 1'b1;
 
                                                if ( (!pixel_buffer_empty) && !(|colcnt) )
                                                        pixelbuf_rreq = 1'b1;
                                        end
 
                                case (colcnt) // synopsis full_case parallel_case
                                        2'b11:
                                        begin
                                                iR = DataBuffer[31:24];
                                                iG = DataBuffer[31:24];
                                                iB = DataBuffer[31:24];
                                        end
 
                                        2'b10:
                                        begin
                                                iR = DataBuffer[23:16];
                                                iG = DataBuffer[23:16];
                                                iB = DataBuffer[23:16];
                                        end
 
                                        2'b01:
                                        begin
                                                iR = DataBuffer[15:8];
                                                iG = DataBuffer[15:8];
                                                iB = DataBuffer[15:8];
                                        end
 
                                        default:
                                        begin
                                                iR = DataBuffer[7:0];
                                                iG = DataBuffer[7:0];
                                                iB = DataBuffer[7:0];
                                        end
                                endcase
                        end
 
                        col_8bpp:
                        begin
                                if (!RGB_fifo_full & clut_ack)
                                        begin
                                                RGBbuf_wreq = 1'b1;
 
                                                if ( (!pixel_buffer_empty) && !(|colcnt) )
                                                        pixelbuf_rreq = 1'b1;
                                        end
 
                                iR = clut_q[23:16];
                                iG = clut_q[15: 8];
                                iB = clut_q[ 7: 0];
 
                                iclut_req = ~RGB_fifo_full;
 
                                if ( !(|colcnt) && clut_ack)
                                        iclut_req =1'b0;
                        end
 
                        //
                        // 16 bits per pixel
                        //
                        col_16bpp_a:
                        begin
                                if (!RGB_fifo_full)
                                        RGBbuf_wreq = 1'b1;
 
                                iR[7:3] = DataBuffer[31:27];
                                iG[7:2] = DataBuffer[26:21];
                                iB[7:3] = DataBuffer[20:16];
                        end
 
                        col_16bpp_b:
                        begin
                                if (!RGB_fifo_full)
                                        begin
                                                RGBbuf_wreq = 1'b1;
 
                                                if (!pixel_buffer_empty)
                                                        pixelbuf_rreq = 1'b1;
                                        end
 
                                iR[7:3] = DataBuffer[15:11];
                                iG[7:2] = DataBuffer[10: 5];
                                iB[7:3] = DataBuffer[ 4: 0];
                        end
 
                        //
                        // 24 bits per pixel
                        //
                        col_24bpp:
                        begin
                                if (!RGB_fifo_full)
                                        begin
                                                RGBbuf_wreq = 1'b1;
 
                                                if ( (colcnt != 2'h1) && !pixel_buffer_empty)
                                                        pixelbuf_rreq = 1'b1;
                                        end
 
 
                                case (colcnt) // synopsis full_case parallel_case
                                        2'b11:
                                        begin
                                                iR  = DataBuffer[31:24];
                                                iG  = DataBuffer[23:16];
                                                iB  = DataBuffer[15: 8];
                                                iRa = DataBuffer[ 7: 0];
                                        end
 
                                        2'b10:
                                        begin
                                                iR  = Ra;
                                                iG  = DataBuffer[31:24];
                                                iB  = DataBuffer[23:16];
                                                iRa = DataBuffer[15: 8];
                                                iGa = DataBuffer[ 7: 0];
                                        end
 
                                        2'b01:
                                        begin
                                                iR  = Ra;
                                                iG  = Ga;
                                                iB  = DataBuffer[31:24];
                                                iRa = DataBuffer[23:16];
                                                iGa = DataBuffer[15: 8];
                                                iBa = DataBuffer[ 7: 0];
                                        end
 
                                        default:
                                        begin
                                                iR = Ra;
                                                iG = Ga;
                                                iB = Ba;
                                        end
                                endcase
                        end
 
                endcase
        end // output decoder
 
        // generate output registers
        always@(posedge clk)
                begin
                        R  <= #1 iR;
                        G  <= #1 iG;
                        B  <= #1 iB;
 
                        if (RGBbuf_wreq)
                                begin
                                        Ra <= #1 iRa;
                                        Ba <= #1 iBa;
                                        Ga <= #1 iGa;
                                end
 
                        if (srst)
                                begin
                                        pixel_buffer_rreq <= #1 1'b0;
                                        RGB_fifo_wreq <= #1 1'b0;
                                        clut_req <= #1 1'b0;
                                end
                        else
                                begin
                                        pixel_buffer_rreq <= #1 pixelbuf_rreq;
                                        RGB_fifo_wreq <= #1 RGBbuf_wreq;
                                        clut_req <= #1 iclut_req;
                                end
        end
 
        // assign clut offset
        always@(colcnt or DataBuffer)
                case (colcnt) // synopsis full_case parallel_case
                        2'b11: clut_offs = DataBuffer[31:24];
                        2'b10: clut_offs = DataBuffer[23:16];
                        2'b01: clut_offs = DataBuffer[15: 8];
                        2'b00: clut_offs = DataBuffer[ 7: 0];
                endcase
 
 
        //
        // color counter
        //
        always@(posedge clk)
                if(srst)
                        colcnt <= #1 2'b11;
                else if (RGBbuf_wreq)
                        colcnt <= #1 colcnt -2'h1;
endmodule

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[/] [vga_lcd/] [trunk/] [rtl/] [verilog/] [vga_colproc.v] - Blame information for rev 19

Line No.	Rev	Author	Line
1	17	rherveille	`//`
2			`// File colproc.vhd, Color Processor`
3			`// Project: VGA`
4			`// Author : Richard Herveille. Ideas and thoughts: Sherif Taher Eid`
5			`//`
6	19	rherveille	`// rev. 1.0 August 2nd, 2001. Initial Verilog release`
7			`// rev. 1.1 August 29th, 2001. Changed statemachine to increase bandwidth.`
8			`// rev. 2.0 October 2nd, 2001. Revised core. Included color lookup table in Color Processor`
9	17	rherveille
10			`include "timescale.v"
11
12	19	rherveille	`module vga_colproc(clk, srst, pixel_buffer_di, ColorDepth, PseudoColor,`
13	17	rherveille	`pixel_buffer_empty, pixel_buffer_rreq, RGB_fifo_full,`
14	19	rherveille	`RGB_fifo_wreq, R, G, B,`
15			`clut_req, clut_ack, clut_offs, clut_q);`
16	17	rherveille
17	19	rherveille	`//`
18	17	rherveille	`// inputs & outputs`
19	19	rherveille	`//`
20	17	rherveille	`input clk; // master clock`
21			`input srst; // synchronous reset`
22
23			`input [31:0] pixel_buffer_di; // Pixel Buffer data input`
24
25			`input [1:0] ColorDepth; // color depth (8bpp, 16bpp, 24bpp)`
26	19	rherveille	`input PseudoColor; // pseudo color enabled (only for 8bpp color depth)`
27	17	rherveille
28			`input pixel_buffer_empty;`
29			`output pixel_buffer_rreq; // pixel buffer read request`
30			`reg pixel_buffer_rreq;`
31
32			`input RGB_fifo_full;`
33			`output RGB_fifo_wreq;`
34			`reg RGB_fifo_wreq;`
35			`output [7:0] R, G, B; // pixel color information`
36			`reg [7:0] R, G, B;`
37
38	19	rherveille	`output clut_req; // clut request`
39			`reg clut_req;`
40			`input clut_ack; // clut acknowledge`
41			`output [ 7:0] clut_offs; // clut offset`
42			`reg [7:0] clut_offs;`
43			`input [23:0] clut_q; // clut data in`
44
45			`//`
46	17	rherveille	`// variable declarations`
47	19	rherveille	`//`
48	17	rherveille	`reg [31:0] DataBuffer;`
49
50			`reg [7:0] Ra, Ga, Ba;`
51			`reg [1:0] colcnt;`
52			`reg RGBbuf_wreq;`
53
54			`//`
55			`// Module body`
56			`//`
57
58			`// store word from pixelbuffer / wishbone input`
59			`always@(posedge clk)`
60			`if (pixel_buffer_rreq)`
61			`DataBuffer <= #1 pixel_buffer_di;`
62
63			`//`
64			`// generate statemachine`
65			`//`
66			`// extract color information from data buffer`
67			`parameter idle = 6'b00_0000,`
68			`fill_buf = 6'b00_0001,`
69			`bw_8bpp = 6'b00_0010,`
70			`col_8bpp = 6'b00_0100,`
71			`col_16bpp_a = 6'b00_1000,`
72			`col_16bpp_b = 6'b01_0000,`
73			`col_24bpp = 6'b10_0000;`
74
75			`reg [5:0] c_state; // synopsis enum_state`
76			`reg [5:0] nxt_state; // synopsis enum_state`
77
78			`// next state decoder`
79			`always@(c_state or pixel_buffer_empty or ColorDepth or PseudoColor or RGB_fifo_full or colcnt or clut_ack)`
80			`begin : nxt_state_decoder`
81			`// initial value`
82			`nxt_state = c_state;`
83
84			`case (c_state) // synopsis full_case parallel_case`
85			`// idle state`
86			`idle:`
87			`if (!pixel_buffer_empty)`
88			`nxt_state = fill_buf;`
89
90			`// fill data buffer`
91			`fill_buf:`
92			`case (ColorDepth) // synopsis full_case parallel_case`
93			`2'b00:`
94			`if (PseudoColor)`
95			`nxt_state = col_8bpp;`
96			`else`
97			`nxt_state = bw_8bpp;`
98
99			`2'b01:`
100			`nxt_state = col_16bpp_a;`
101
102			`default:`
103			`nxt_state = col_24bpp;`
104
105			`endcase`
106
107			`//`
108			`// 8 bits per pixel`
109			`//`
110			`bw_8bpp:`
111			`if (!RGB_fifo_full && !(\|colcnt) )`
112			`if (!pixel_buffer_empty)`
113			`nxt_state = fill_buf;`
114			`else`
115			`nxt_state = idle;`
116
117			`col_8bpp:`
118			`if (!RGB_fifo_full && !(\|colcnt) )`
119			`if (clut_ack)`
120			`if (!pixel_buffer_empty)`
121			`nxt_state = fill_buf;`
122			`else`
123			`nxt_state = idle;`
124
125			`//`
126			`// 16 bits per pixel`
127			`//`
128			`col_16bpp_a:`
129			`if (!RGB_fifo_full)`
130			`nxt_state = col_16bpp_b;`
131
132			`col_16bpp_b:`
133			`if (!RGB_fifo_full)`
134			`if (!pixel_buffer_empty)`
135			`nxt_state = fill_buf;`
136			`else`
137			`nxt_state = idle;`
138
139			`//`
140			`// 24 bits per pixel`
141			`//`
142			`col_24bpp:`
143			`if (!RGB_fifo_full)`
144			`if (colcnt == 2'h1) // (colcnt == 1)`
145			`nxt_state = col_24bpp; // stay in current state`
146			`else if (!pixel_buffer_empty)`
147			`nxt_state = fill_buf;`
148			`else`
149			`nxt_state = idle;`
150
151			`endcase`
152			`end // next state decoder`
153
154			`// generate state registers`
155			`always@(posedge clk)`
156			`if (srst)`
157			`c_state <= #1 idle;`
158			`else`
159			`c_state <= #1 nxt_state;`
160
161
162	19	rherveille	`reg iclut_req;`
163	17	rherveille	`reg pixelbuf_rreq;`
164			`reg [7:0] iR, iG, iB, iRa, iGa, iBa;`
165
166			`// output decoder`
167	19	rherveille	`always@(c_state or pixel_buffer_empty or colcnt or DataBuffer or RGB_fifo_full or clut_ack or clut_q or Ba or Ga or Ra)`
168	17	rherveille	`begin : output_decoder`
169
170			`// initial values`
171			`pixelbuf_rreq = 1'b0;`
172			`RGBbuf_wreq = 1'b0;`
173	19	rherveille	`iclut_req = 1'b0;`
174	17	rherveille
175			`iR = 'h0;`
176			`iG = 'h0;`
177			`iB = 'h0;`
178			`iRa = 'h0;`
179			`iGa = 'h0;`
180			`iBa = 'h0;`
181
182			`case (c_state) // synopsis full_case parallel_case`
183			`idle:`
184			`if (!pixel_buffer_empty)`
185			`pixelbuf_rreq = 1'b1;`
186
187			`//`
188			`// 8 bits per pixel`
189			`//`
190			`bw_8bpp:`
191			`begin`
192			`if (!RGB_fifo_full)`
193			`begin`
194			`RGBbuf_wreq = 1'b1;`
195
196			`if ( (!pixel_buffer_empty) && !(\|colcnt) )`
197			`pixelbuf_rreq = 1'b1;`
198			`end`
199
200			`case (colcnt) // synopsis full_case parallel_case`
201			`2'b11:`
202			`begin`
203			`iR = DataBuffer[31:24];`
204			`iG = DataBuffer[31:24];`
205			`iB = DataBuffer[31:24];`
206			`end`
207
208			`2'b10:`
209			`begin`
210			`iR = DataBuffer[23:16];`
211			`iG = DataBuffer[23:16];`
212			`iB = DataBuffer[23:16];`
213			`end`
214
215			`2'b01:`
216			`begin`
217			`iR = DataBuffer[15:8];`
218			`iG = DataBuffer[15:8];`
219			`iB = DataBuffer[15:8];`
220			`end`
221
222			`default:`
223			`begin`
224			`iR = DataBuffer[7:0];`
225			`iG = DataBuffer[7:0];`
226			`iB = DataBuffer[7:0];`
227			`end`
228			`endcase`
229			`end`
230
231			`col_8bpp:`
232			`begin`
233			`if (!RGB_fifo_full & clut_ack)`
234			`begin`
235			`RGBbuf_wreq = 1'b1;`
236
237			`if ( (!pixel_buffer_empty) && !(\|colcnt) )`
238			`pixelbuf_rreq = 1'b1;`
239			`end`
240
241	19	rherveille	`iR = clut_q[23:16];`
242			`iG = clut_q[15: 8];`
243			`iB = clut_q[ 7: 0];`
244	17	rherveille
245	19	rherveille	`iclut_req = ~RGB_fifo_full;`
246	17	rherveille
247			`if ( !(\|colcnt) && clut_ack)`
248	19	rherveille	`iclut_req =1'b0;`
249	17	rherveille	`end`
250
251			`//`
252			`// 16 bits per pixel`
253			`//`
254			`col_16bpp_a:`
255			`begin`
256			`if (!RGB_fifo_full)`
257			`RGBbuf_wreq = 1'b1;`
258
259			`iR[7:3] = DataBuffer[31:27];`
260			`iG[7:2] = DataBuffer[26:21];`
261			`iB[7:3] = DataBuffer[20:16];`
262			`end`
263
264			`col_16bpp_b:`
265			`begin`
266			`if (!RGB_fifo_full)`
267			`begin`
268			`RGBbuf_wreq = 1'b1;`
269
270			`if (!pixel_buffer_empty)`
271			`pixelbuf_rreq = 1'b1;`
272			`end`
273
274			`iR[7:3] = DataBuffer[15:11];`
275			`iG[7:2] = DataBuffer[10: 5];`
276			`iB[7:3] = DataBuffer[ 4: 0];`
277			`end`
278
279			`//`
280			`// 24 bits per pixel`
281			`//`
282			`col_24bpp:`
283			`begin`
284			`if (!RGB_fifo_full)`
285			`begin`
286			`RGBbuf_wreq = 1'b1;`
287
288			`if ( (colcnt != 2'h1) && !pixel_buffer_empty)`
289			`pixelbuf_rreq = 1'b1;`
290			`end`
291
292
293			`case (colcnt) // synopsis full_case parallel_case`
294			`2'b11:`
295			`begin`
296			`iR = DataBuffer[31:24];`
297			`iG = DataBuffer[23:16];`
298			`iB = DataBuffer[15: 8];`
299			`iRa = DataBuffer[ 7: 0];`
300			`end`
301
302			`2'b10:`
303			`begin`
304			`iR = Ra;`
305			`iG = DataBuffer[31:24];`
306			`iB = DataBuffer[23:16];`
307			`iRa = DataBuffer[15: 8];`
308			`iGa = DataBuffer[ 7: 0];`
309			`end`
310
311			`2'b01:`
312			`begin`
313			`iR = Ra;`
314			`iG = Ga;`
315			`iB = DataBuffer[31:24];`
316			`iRa = DataBuffer[23:16];`
317			`iGa = DataBuffer[15: 8];`
318			`iBa = DataBuffer[ 7: 0];`
319			`end`
320
321			`default:`
322			`begin`
323			`iR = Ra;`
324			`iG = Ga;`
325			`iB = Ba;`
326			`end`
327			`endcase`
328			`end`
329
330			`endcase`
331			`end // output decoder`
332
333			`// generate output registers`
334			`always@(posedge clk)`
335			`begin`
336			`R <= #1 iR;`
337			`G <= #1 iG;`
338			`B <= #1 iB;`
339
340			`if (RGBbuf_wreq)`
341			`begin`
342			`Ra <= #1 iRa;`
343			`Ba <= #1 iBa;`
344			`Ga <= #1 iGa;`
345			`end`
346
347			`if (srst)`
348			`begin`
349			`pixel_buffer_rreq <= #1 1'b0;`
350			`RGB_fifo_wreq <= #1 1'b0;`
351			`clut_req <= #1 1'b0;`
352			`end`
353			`else`
354			`begin`
355			`pixel_buffer_rreq <= #1 pixelbuf_rreq;`
356			`RGB_fifo_wreq <= #1 RGBbuf_wreq;`
357	19	rherveille	`clut_req <= #1 iclut_req;`
358	17	rherveille	`end`
359			`end`
360
361			`// assign clut offset`
362			`always@(colcnt or DataBuffer)`
363			`case (colcnt) // synopsis full_case parallel_case`
364			`2'b11: clut_offs = DataBuffer[31:24];`
365			`2'b10: clut_offs = DataBuffer[23:16];`
366			`2'b01: clut_offs = DataBuffer[15: 8];`
367			`2'b00: clut_offs = DataBuffer[ 7: 0];`
368			`endcase`
369
370
371			`//`
372			`// color counter`
373			`//`
374			`always@(posedge clk)`
375			`if(srst)`
376			`colcnt <= #1 2'b11;`
377			`else if (RGBbuf_wreq)`
378			`colcnt <= #1 colcnt -2'h1;`
379			`endmodule`