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[/] [vhdl/] [Nexys4_Master.xdc] - Blame information for rev 2

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1 2 droggen 
## This file is a general .xdc for the Nexys4 rev B board
2 
## To use it in a project:
3 
## - uncomment the lines corresponding to used pins
4 
## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
5 
 
6 
## Clock signal
7 
##Bank = 35, Pin name = IO_L12P_T1_MRCC_35,                                     Sch name = CLK100MHZ
8 
set_property PACKAGE_PIN E3 [get_ports clk]
9 
        set_property IOSTANDARD LVCMOS33 [get_ports clk]
10 
        create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
11 
 
12 
## Switches
13 
#Bank = 34, Pin name = IO_L21P_T3_DQS_34,                                       Sch name = SW0
14 
set_property PACKAGE_PIN U9 [get_ports {sw[0]}]
15 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}]
16 
#Bank = 34, Pin name = IO_25_34,                                                        Sch name = SW1
17 
set_property PACKAGE_PIN U8 [get_ports {sw[1]}]
18 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}]
19 
#Bank = 34, Pin name = IO_L23P_T3_34,                                           Sch name = SW2
20 
set_property PACKAGE_PIN R7 [get_ports {sw[2]}]
21 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[2]}]
22 
#Bank = 34, Pin name = IO_L19P_T3_34,                                           Sch name = SW3
23 
set_property PACKAGE_PIN R6 [get_ports {sw[3]}]
24 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[3]}]
25 
#Bank = 34, Pin name = IO_L19N_T3_VREF_34,                                      Sch name = SW4
26 
set_property PACKAGE_PIN R5 [get_ports {sw[4]}]
27 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[4]}]
28 
#Bank = 34, Pin name = IO_L20P_T3_34,                                           Sch name = SW5
29 
set_property PACKAGE_PIN V7 [get_ports {sw[5]}]
30 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[5]}]
31 
#Bank = 34, Pin name = IO_L20N_T3_34,                                           Sch name = SW6
32 
set_property PACKAGE_PIN V6 [get_ports {sw[6]}]
33 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[6]}]
34 
#Bank = 34, Pin name = IO_L10P_T1_34,                                           Sch name = SW7
35 
set_property PACKAGE_PIN V5 [get_ports {sw[7]}]
36 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[7]}]
37 
#Bank = 34, Pin name = IO_L8P_T1-34,                                            Sch name = SW8
38 
set_property PACKAGE_PIN U4 [get_ports {sw[8]}]
39 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[8]}]
40 
#Bank = 34, Pin name = IO_L9N_T1_DQS_34,                                        Sch name = SW9
41 
set_property PACKAGE_PIN V2 [get_ports {sw[9]}]
42 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[9]}]
43 
#Bank = 34, Pin name = IO_L9P_T1_DQS_34,                                        Sch name = SW10
44 
set_property PACKAGE_PIN U2 [get_ports {sw[10]}]
45 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[10]}]
46 
#Bank = 34, Pin name = IO_L11N_T1_MRCC_34,                                      Sch name = SW11
47 
set_property PACKAGE_PIN T3 [get_ports {sw[11]}]
48 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[11]}]
49 
#Bank = 34, Pin name = IO_L17N_T2_34,                                           Sch name = SW12
50 
set_property PACKAGE_PIN T1 [get_ports {sw[12]}]
51 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[12]}]
52 
#Bank = 34, Pin name = IO_L11P_T1_SRCC_34,                                      Sch name = SW13
53 
set_property PACKAGE_PIN R3 [get_ports {sw[13]}]
54 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[13]}]
55 
#Bank = 34, Pin name = IO_L14N_T2_SRCC_34,                                      Sch name = SW14
56 
set_property PACKAGE_PIN P3 [get_ports {sw[14]}]
57 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[14]}]
58 
#Bank = 34, Pin name = IO_L14P_T2_SRCC_34,                                      Sch name = SW15
59 
set_property PACKAGE_PIN P4 [get_ports {sw[15]}]
60 
        set_property IOSTANDARD LVCMOS33 [get_ports {sw[15]}]
61 
 
62 
 
63 
 
64 
## LEDs
65 
#Bank = 34, Pin name = IO_L24N_T3_34,                                           Sch name = LED0
66 
set_property PACKAGE_PIN T8 [get_ports {led[0]}]
67 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}]
68 
#Bank = 34, Pin name = IO_L21N_T3_DQS_34,                                       Sch name = LED1
69 
set_property PACKAGE_PIN V9 [get_ports {led[1]}]
70 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}]
71 
#Bank = 34, Pin name = IO_L24P_T3_34,                                           Sch name = LED2
72 
set_property PACKAGE_PIN R8 [get_ports {led[2]}]
73 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[2]}]
74 
#Bank = 34, Pin name = IO_L23N_T3_34,                                           Sch name = LED3
75 
set_property PACKAGE_PIN T6 [get_ports {led[3]}]
76 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[3]}]
77 
#Bank = 34, Pin name = IO_L12P_T1_MRCC_34,                                      Sch name = LED4
78 
set_property PACKAGE_PIN T5 [get_ports {led[4]}]
79 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[4]}]
80 
#Bank = 34, Pin name = IO_L12N_T1_MRCC_34,                                      Sch     name = LED5
81 
set_property PACKAGE_PIN T4 [get_ports {led[5]}]
82 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[5]}]
83 
#Bank = 34, Pin name = IO_L22P_T3_34,                                           Sch name = LED6
84 
set_property PACKAGE_PIN U7 [get_ports {led[6]}]
85 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[6]}]
86 
#Bank = 34, Pin name = IO_L22N_T3_34,                                           Sch name = LED7
87 
set_property PACKAGE_PIN U6 [get_ports {led[7]}]
88 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[7]}]
89 
#Bank = 34, Pin name = IO_L10N_T1_34,                                           Sch name = LED8
90 
set_property PACKAGE_PIN V4 [get_ports {led[8]}]
91 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[8]}]
92 
#Bank = 34, Pin name = IO_L8N_T1_34,                                            Sch name = LED9
93 
set_property PACKAGE_PIN U3 [get_ports {led[9]}]
94 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[9]}]
95 
#Bank = 34, Pin name = IO_L7N_T1_34,                                            Sch name = LED10
96 
set_property PACKAGE_PIN V1 [get_ports {led[10]}]
97 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[10]}]
98 
#Bank = 34, Pin name = IO_L17P_T2_34,                                           Sch name = LED11
99 
set_property PACKAGE_PIN R1 [get_ports {led[11]}]
100 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[11]}]
101 
#Bank = 34, Pin name = IO_L13N_T2_MRCC_34,                                      Sch name = LED12
102 
set_property PACKAGE_PIN P5 [get_ports {led[12]}]
103 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[12]}]
104 
#Bank = 34, Pin name = IO_L7P_T1_34,                                            Sch name = LED13
105 
set_property PACKAGE_PIN U1 [get_ports {led[13]}]
106 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[13]}]
107 
#Bank = 34, Pin name = IO_L15N_T2_DQS_34,                                       Sch name = LED14
108 
set_property PACKAGE_PIN R2 [get_ports {led[14]}]
109 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[14]}]
110 
#Bank = 34, Pin name = IO_L15P_T2_DQS_34,                                       Sch name = LED15
111 
set_property PACKAGE_PIN P2 [get_ports {led[15]}]
112 
        set_property IOSTANDARD LVCMOS33 [get_ports {led[15]}]
113 
 
114 
##Bank = 34, Pin name = IO_L5P_T0_34,                                           Sch name = LED16_R
115 
#set_property PACKAGE_PIN K5 [get_ports RGB1_Red]
116 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Red]
117 
##Bank = 15, Pin name = IO_L5P_T0_AD9P_15,                                      Sch name = LED16_G
118 
#set_property PACKAGE_PIN F13 [get_ports RGB1_Green]
119 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Green]
120 
##Bank = 35, Pin name = IO_L19N_T3_VREF_35,                                     Sch name = LED16_B
121 
#set_property PACKAGE_PIN F6 [get_ports RGB1_Blue]
122 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Blue]
123 
##Bank = 34, Pin name = IO_0_34,                                                                Sch name = LED17_R
124 
#set_property PACKAGE_PIN K6 [get_ports RGB2_Red]
125 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Red]
126 
##Bank = 35, Pin name = IO_24P_T3_35,                                           Sch name =  LED17_G
127 
#set_property PACKAGE_PIN H6 [get_ports RGB2_Green]
128 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Green]
129 
##Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14,                    Sch name = LED17_B
130 
#set_property PACKAGE_PIN L16 [get_ports RGB2_Blue]
131 
        #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Blue]
132 
 
133 
 
134 
 
135 
##7 segment display
136 
#Bank = 34, Pin name = IO_L2N_T0_34,                                            Sch name = CA
137 
set_property PACKAGE_PIN L3 [get_ports {seg[0]}]
138 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[0]}]
139 
#Bank = 34, Pin name = IO_L3N_T0_DQS_34,                                        Sch name = CB
140 
set_property PACKAGE_PIN N1 [get_ports {seg[1]}]
141 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[1]}]
142 
#Bank = 34, Pin name = IO_L6N_T0_VREF_34,                                       Sch name = CC
143 
set_property PACKAGE_PIN L5 [get_ports {seg[2]}]
144 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[2]}]
145 
#Bank = 34, Pin name = IO_L5N_T0_34,                                            Sch name = CD
146 
set_property PACKAGE_PIN L4 [get_ports {seg[3]}]
147 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[3]}]
148 
#Bank = 34, Pin name = IO_L2P_T0_34,                                            Sch name = CE
149 
set_property PACKAGE_PIN K3 [get_ports {seg[4]}]
150 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[4]}]
151 
#Bank = 34, Pin name = IO_L4N_T0_34,                                            Sch name = CF
152 
set_property PACKAGE_PIN M2 [get_ports {seg[5]}]
153 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[5]}]
154 
#Bank = 34, Pin name = IO_L6P_T0_34,                                            Sch name = CG
155 
set_property PACKAGE_PIN L6 [get_ports {seg[6]}]
156 
        set_property IOSTANDARD LVCMOS33 [get_ports {seg[6]}]
157 
 
158 
##Bank = 34, Pin name = IO_L16P_T2_34,                                          Sch name = DP
159 
#set_property PACKAGE_PIN M4 [get_ports dp]
160 
        #set_property IOSTANDARD LVCMOS33 [get_ports dp]
161 
 
162 
#Bank = 34, Pin name = IO_L18N_T2_34,                                           Sch name = AN0
163 
set_property PACKAGE_PIN N6 [get_ports {an[0]}]
164 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[0]}]
165 
#Bank = 34, Pin name = IO_L18P_T2_34,                                           Sch name = AN1
166 
set_property PACKAGE_PIN M6 [get_ports {an[1]}]
167 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[1]}]
168 
#Bank = 34, Pin name = IO_L4P_T0_34,                                            Sch name = AN2
169 
set_property PACKAGE_PIN M3 [get_ports {an[2]}]
170 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[2]}]
171 
#Bank = 34, Pin name = IO_L13_T2_MRCC_34,                                       Sch name = AN3
172 
set_property PACKAGE_PIN N5 [get_ports {an[3]}]
173 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[3]}]
174 
#Bank = 34, Pin name = IO_L3P_T0_DQS_34,                                        Sch name = AN4
175 
set_property PACKAGE_PIN N2 [get_ports {an[4]}]
176 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[4]}]
177 
#Bank = 34, Pin name = IO_L16N_T2_34,                                           Sch name = AN5
178 
set_property PACKAGE_PIN N4 [get_ports {an[5]}]
179 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[5]}]
180 
#Bank = 34, Pin name = IO_L1P_T0_34,                                            Sch name = AN6
181 
set_property PACKAGE_PIN L1 [get_ports {an[6]}]
182 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[6]}]
183 
#Bank = 34, Pin name = IO_L1N_T034,                                                     Sch name = AN7
184 
set_property PACKAGE_PIN M1 [get_ports {an[7]}]
185 
        set_property IOSTANDARD LVCMOS33 [get_ports {an[7]}]
186 
 
187 
 
188 
 
189 
##Buttons
190 
#Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15,                           Sch name = CPU_RESET
191 
set_property PACKAGE_PIN C12 [get_ports btnCpuReset]
192 
        set_property IOSTANDARD LVCMOS33 [get_ports btnCpuReset]
193 
#Bank = 15, Pin name = IO_L11N_T1_SRCC_15,                                      Sch name = BTNC
194 
set_property PACKAGE_PIN E16 [get_ports btnC]
195 
        set_property IOSTANDARD LVCMOS33 [get_ports btnC]
196 
#Bank = 15, Pin name = IO_L14P_T2_SRCC_15,                                      Sch name = BTNU
197 
set_property PACKAGE_PIN F15 [get_ports btnU]
198 
        set_property IOSTANDARD LVCMOS33 [get_ports btnU]
199 
#Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,        Sch name = BTNL
200 
set_property PACKAGE_PIN T16 [get_ports btnL]
201 
        set_property IOSTANDARD LVCMOS33 [get_ports btnL]
202 
#Bank = 14, Pin name = IO_25_14,                                                        Sch name = BTNR
203 
set_property PACKAGE_PIN R10 [get_ports btnR]
204 
        set_property IOSTANDARD LVCMOS33 [get_ports btnR]
205 
#Bank = 14, Pin name = IO_L21P_T3_DQS_14,                                       Sch name = BTND
206 
set_property PACKAGE_PIN V10 [get_ports btnD]
207 
        set_property IOSTANDARD LVCMOS33 [get_ports btnD]
208 
 
209 
 
210 
 
211 
##Pmod Header JA
212 
##Bank = 15, Pin name = IO_L1N_T0_AD0N_15,                                      Sch name = JA1
213 
#set_property PACKAGE_PIN B13 [get_ports {JA[0]}]
214 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[0]}]
215 
##Bank = 15, Pin name = IO_L5N_T0_AD9N_15,                                      Sch name = JA2
216 
#set_property PACKAGE_PIN F14 [get_ports {JA[1]}]
217 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[1]}]
218 
##Bank = 15, Pin name = IO_L16N_T2_A27_15,                                      Sch name = JA3
219 
#set_property PACKAGE_PIN D17 [get_ports {JA[2]}]
220 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[2]}]
221 
##Bank = 15, Pin name = IO_L16P_T2_A28_15,                                      Sch name = JA4
222 
#set_property PACKAGE_PIN E17 [get_ports {JA[3]}]
223 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[3]}]
224 
##Bank = 15, Pin name = IO_0_15,                                                                Sch name = JA7
225 
#set_property PACKAGE_PIN G13 [get_ports {JA[4]}]
226 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[4]}]
227 
##Bank = 15, Pin name = IO_L20N_T3_A19_15,                                      Sch name = JA8
228 
#set_property PACKAGE_PIN C17 [get_ports {JA[5]}]
229 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[5]}]
230 
##Bank = 15, Pin name = IO_L21N_T3_A17_15,                                      Sch name = JA9
231 
#set_property PACKAGE_PIN D18 [get_ports {JA[6]}]
232 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[6]}]
233 
##Bank = 15, Pin name = IO_L21P_T3_DQS_15,                                      Sch name = JA10
234 
#set_property PACKAGE_PIN E18 [get_ports {JA[7]}]
235 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JA[7]}]
236 
 
237 
 
238 
 
239 
##Pmod Header JB
240 
##Bank = 15, Pin name = IO_L15N_T2_DQS_ADV_B_15,                                Sch name = JB1
241 
#set_property PACKAGE_PIN G14 [get_ports {JB[0]}]
242 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[0]}]
243 
##Bank = 14, Pin name = IO_L13P_T2_MRCC_14,                                     Sch name = JB2
244 
#set_property PACKAGE_PIN P15 [get_ports {JB[1]}]
245 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[1]}]
246 
##Bank = 14, Pin name = IO_L21N_T3_DQS_A06_D22_14,                      Sch name = JB3
247 
#set_property PACKAGE_PIN V11 [get_ports {JB[2]}]
248 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[2]}]
249 
##Bank = CONFIG, Pin name = IO_L16P_T2_CSI_B_14,                                Sch name = JB4
250 
#set_property PACKAGE_PIN V15 [get_ports {JB[3]}]
251 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[3]}]
252 
##Bank = 15, Pin name = IO_25_15,                                                       Sch name = JB7
253 
#set_property PACKAGE_PIN K16 [get_ports {JB[4]}]
254 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[4]}]
255 
##Bank = CONFIG, Pin name = IO_L15P_T2_DQS_RWR_B_14,                    Sch name = JB8
256 
#set_property PACKAGE_PIN R16 [get_ports {JB[5]}]
257 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[5]}]
258 
##Bank = 14, Pin name = IO_L24P_T3_A01_D17_14,                          Sch name = JB9
259 
#set_property PACKAGE_PIN T9 [get_ports {JB[6]}]
260 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[6]}]
261 
##Bank = 14, Pin name = IO_L19N_T3_A09_D25_VREF_14,                     Sch name = JB10
262 
#set_property PACKAGE_PIN U11 [get_ports {JB[7]}]
263 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JB[7]}]
264 
 
265 
 
266 
 
267 
##Pmod Header JC
268 
##Bank = 35, Pin name = IO_L23P_T3_35,                                          Sch name = JC1
269 
#set_property PACKAGE_PIN K2 [get_ports {JC[0]}]
270 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[0]}]
271 
##Bank = 35, Pin name = IO_L6P_T0_35,                                           Sch name = JC2
272 
#set_property PACKAGE_PIN E7 [get_ports {JC[1]}]
273 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[1]}]
274 
##Bank = 35, Pin name = IO_L22P_T3_35,                                          Sch name = JC3
275 
#set_property PACKAGE_PIN J3 [get_ports {JC[2]}]
276 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[2]}]
277 
##Bank = 35, Pin name = IO_L21P_T3_DQS_35,                                      Sch name = JC4
278 
#set_property PACKAGE_PIN J4 [get_ports {JC[3]}]
279 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[3]}]
280 
##Bank = 35, Pin name = IO_L23N_T3_35,                                          Sch name = JC7
281 
#set_property PACKAGE_PIN K1 [get_ports {JC[4]}]
282 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[4]}]
283 
##Bank = 35, Pin name = IO_L5P_T0_AD13P_35,                                     Sch name = JC8
284 
#set_property PACKAGE_PIN E6 [get_ports {JC[5]}]
285 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[5]}]
286 
##Bank = 35, Pin name = IO_L22N_T3_35,                                          Sch name = JC9
287 
#set_property PACKAGE_PIN J2 [get_ports {JC[6]}]
288 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[6]}]
289 
##Bank = 35, Pin name = IO_L19P_T3_35,                                          Sch name = JC10
290 
#set_property PACKAGE_PIN G6 [get_ports {JC[7]}]
291 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JC[7]}]
292 
 
293 
 
294 
 
295 
##Pmod Header JD
296 
##Bank = 35, Pin name = IO_L21N_T2_DQS_35,                                      Sch name = JD1
297 
#set_property PACKAGE_PIN H4 [get_ports {JD[0]}]
298 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[0]}]
299 
##Bank = 35, Pin name = IO_L17P_T2_35,                                          Sch name = JD2
300 
#set_property PACKAGE_PIN H1 [get_ports {JD[1]}]
301 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[1]}]
302 
##Bank = 35, Pin name = IO_L17N_T2_35,                                          Sch name = JD3
303 
#set_property PACKAGE_PIN G1 [get_ports {JD[2]}]
304 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[2]}]
305 
##Bank = 35, Pin name = IO_L20N_T3_35,                                          Sch name = JD4
306 
#set_property PACKAGE_PIN G3 [get_ports {JD[3]}]
307 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[3]}]
308 
##Bank = 35, Pin name = IO_L15P_T2_DQS_35,                                      Sch name = JD7
309 
#set_property PACKAGE_PIN H2 [get_ports {JD[4]}]
310 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[4]}]
311 
##Bank = 35, Pin name = IO_L20P_T3_35,                                          Sch name = JD8
312 
#set_property PACKAGE_PIN G4 [get_ports {JD[5]}]
313 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[5]}]
314 
##Bank = 35, Pin name = IO_L15N_T2_DQS_35,                                      Sch name = JD9
315 
#set_property PACKAGE_PIN G2 [get_ports {JD[6]}]
316 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[6]}]
317 
##Bank = 35, Pin name = IO_L13N_T2_MRCC_35,                                     Sch name = JD10
318 
#set_property PACKAGE_PIN F3 [get_ports {JD[7]}]
319 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JD[7]}]
320 
 
321 
 
322 
 
323 
##Pmod Header JXADC
324 
##Bank = 15, Pin name = IO_L9P_T1_DQS_AD3P_15,                          Sch name = XADC1_P -> XA1_P
325 
#set_property PACKAGE_PIN A13 [get_ports {JXADC[0]}]
326 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}]
327 
##Bank = 15, Pin name = IO_L8P_T1_AD10P_15,                                     Sch name = XADC2_P -> XA2_P
328 
#set_property PACKAGE_PIN A15 [get_ports {JXADC[1]}]
329 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}]
330 
##Bank = 15, Pin name = IO_L7P_T1_AD2P_15,                                      Sch name = XADC3_P -> XA3_P
331 
#set_property PACKAGE_PIN B16 [get_ports {JXADC[2]}]
332 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}]
333 
##Bank = 15, Pin name = IO_L10P_T1_AD11P_15,                                    Sch name = XADC4_P -> XA4_P
334 
#set_property PACKAGE_PIN B18 [get_ports {JXADC[3]}]
335 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}]
336 
##Bank = 15, Pin name = IO_L9N_T1_DQS_AD3N_15,                          Sch name = XADC1_N -> XA1_N
337 
#set_property PACKAGE_PIN A14 [get_ports {JXADC[4]}]
338 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}]
339 
##Bank = 15, Pin name = IO_L8N_T1_AD10N_15,                                     Sch name = XADC2_N -> XA2_N
340 
#set_property PACKAGE_PIN A16 [get_ports {JXADC[5]}]
341 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}]
342 
##Bank = 15, Pin name = IO_L7N_T1_AD2N_15,                                      Sch name = XADC3_N -> XA3_N
343 
#set_property PACKAGE_PIN B17 [get_ports {JXADC[6]}]
344 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}]
345 
##Bank = 15, Pin name = IO_L10N_T1_AD11N_15,                                    Sch name = XADC4_N -> XA4_N
346 
#set_property PACKAGE_PIN A18 [get_ports {JXADC[7]}]
347 
        #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}]
348 
 
349 
 
350 
 
351 
##VGA Connector
352 
##Bank = 35, Pin name = IO_L8N_T1_AD14N_35,                                     Sch name = VGA_R0
353 
#set_property PACKAGE_PIN A3 [get_ports {vgaRed[0]}]
354 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[0]}]
355 
##Bank = 35, Pin name = IO_L7N_T1_AD6N_35,                                      Sch name = VGA_R1
356 
#set_property PACKAGE_PIN B4 [get_ports {vgaRed[1]}]
357 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[1]}]
358 
##Bank = 35, Pin name = IO_L1N_T0_AD4N_35,                                      Sch name = VGA_R2
359 
#set_property PACKAGE_PIN C5 [get_ports {vgaRed[2]}]
360 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[2]}]
361 
##Bank = 35, Pin name = IO_L8P_T1_AD14P_35,                                     Sch name = VGA_R3
362 
#set_property PACKAGE_PIN A4 [get_ports {vgaRed[3]}]
363 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[3]}]
364 
##Bank = 35, Pin name = IO_L2P_T0_AD12P_35,                                     Sch name = VGA_B0
365 
#set_property PACKAGE_PIN B7 [get_ports {vgaBlue[0]}]
366 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[0]}]
367 
##Bank = 35, Pin name = IO_L4N_T0_35,                                           Sch name = VGA_B1
368 
#set_property PACKAGE_PIN C7 [get_ports {vgaBlue[1]}]
369 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[1]}]
370 
##Bank = 35, Pin name = IO_L6N_T0_VREF_35,                                      Sch name = VGA_B2
371 
#set_property PACKAGE_PIN D7 [get_ports {vgaBlue[2]}]
372 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[2]}]
373 
##Bank = 35, Pin name = IO_L4P_T0_35,                                           Sch name = VGA_B3
374 
#set_property PACKAGE_PIN D8 [get_ports {vgaBlue[3]}]
375 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[3]}]
376 
##Bank = 35, Pin name = IO_L1P_T0_AD4P_35,                                      Sch name = VGA_G0
377 
#set_property PACKAGE_PIN C6 [get_ports {vgaGreen[0]}]
378 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[0]}]
379 
##Bank = 35, Pin name = IO_L3N_T0_DQS_AD5N_35,                          Sch name = VGA_G1
380 
#set_property PACKAGE_PIN A5 [get_ports {vgaGreen[1]}]
381 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[1]}]
382 
##Bank = 35, Pin name = IO_L2N_T0_AD12N_35,                                     Sch name = VGA_G2
383 
#set_property PACKAGE_PIN B6 [get_ports {vgaGreen[2]}]
384 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[2]}]
385 
##Bank = 35, Pin name = IO_L3P_T0_DQS_AD5P_35,                          Sch name = VGA_G3
386 
#set_property PACKAGE_PIN A6 [get_ports {vgaGreen[3]}]
387 
        #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[3]}]
388 
##Bank = 15, Pin name = IO_L4P_T0_15,                                           Sch name = VGA_HS
389 
#set_property PACKAGE_PIN B11 [get_ports Hsync]
390 
        #set_property IOSTANDARD LVCMOS33 [get_ports Hsync]
391 
##Bank = 15, Pin name = IO_L3N_T0_DQS_AD1N_15,                          Sch name = VGA_VS
392 
#set_property PACKAGE_PIN B12 [get_ports Vsync]
393 
        #set_property IOSTANDARD LVCMOS33 [get_ports Vsync]
394 
 
395 
 
396 
 
397 
##Micro SD Connector
398 
##Bank = 35, Pin name = IO_L14P_T2_SRCC_35,                                     Sch name = SD_RESET
399 
#set_property PACKAGE_PIN E2 [get_ports sdReset]
400 
        #set_property IOSTANDARD LVCMOS33 [get_ports sdReset]
401 
##Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35,                          Sch name = SD_CD
402 
#set_property PACKAGE_PIN A1 [get_ports sdCD]
403 
        #set_property IOSTANDARD LVCMOS33 [get_ports sdCD]
404 
##Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35,                          Sch name = SD_SCK
405 
#set_property PACKAGE_PIN B1 [get_ports sdSCK]
406 
        #set_property IOSTANDARD LVCMOS33 [get_ports sdSCK]
407 
##Bank = 35, Pin name = IO_L16N_T2_35,                                          Sch name = SD_CMD
408 
#set_property PACKAGE_PIN C1 [get_ports sdCmd]
409 
        #set_property IOSTANDARD LVCMOS33 [get_ports sdCmd]
410 
##Bank = 35, Pin name = IO_L16P_T2_35,                                          Sch name = SD_DAT0
411 
#set_property PACKAGE_PIN C2 [get_ports {sdData[0]}]
412 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[0]}]
413 
##Bank = 35, Pin name = IO_L18N_T2_35,                                          Sch name = SD_DAT1
414 
#set_property PACKAGE_PIN E1 [get_ports {sdData[1]}]
415 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[1]}]
416 
##Bank = 35, Pin name = IO_L18P_T2_35,                                          Sch name = SD_DAT2
417 
#set_property PACKAGE_PIN F1 [get_ports {sdData[2]}]
418 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[2]}]
419 
##Bank = 35, Pin name = IO_L14N_T2_SRCC_35,                                     Sch name = SD_DAT3
420 
#set_property PACKAGE_PIN D2 [get_ports {sdData[3]}]
421 
        #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[3]}]
422 
 
423 
 
424 
 
425 
##Accelerometer
426 
##Bank = 15, Pin name = IO_L6N_T0_VREF_15,                                      Sch name = ACL_MISO
427 
#set_property PACKAGE_PIN D13 [get_ports aclMISO]
428 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclMISO]
429 
##Bank = 15, Pin name = IO_L2N_T0_AD8N_15,                                      Sch name = ACL_MOSI
430 
#set_property PACKAGE_PIN B14 [get_ports aclMOSI]
431 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclMOSI]
432 
##Bank = 15, Pin name = IO_L12P_T1_MRCC_15,                                     Sch name = ACL_SCLK
433 
#set_property PACKAGE_PIN D15 [get_ports aclSCK]
434 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclSCK]
435 
##Bank = 15, Pin name = IO_L12N_T1_MRCC_15,                                     Sch name = ACL_CSN
436 
#set_property PACKAGE_PIN C15 [get_ports aclSS]
437 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclSS]
438 
##Bank = 15, Pin name = IO_L20P_T3_A20_15,                                      Sch name = ACL_INT1
439 
#set_property PACKAGE_PIN C16 [get_ports aclInt1]
440 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclInt1]
441 
##Bank = 15, Pin name = IO_L11P_T1_SRCC_15,                                     Sch name = ACL_INT2
442 
#set_property PACKAGE_PIN E15 [get_ports aclInt2]
443 
        #set_property IOSTANDARD LVCMOS33 [get_ports aclInt2]
444 
 
445 
 
446 
 
447 
##Temperature Sensor
448 
##Bank = 15, Pin name = IO_L14N_T2_SRCC_15,                                     Sch name = TMP_SCL
449 
#set_property PACKAGE_PIN F16 [get_ports tmpSCL]
450 
        #set_property IOSTANDARD LVCMOS33 [get_ports tmpSCL]
451 
##Bank = 15, Pin name = IO_L13N_T2_MRCC_15,                                     Sch name = TMP_SDA
452 
#set_property PACKAGE_PIN G16 [get_ports tmpSDA]
453 
        #set_property IOSTANDARD LVCMOS33 [get_ports tmpSDA]
454 
##Bank = 15, Pin name = IO_L1P_T0_AD0P_15,                                      Sch name = TMP_INT
455 
#set_property PACKAGE_PIN D14 [get_ports tmpInt]
456 
        #set_property IOSTANDARD LVCMOS33 [get_ports tmpInt]
457 
##Bank = 15, Pin name = IO_L1N_T0_AD0N_15,                                      Sch name = TMP_CT
458 
#set_property PACKAGE_PIN C14 [get_ports tmpCT]
459 
        #set_property IOSTANDARD LVCMOS33 [get_ports tmpCT]
460 
 
461 
 
462 
 
463 
##Omnidirectional Microphone
464 
##Bank = 35, Pin name = IO_25_35,                                                       Sch name = M_CLK
465 
#set_property PACKAGE_PIN J5 [get_ports micClk]
466 
        #set_property IOSTANDARD LVCMOS33 [get_ports micClk]
467 
##Bank = 35, Pin name = IO_L24N_T3_35,                                          Sch name = M_DATA
468 
#set_property PACKAGE_PIN H5 [get_ports micData]
469 
        #set_property IOSTANDARD LVCMOS33 [get_ports micData]
470 
##Bank = 35, Pin name = IO_0_35,                                                                Sch name = M_LRSEL
471 
#set_property PACKAGE_PIN F5 [get_ports micLRSel]
472 
        #set_property IOSTANDARD LVCMOS33 [get_ports micLRSel]
473 
 
474 
 
475 
 
476 
##PWM Audio Amplifier
477 
##Bank = 15, Pin name = IO_L4N_T0_15,                                           Sch name = AUD_PWM
478 
#set_property PACKAGE_PIN A11 [get_ports ampPWM]
479 
        #set_property IOSTANDARD LVCMOS33 [get_ports ampPWM]
480 
##Bank = 15, Pin name = IO_L6P_T0_15,                                           Sch name = AUD_SD
481 
#set_property PACKAGE_PIN D12 [get_ports ampSD]
482 
        #set_property IOSTANDARD LVCMOS33 [get_ports ampSD]
483 
 
484 
 
485 
##USB-RS232 Interface
486 
##Bank = 35, Pin name = IO_L7P_T1_AD6P_35,                                      Sch name = UART_TXD_IN
487 
#set_property PACKAGE_PIN C4 [get_ports RsRx]
488 
        #set_property IOSTANDARD LVCMOS33 [get_ports RsRx]
489 
##Bank = 35, Pin name = IO_L11N_T1_SRCC_35,                                     Sch name = UART_RXD_OUT
490 
#set_property PACKAGE_PIN D4 [get_ports RsTx]
491 
        #set_property IOSTANDARD LVCMOS33 [get_ports RsTx]
492 
##Bank = 35, Pin name = IO_L12N_T1_MRCC_35,                                     Sch name = UART_CTS
493 
#set_property PACKAGE_PIN D3 [get_ports RsCts]
494 
        #set_property IOSTANDARD LVCMOS33 [get_ports RsCts]
495 
##Bank = 35, Pin name = IO_L5N_T0_AD13N_35,                                     Sch name = UART_RTS
496 
#set_property PACKAGE_PIN E5 [get_ports RsRts]
497 
        #set_property IOSTANDARD LVCMOS33 [get_ports RsRts]
498 
 
499 
 
500 
 
501 
##USB HID (PS/2)
502 
##Bank = 35, Pin name = IO_L13P_T2_MRCC_35,                                     Sch name = PS2_CLK
503 
#set_property PACKAGE_PIN F4 [get_ports PS2Clk]
504 
        #set_property IOSTANDARD LVCMOS33 [get_ports PS2Clk]
505 
        #set_property PULLUP true [get_ports PS2Clk]
506 
##Bank = 35, Pin name = IO_L10N_T1_AD15N_35,                                    Sch name = PS2_DATA
507 
#set_property PACKAGE_PIN B2 [get_ports PS2Data]
508 
        #set_property IOSTANDARD LVCMOS33 [get_ports PS2Data]
509 
        #set_property PULLUP true [get_ports PS2Data]
510 
 
511 
 
512 
 
513 
##SMSC Ethernet PHY
514 
##Bank = 16, Pin name = IO_L11P_T1_SRCC_16,                                     Sch name = ETH_MDC
515 
#set_property PACKAGE_PIN C9 [get_ports PhyMdc]
516 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyMdc]
517 
##Bank = 16, Pin name = IO_L14N_T2_SRCC_16,                                     Sch name = ETH_MDIO
518 
#set_property PACKAGE_PIN A9 [get_ports PhyMdio]
519 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyMdio]
520 
##Bank = 35, Pin name = IO_L10P_T1_AD15P_35,                                    Sch name = ETH_RSTN
521 
#set_property PACKAGE_PIN B3 [get_ports PhyRstn]
522 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyRstn]
523 
##Bank = 16, Pin name = IO_L6N_T0_VREF_16,                                      Sch name = ETH_CRSDV
524 
#set_property PACKAGE_PIN D9 [get_ports PhyCrs]
525 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyCrs]
526 
##Bank = 16, Pin name = IO_L13N_T2_MRCC_16,                                     Sch name = ETH_RXERR
527 
#set_property PACKAGE_PIN C10 [get_ports PhyRxErr]
528 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyRxErr]
529 
##Bank = 16, Pin name = IO_L19N_T3_VREF_16,                                     Sch name = ETH_RXD0
530 
#set_property PACKAGE_PIN D10 [get_ports {PhyRxd[0]}]
531 
        #set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[0]}]
532 
##Bank = 16, Pin name = IO_L13P_T2_MRCC_16,                                     Sch name = ETH_RXD1
533 
#set_property PACKAGE_PIN C11 [get_ports {PhyRxd[1]}]
534 
        #set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[1]}]
535 
##Bank = 16, Pin name = IO_L11N_T1_SRCC_16,                                     Sch name = ETH_TXEN
536 
#set_property PACKAGE_PIN B9 [get_ports PhyTxEn]
537 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyTxEn]
538 
##Bank = 16, Pin name = IO_L14P_T2_SRCC_16,                                     Sch name = ETH_TXD0
539 
#set_property PACKAGE_PIN A10 [get_ports {PhyTxd[0]}]
540 
        #set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[0]}]
541 
##Bank = 16, Pin name = IO_L12N_T1_MRCC_16,                                     Sch name = ETH_TXD1
542 
#set_property PACKAGE_PIN A8 [get_ports {PhyTxd[1]}]
543 
        #set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[1]}]
544 
##Bank = 35, Pin name = IO_L11P_T1_SRCC_35,                                     Sch name = ETH_REFCLK
545 
#set_property PACKAGE_PIN D5 [get_ports PhyClk50Mhz]
546 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyClk50Mhz]
547 
##Bank = 16, Pin name = IO_L12P_T1_MRCC_16,                                     Sch name = ETH_INTN
548 
#set_property PACKAGE_PIN B8 [get_ports PhyIntn]
549 
        #set_property IOSTANDARD LVCMOS33 [get_ports PhyIntn]
550 
 
551 
 
552 
 
553 
##Quad SPI Flash
554 
##Bank = CONFIG, Pin name = CCLK_0,                                                     Sch name = QSPI_SCK
555 
#set_property PACKAGE_PIN E9 [get_ports {QspiSCK}]
556 
        #set_property IOSTANDARD LVCMOS33 [get_ports {QspiSCK}]
557 
##Bank = CONFIG, Pin name = IO_L1P_T0_D00_MOSI_14,                      Sch name = QSPI_DQ0
558 
#set_property PACKAGE_PIN K17 [get_ports {QspiDB[0]}]
559 
        #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[0]}]
560 
##Bank = CONFIG, Pin name = IO_L1N_T0_D01_DIN_14,                       Sch name = QSPI_DQ1
561 
#set_property PACKAGE_PIN K18 [get_ports {QspiDB[1]}]
562 
        #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[1]}]
563 
##Bank = CONFIG, Pin name = IO_L20_T0_D02_14,                           Sch name = QSPI_DQ2
564 
#set_property PACKAGE_PIN L14 [get_ports {QspiDB[2]}]
565 
        #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[2]}]
566 
##Bank = CONFIG, Pin name = IO_L2P_T0_D03_14,                           Sch name = QSPI_DQ3
567 
#set_property PACKAGE_PIN M14 [get_ports {QspiDB[3]}]
568 
        #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[3]}]
569 
##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14,       Sch name = QSPI_CSN
570 
#set_property PACKAGE_PIN L13 [get_ports QspiCSn]
571 
        #set_property IOSTANDARD LVCMOS33 [get_ports QspiCSn]
572 
 
573 
 
574 
 
575 
##Cellular RAM
576 
##Bank = 14, Pin name = IO_L14N_T2_SRCC_14,                                     Sch name = CRAM_CLK
577 
#set_property PACKAGE_PIN T15 [get_ports RamCLK]
578 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamCLK]
579 
##Bank = 14, Pin name = IO_L23P_T3_A03_D19_14,                          Sch name = CRAM_ADVN
580 
#set_property PACKAGE_PIN T13 [get_ports RamADVn]
581 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamADVn]
582 
##Bank = 14, Pin name = IO_L4P_T0_D04_14,                                       Sch name = CRAM_CEN
583 
#set_property PACKAGE_PIN L18 [get_ports RamCEn]
584 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamCEn]
585 
##Bank = 15, Pin name = IO_L19P_T3_A22_15,                                      Sch name = CRAM_CRE
586 
#set_property PACKAGE_PIN J14 [get_ports RamCRE]
587 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamCRE]
588 
##Bank = 15, Pin name = IO_L15P_T2_DQS_15,                                      Sch name = CRAM_OEN
589 
#set_property PACKAGE_PIN H14 [get_ports RamOEn]
590 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamOEn]
591 
##Bank = 14, Pin name = IO_0_14,                                                                Sch name = CRAM_WEN
592 
#set_property PACKAGE_PIN R11 [get_ports RamWEn]
593 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamWEn]
594 
##Bank = 15, Pin name = IO_L24N_T3_RS0_15,                                      Sch name = CRAM_LBN
595 
#set_property PACKAGE_PIN J15 [get_ports RamLBn]
596 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamLBn]
597 
##Bank = 15, Pin name = IO_L17N_T2_A25_15,                                      Sch name = CRAM_UBN
598 
#set_property PACKAGE_PIN J13 [get_ports RamUBn]
599 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamUBn]
600 
##Bank = 14, Pin name = IO_L14P_T2_SRCC_14,                                     Sch name = CRAM_WAIT
601 
#set_property PACKAGE_PIN T14 [get_ports RamWait]
602 
        #set_property IOSTANDARD LVCMOS33 [get_ports RamWait]
603 
 
604 
##Bank = 14, Pin name = IO_L5P_T0_DQ06_14,                                      Sch name = CRAM_DQ0
605 
#set_property PACKAGE_PIN R12 [get_ports {MemDB[0]}]
606 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[0]}]
607 
##Bank = 14, Pin name = IO_L19P_T3_A10_D26_14,                          Sch name = CRAM_DQ1
608 
#set_property PACKAGE_PIN T11 [get_ports {MemDB[1]}]
609 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[1]}]
610 
##Bank = 14, Pin name = IO_L20P_T3_A08)D24_14,                          Sch name = CRAM_DQ2
611 
#set_property PACKAGE_PIN U12 [get_ports {MemDB[2]}]
612 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[2]}]
613 
##Bank = 14, Pin name = IO_L5N_T0_D07_14,                                       Sch name = CRAM_DQ3
614 
#set_property PACKAGE_PIN R13 [get_ports {MemDB[3]}]
615 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[3]}]
616 
##Bank = 14, Pin name = IO_L17N_T2_A13_D29_14,                          Sch name = CRAM_DQ4
617 
#set_property PACKAGE_PIN U18 [get_ports {MemDB[4]}]
618 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[4]}]
619 
##Bank = 14, Pin name = IO_L12N_T1_MRCC_14,                                     Sch name = CRAM_DQ5
620 
#set_property PACKAGE_PIN R17 [get_ports {MemDB[5]}]
621 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[5]}]
622 
##Bank = 14, Pin name = IO_L7N_T1_D10_14,                                       Sch name = CRAM_DQ6
623 
#set_property PACKAGE_PIN T18 [get_ports {MemDB[6]}]
624 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[6]}]
625 
##Bank = 14, Pin name = IO_L7P_T1_D09_14,                                       Sch name = CRAM_DQ7
626 
#set_property PACKAGE_PIN R18 [get_ports {MemDB[7]}]
627 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[7]}]
628 
##Bank = 15, Pin name = IO_L22N_T3_A16_15,                                      Sch name = CRAM_DQ8
629 
#set_property PACKAGE_PIN F18 [get_ports {MemDB[8]}]
630 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[8]}]
631 
##Bank = 15, Pin name = IO_L22P_T3_A17_15,                                      Sch name = CRAM_DQ9
632 
#set_property PACKAGE_PIN G18 [get_ports {MemDB[9]}]
633 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[9]}]
634 
##Bank = 15, Pin name = IO_IO_L18N_T2_A23_15,                           Sch name = CRAM_DQ10
635 
#set_property PACKAGE_PIN G17 [get_ports {MemDB[10]}]
636 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[10]}]
637 
##Bank = 14, Pin name = IO_L4N_T0_D05_14,                                       Sch name = CRAM_DQ11
638 
#set_property PACKAGE_PIN M18 [get_ports {MemDB[11]}]
639 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[11]}]
640 
##Bank = 14, Pin name = IO_L10N_T1_D15_14,                                      Sch name = CRAM_DQ12
641 
#set_property PACKAGE_PIN M17 [get_ports {MemDB[12]}]
642 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[12]}]
643 
##Bank = 14, Pin name = IO_L9N_T1_DQS_D13_14,                           Sch name = CRAM_DQ13
644 
#set_property PACKAGE_PIN P18 [get_ports {MemDB[13]}]
645 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[13]}]
646 
##Bank = 14, Pin name = IO_L9P_T1_DQS_14,                                       Sch name = CRAM_DQ14
647 
#set_property PACKAGE_PIN N17 [get_ports {MemDB[14]}]
648 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[14]}]
649 
##Bank = 14, Pin name = IO_L12P_T1_MRCC_14,                                     Sch name = CRAM_DQ15
650 
#set_property PACKAGE_PIN P17 [get_ports {MemDB[15]}]
651 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[15]}]
652 
 
653 
##Bank = 15, Pin name = IO_L23N_T3_FWE_B_15,                                    Sch name = CRAM_A0
654 
#set_property PACKAGE_PIN J18 [get_ports {MemAdr[0]}]
655 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[0]}]
656 
##Bank = 15, Pin name = IO_L18P_T2_A24_15,                                      Sch name = CRAM_A1
657 
#set_property PACKAGE_PIN H17 [get_ports {MemAdr[1]}]
658 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[1]}]
659 
##Bank = 15, Pin name = IO_L19N_T3_A21_VREF_15,                         Sch name = CRAM_A2
660 
#set_property PACKAGE_PIN H15 [get_ports {MemAdr[2]}]
661 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[2]}]
662 
##Bank = 15, Pin name = IO_L23P_T3_FOE_B_15,                                    Sch name = CRAM_A3
663 
#set_property PACKAGE_PIN J17 [get_ports {MemAdr[3]}]
664 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[3]}]
665 
##Bank = 15, Pin name = IO_L13P_T2_MRCC_15,                                     Sch name = CRAM_A4
666 
#set_property PACKAGE_PIN H16 [get_ports {MemAdr[4]}]
667 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[4]}]
668 
##Bank = 15, Pin name = IO_L24P_T3_RS1_15,                                      Sch name = CRAM_A5
669 
#set_property PACKAGE_PIN K15 [get_ports {MemAdr[5]}]
670 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[5]}]
671 
##Bank = 15, Pin name = IO_L17P_T2_A26_15,                                      Sch name = CRAM_A6
672 
#set_property PACKAGE_PIN K13 [get_ports {MemAdr[6]}]
673 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[6]}]
674 
##Bank = 14, Pin name = IO_L11P_T1_SRCC_14,                                     Sch name = CRAM_A7
675 
#set_property PACKAGE_PIN N15 [get_ports {MemAdr[7]}]
676 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[7]}]
677 
##Bank = 14, Pin name = IO_L16N_T2_SRCC-14,                                     Sch name = CRAM_A8
678 
#set_property PACKAGE_PIN V16 [get_ports {MemAdr[8]}]
679 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[8]}]
680 
##Bank = 14, Pin name = IO_L22P_T3_A05_D21_14,                          Sch name = CRAM_A9
681 
#set_property PACKAGE_PIN U14 [get_ports {MemAdr[9]}]
682 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[9]}]
683 
##Bank = 14, Pin name = IO_L22N_T3_A04_D20_14,                          Sch name = CRAM_A10
684 
#set_property PACKAGE_PIN V14 [get_ports {MemAdr[10]}]
685 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[10]}]
686 
##Bank = 14, Pin name = IO_L20N_T3_A07_D23_14,                          Sch name = CRAM_A11
687 
#set_property PACKAGE_PIN V12 [get_ports {MemAdr[11]}]
688 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[11]}]
689 
##Bank = 14, Pin name = IO_L8N_T1_D12_14,                                       Sch name = CRAM_A12
690 
#set_property PACKAGE_PIN P14 [get_ports {MemAdr[12]}]
691 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[12]}]
692 
##Bank = 14, Pin name = IO_L18P_T2_A12_D28_14,                          Sch name = CRAM_A13
693 
#set_property PACKAGE_PIN U16 [get_ports {MemAdr[13]}]
694 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[13]}]
695 
##Bank = 14, Pin name = IO_L13N_T2_MRCC_14,                                     Sch name = CRAM_A14
696 
#set_property PACKAGE_PIN R15 [get_ports {MemAdr[14]}]
697 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[14]}]
698 
##Bank = 14, Pin name = IO_L8P_T1_D11_14,                                       Sch name = CRAM_A15
699 
#set_property PACKAGE_PIN N14 [get_ports {MemAdr[15]}]
700 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[15]}]
701 
##Bank = 14, Pin name = IO_L11N_T1_SRCC_14,                                     Sch name = CRAM_A16
702 
#set_property PACKAGE_PIN N16 [get_ports {MemAdr[16]}]
703 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[16]}]
704 
##Bank = 14, Pin name = IO_L6N_T0_D08_VREF_14,                          Sch name = CRAM_A17
705 
#set_property PACKAGE_PIN M13 [get_ports {MemAdr[17]}]
706 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[17]}]
707 
##Bank = 14, Pin name = IO_L18N_T2_A11_D27_14,                          Sch name = CRAM_A18
708 
#set_property PACKAGE_PIN V17 [get_ports {MemAdr[18]}]
709 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[18]}]
710 
##Bank = 14, Pin name = IO_L17P_T2_A14_D30_14,                          Sch name = CRAM_A19
711 
#set_property PACKAGE_PIN U17 [get_ports {MemAdr[19]}]
712 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[19]}]
713 
##Bank = 14, Pin name = IO_L24N_T3_A00_D16_14,                          Sch name = CRAM_A20
714 
#set_property PACKAGE_PIN T10 [get_ports {MemAdr[20]}]
715 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[20]}]
716 
##Bank = 14, Pin name = IO_L10P_T1_D14_14,                                      Sch name = CRAM_A21
717 
#set_property PACKAGE_PIN M16 [get_ports {MemAdr[21]}]
718 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[21]}]
719 
##Bank = 14, Pin name = IO_L23N_T3_A02_D18_14,                          Sch name = CRAM_A22
720 
#set_property PACKAGE_PIN U13 [get_ports {MemAdr[22]}]
721 
        #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[22]}]
722 
 

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