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[/] [vhdl-pipeline-mips/] [trunk/] [segmented_mips_tb.vhd] - Blame information for rev 2

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Line No. Rev Author Line
1 2 elujan
--
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-- Test bench del procesador MIPS Segmentado
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--
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-- Licencia: Copyright 2008 Emmanuel Luján
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--
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--      This program is free software; you can redistribute it and/or
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--      modify it under the terms of the GNU General Public License as
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--      published by the Free Software Foundation; either version 2 of
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--      the License, or (at your option) any later version. This program
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--      is distributed in the hope that it will be useful, but WITHOUT
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--      ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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--      or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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--      License for more details. You should have received a copy of the
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--      GNU General Public License along with this program; if not, write
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--      to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
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--      Boston, MA 02110-1301 USA.
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-- 
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-- Autor:       Emmanuel Luján
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-- Email:       info@emmanuellujan.com.ar
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-- Versión:    1.0
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--
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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use IEEE.numeric_std.all;
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entity SEGMENTED_MIPS_TB is
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end SEGMENTED_MIPS_TB;
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architecture SEGMENTED_MIPS_TB_ARC of SEGMENTED_MIPS_TB is
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-- Declaración de componentes
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        component SEGMENTED_MIPS is
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                port(
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                        CLK      :      in STD_LOGIC;
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                        RESET    :      in STD_LOGIC
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                );
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        end component SEGMENTED_MIPS;
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-- Declaración de señales
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        signal CLK      : STD_LOGIC;
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        signal RESET    : STD_LOGIC;
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begin
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        MIPS_TB:
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                SEGMENTED_MIPS port map(
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                        CLK => CLK,
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                        RESET => RESET
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                );
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        CLK_PROC:
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                process
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                begin
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                        while true loop
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                                CLK <= '0';
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                                wait for 10 ns;
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                                CLK <= '1';
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                                wait for 10 ns;
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                        end loop;
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                end process CLK_PROC;
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        RESET_PROC:
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                process
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                begin
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                        RESET<='1';
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                        wait for 40 ns;
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                        RESET<='0';
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                        wait;
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                end process RESET_PROC;
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end SEGMENTED_MIPS_TB_ARC;

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