URL https://opencores.org/ocsvn/vhdl_cpu_emulator/vhdl_cpu_emulator/trunk

Subversion Repositories vhdl_cpu_emulator

[/] [vhdl_cpu_emulator/] [trunk/] [thr_rx_uart0.txt] - Blame information for rev 3

Details | Compare with Previous | View Log


#wait for interrupt thread to do initialization
PARAMETERS STRING outfile
WAIT 30 ns
CLEAR outfile
 
WHILE
 
        WAIT 3 us
 
        #check if data received interrupt
        vector8 tmp = int0shadow
        tmp &= 00000010
        IF tmp == 00000010
        int0shadow &= 11111101
        READ 00010111 tmp
        PRINT outfile tmp
        IF_END
 
WHILE_END

Line No.	Rev	Author	Line
1	2	nachumk	`#wait for interrupt thread to do initialization`
2			`PARAMETERS STRING outfile`
3			`WAIT 30 ns`
4			`CLEAR outfile`
5
6			`WHILE`
7
8			`WAIT 3 us`
9
10			`#check if data received interrupt`
11			`vector8 tmp = int0shadow`
12			`tmp &= 00000010`
13			`IF tmp == 00000010`
14			`int0shadow &= 11111101`
15			`READ 00010111 tmp`
16			`PRINT outfile tmp`
17			`IF_END`
18
19			`WHILE_END`

Browse

Tools

Subversion Repositories vhdl_cpu_emulator

[/] [vhdl_cpu_emulator/] [trunk/] [thr_rx_uart0.txt] - Blame information for rev 3