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[/] [vspi/] [trunk/] [projnav/] [xps/] [SDK/] [SDK_Workspace/] [xps_hw_platform/] [system.xml] - Blame information for rev 14

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      MicroBlaze
      The MicroBlaze 32 bit soft processor
      
        
      
      
      
        
        
        
        
        
        
        
        
          Enable Fault Tolerance Support
        
        
        
        
        
          Select implementation to optimize area (with lower instruction throughput)
        
        
        
          Select Bus Interfaces
        
        
          Select Stream Interfaces
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          Enable Additional Machine Status Register Instructions
        
        
          Enable Pattern Comparator
        
        
          Enable Barrel Shifter
        
        
          Enable Integer Divider
        
        
          Enable Integer Multiplier
        
        
          Enable Floating Point Unit
        
        
          Enable Unaligned Data Exception
        
        
          Enable Illegal Instruction Exception
        
        
          Enable Instruction-side AXI Exception
        
        
          Enable Data-side AXI Exception
        
        
          Enable Instruction-side PLB Exception
        
        
          Enable Data-side PLB Exception
        
        
          Enable Integer Divide Exception
        
        
          Enable Floating Point Unit Exceptions
        
        
          Enable Stream Exception
        
        
          <qt>Enable stack protection</qt>
        
        
          Specifies Processor Version Register
        
        
          Specify USER1 Bits in Processor Version Register
        
        
          Specify USER2 Bits in Processor Version Registers
        
        
          Enable MicroBlaze Debug Module Interface
        
        
          Number of PC Breakpoints 
        
        
          Number of Read Address Watchpoints 
        
        
          Number of Write Address Watchpoints 
        
        
          Sense Interrupt on Edge vs. Level 
        
        
          Sense Interrupt on Rising vs. Falling Edge 
        
        
          Specify Reset Value for Select MSR Bits
        
        
          <qt>Generate Illegal Instruction Exception for NULL Instruction</qt>
        
        
          Number of Stream Links 
        
        
        
          Enable Additional Stream Instructions
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          Base Address 
        
        
          High Address 
        
        
          Enable Instruction Cache 
        
        
          Enable Writes
        
        
        
          Size in Bytes
        
        
        
          Line Length
        
        
          Use Cache Links for All Memory Accesses 
        
        
        
          Number of Victims
        
        
          Number of Streams
        
        
          Use Distributed RAM for Tags
        
        
          Data Width
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          Base Address
        
        
          High Address
        
        
          Enable Data Cache
        
        
          Enable Writes
        
        
        
          Size in Bytes
        
        
        
          Line Length
        
        
          Use Cache Links for All Memory Accesses 
        
        
        
          Enable Write-back Storage Policy
        
        
          Number of Victims
        
        
          Use Distributed RAM for Tags
        
        
          Data Width
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          Memory Management
        
        
          Data Shadow Translation Look-Aside Buffer Size
        
        
          Instruction Shadow Translation Look-Aside Buffer Size
        
        
          Enable Access to Memory Management Special Registers
        
        
          Number of Memory Protection Zones
        
        
          Privileged Instructions
        
        
        
        
        
          Enable Branch Target Cache
        
        
          Branch Target Cache Size
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
      
      
        
        
        
        
        
        
        
        
      
    
    
      Processor Local Bus (PLB) 4.6
      'Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only arbitration feature'
      
        
      
      
      
        
          Number of PLB Masters
        
        
          Number of PLB Slaves
        
        
          PLB Master ID Bus Width
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          Include DCR Interface and Error Registers
        
        
          Base Address
        
        
          High Address
        
        
          DCR Address Bus Width
        
        
          DCR Data Bus Width
        
        
          External Reset Active High 
        
        
          IRQ Active State 
        
        
          <qt>Number of PLB Clock Periods a PLB Master that Received a Rearbitrate from an OPB2PLB Bridge on a Read Operation is Denied Grant on the PLB Bus</qt>
        
        
          Enable Address Pipelining Type
        
        
          Device Family
        
        
          Optimize PLB for Point-to-point Topology
        
        
          Selects the Arbitration Scheme
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
      
    
    
      Local Memory Bus (LMB) 1.0
      'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'
      
        
      
      
      
        
          Number of Bus Slaves 
        
        
          LMB Address Bus Width 
        
        
          LMB Data Bus Width 
        
        
          Active High External Reset
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
      
        
      
    
    
      Local Memory Bus (LMB) 1.0
      'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'
      
        
      
      
      
        
          Number of Bus Slaves 
        
        
          LMB Address Bus Width 
        
        
          LMB Data Bus Width 
        
        
          Active High External Reset
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
      
        
      
    
    
      LMB BRAM Controller
      Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus
      
        
      
      
      
        
          LMB BRAM Base Address
        
        
          LMB BRAM High Address
        
        
        
          LMB Address Decode Mask
        
        
          LMB Address Bus Width 
        
        
          LMB Data Bus Width 
        
        
          Error Correction Code 
        
        
          Select Interconnect 
        
        
          Fault Inject Registers 
        
        
          Correctable Error First Failing Register 
        
        
          Uncorrectable Error First Failing Register 
        
        
          ECC Status and Control Register 
        
        
          ECC On/Off Register 
        
        
          ECC On/Off Reset Value 
        
        
          Correctable Error Counter Register Width
        
        
          Write Access setting 
        
        
          Base Address for PLB Interface
        
        
          High Address for PLB Interface
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          PLB Slave is Capable of Bursts
        
        
          Native Data Bus Width of PLB Slave
        
        
          Frequency of PLB Slave
        
        
          S_AXI_CTRL Clock Frequency
        
        
          S_AXI_CTRL Base Address
        
        
          S_AXI_CTRL High Address
        
        
          S_AXI_CTRL Address Width
        
        
          S_AXI_CTRL Data Width
        
        
          S_AXI_CTRL Protocol
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
      
    
    
      LMB BRAM Controller
      Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus
      
        
      
      
      
        
          LMB BRAM Base Address
        
        
          LMB BRAM High Address
        
        
        
          LMB Address Decode Mask
        
        
          LMB Address Bus Width 
        
        
          LMB Data Bus Width 
        
        
          Error Correction Code 
        
        
          Select Interconnect 
        
        
          Fault Inject Registers 
        
        
          Correctable Error First Failing Register 
        
        
          Uncorrectable Error First Failing Register 
        
        
          ECC Status and Control Register 
        
        
          ECC On/Off Register 
        
        
          ECC On/Off Reset Value 
        
        
          Correctable Error Counter Register Width
        
        
          Write Access setting 
        
        
          Base Address for PLB Interface
        
        
          High Address for PLB Interface
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          PLB Slave is Capable of Bursts
        
        
          Native Data Bus Width of PLB Slave
        
        
          Frequency of PLB Slave
        
        
          S_AXI_CTRL Clock Frequency
        
        
          S_AXI_CTRL Base Address
        
        
          S_AXI_CTRL High Address
        
        
          S_AXI_CTRL Address Width
        
        
          S_AXI_CTRL Data Width
        
        
          S_AXI_CTRL Protocol
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
      
    
    
      Block RAM (BRAM) Block
      The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers.
      
        
      
      
      
        
          Size of BRAM(s) in Bytes
        
        
          Data Width of Port A and B
        
        
          Address Width of Port A and B
        
        
          Number of Byte Write Enables
        
        
          Device Family
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
          
        
      
    
    
      XPS General Purpose IO
      General Purpose Input/Output (GPIO) core for the PLBV46 bus.
      
        
      
      
      
        
          Base Address
        
        
          High Address
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          Native Data Bus Width of PLB Slave
        
        
          PLB Slave is Capable of Bursts
        
        
          Device Family
        
        
          Channel 1 is Input Only 
        
        
          Channel 2 is Input Only 
        
        
          GPIO Data Channel Width
          GPIO Data Width
        
        
          GPIO2 Data Channel Width
        
        
          GPIO Supports Interrupts
        
        
          Channel 1 Data Out Default Value 
        
        
          Channel 1 Tri-state Default Value 
        
        
          Enable Channel 2 
        
        
          Channel 2 Data Out Default Value 
        
        
          Channel 2 Tri-state Default Value 
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          GPIO1 Data IO
        
        
          GPIO2 Data IO
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
      
    
    
      XPS General Purpose IO
      General Purpose Input/Output (GPIO) core for the PLBV46 bus.
      
        
      
      
      
        
          Base Address
        
        
          High Address
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          Native Data Bus Width of PLB Slave
        
        
          PLB Slave is Capable of Bursts
        
        
          Device Family
        
        
          Channel 1 is Input Only 
        
        
          Channel 2 is Input Only 
        
        
          GPIO Data Channel Width
          GPIO Data Width
        
        
          GPIO2 Data Channel Width
        
        
          GPIO Supports Interrupts
        
        
          Channel 1 Data Out Default Value 
        
        
          Channel 1 Tri-state Default Value 
        
        
          Enable Channel 2 
        
        
          Channel 2 Data Out Default Value 
        
        
          Channel 2 Tri-state Default Value 
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          GPIO1 Data IO
        
        
          GPIO2 Data IO
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
      
    
    
      XPS General Purpose IO
      General Purpose Input/Output (GPIO) core for the PLBV46 bus.
      
        
      
      
      
        
          Base Address
        
        
          High Address
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          Native Data Bus Width of PLB Slave
        
        
          PLB Slave is Capable of Bursts
        
        
          Device Family
        
        
          Channel 1 is Input Only 
        
        
          Channel 2 is Input Only 
        
        
          GPIO Data Channel Width
          GPIO Data Width
        
        
          GPIO2 Data Channel Width
        
        
          GPIO Supports Interrupts
        
        
          Channel 1 Data Out Default Value 
        
        
          Channel 1 Tri-state Default Value 
        
        
          Enable Channel 2 
        
        
          Channel 2 Data Out Default Value 
        
        
          Channel 2 Tri-state Default Value 
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
          GPIO1 Data IO
        
        
          GPIO2 Data IO
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
      
    
    
      Clock Generator
      Clock generator for processor system.
      
        
      
      
      
        
          Family
        
        
          Device
        
        
          Package
        
        
          Speed Grade
        
        
          Input Clock Frequency (Hz) 
        
        
          Required Frequency (Hz)
        
        
          Required Phase 
        
        
          Required Group
        
        
          Buffered 
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group 
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group 
        
        
          Buffered
        
        
          Varaible Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group 
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase 
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
           Varaible Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
           Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
           Variable Phase
        
        
          Required Frequency (Hz)
        
        
          Clock Deskew
        
        
          Required Frequency (Hz)
        
        
          Required Phase
        
        
          Required Group
        
        
          Buffered
        
        
          Variable Phase Shift
        
        
        
          Clock Primitive Feedback Buffer
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
    
    
      MicroBlaze Debug Module (MDM)
      Debug module for MicroBlaze Soft Processor.
      
        
      
      
      
        
          Device Family
        
        
          Specifies the JTAG user-defined register used 
        
        
          Specifies the Bus Interface for the JTAG UART 
        
        
          Base Address
        
        
          High Address
        
        
          PLB Address Bus Width
        
        
          PLB Data Bus Width
        
        
          PLB Slave Uses P2P Topology
        
        
          Master ID Bus Width of PLB
        
        
          Number of PLB Masters
        
        
          Native Data Bus Width of PLB Slave
        
        
          PLB Slave is Capable of Bursts
        
        
          Number of MicroBlaze debug ports 
        
        
          Enable JTAG UART 
        
        
          AXI Address Width
        
        
          AXI Data Width
        
        
          AXI4LITE protocal
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
            
          
        
      
    
    
      Processor System Reset Module
      Reset management module
      
        
      
      
      
        
          Device Subfamily
        
        
          Number of Clocks Before Input Change is Recognized On The External Reset Input 
        
        
          Number of Clocks Before Input Change is Recognized On The Auxiliary Reset Input 
        
        
          External Reset Active High 
        
        
          Auxiliary Reset Active High 
        
        
          Number of Bus Structure Reset Registered Outputs 
        
        
          Number of Peripheral Reset Registered Outputs 
        
        
          Number of Active Low Interconnect Reset Registered Outputs 
        
        
          Number of Active Low Peripheral Reset Registered Outputs 
        
        
          Device Family
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
          
        
      
      
        
      
    
    
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
        
          
            
          
        
        
          
            
          
        
      
    
    
      XPS Central DMA Controller
      Simple Direct Memory Access (DMA) services for PLBV46
      
        
      
      
      
        
          FIFO Depth
        
        
          Read Burst Size
        
        
          Write Burst Size
        
        
          Base Address
        
        
          High Address
        
        
          PLB Data Bus Width
        
        
          PLB Address Bus Width
        
        
          Number of PLB Masters
        
        
          Master ID Bus Width of PLB
        
        
          PLB Slave Uses P2P Topology
        
        
          Native Data Bus Width of PLB Slave
        
        
          Native Data Bus Width of PLB Master
        
        
          PLB Slave is Capable of Bursts
        
        
          Address Bus Width of Master PLB Bus
        
        
          Data Bus Width of Master PLB Bus
        
        
          Device Family
        
      
      
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
        
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
      
        
          
            
          
        
      
    
  
 

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Subversion Repositories vspi

[/] [vspi/] [trunk/] [projnav/] [xps/] [SDK/] [SDK_Workspace/] [xps_hw_platform/] [system.xml] - Blame information for rev 14

Line No.	Rev	Author	Line
1	14	mjlyons
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20			`MicroBlaze`
21			`The MicroBlaze 32 bit soft processor`
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35			`Enable Fault Tolerance Support`
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