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-- $Id: s3_rs232_iob_ext.vhd 314 2010-07-09 17:38:41Z mueller $
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--
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-- Copyright 2010- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Module Name: s3_rs232_iob_ext - syn
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-- Description: iob's for external rs232 (PMod)
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--
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-- Dependencies: xlib/iob_reg_i
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-- xlib/iob_reg_o
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--
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-- Test bench: -
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--
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-- Target Devices: generic
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-- Tool versions: xst 11.4; ghdl 0.26
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2010-04-17 278 1.0 Initial version
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------------------------------------------------------------------------------
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use work.slvtypes.all;
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use work.xlib.all;
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-- ----------------------------------------------------------------------------
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entity s3_rs232_iob_ext is -- iob's for external rs232 (PMod)
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port (
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CLK : in slbit; -- clock
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RXD : out slbit; -- receive data (board view)
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TXD : in slbit; -- transmit data (board view)
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CTS_N : out slbit; -- clear to send (act. low)
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RTS_N : in slbit; -- request to send (act. low)
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I_RXD : in slbit; -- pad-i: receive data (board view)
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O_TXD : out slbit; -- pad-o: transmit data (board view)
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I_CTS_N : in slbit; -- pad-i: clear to send (act. low)
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O_RTS_N : out slbit -- pad-o: request to send (act. low)
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);
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end s3_rs232_iob_ext;
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architecture syn of s3_rs232_iob_ext is
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begin
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IOB_RXD : iob_reg_i -- line idle=1, so init sync flop =1
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generic map (INIT => '1')
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port map (CLK => CLK, CE => '1', DI => RXD, PAD => I_RXD);
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IOB_TXD : iob_reg_o -- line idle=1, so init sync flop =1
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generic map (INIT => '1')
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port map (CLK => CLK, CE => '1', DO => TXD, PAD => O_TXD);
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IOB_CTS : iob_reg_i
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port map (CLK => CLK, CE => '1', DI => CTS_N, PAD => I_CTS_N);
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IOB_RTS : iob_reg_o
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port map (CLK => CLK, CE => '1', DO => RTS_N, PAD => O_RTS_N);
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end syn;
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