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[/] [w11/] [tags/] [w11a_V0.5/] [rtl/] [vlib/] [rri/] [tb/] [tb_rri_stim.dat] - Blame information for rev 7

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1 2 wfjm
# $Id: tb_rri_stim.dat 311 2010-06-30 17:52:37Z mueller $
2
#
3
#  Revision History:
4
# Date         Rev Version  Comment
5
# 2010-06-06   302   2.0    use sop/eop framing instead of soc+chaining
6
# 2007-11-24    98   1.2    adapt to new internal init handling
7
# 2007-11-04    95   1.1    add .iowt's in Test 15 to get serport timing right
8
# 2007-06-17    58   1.0    Initial version
9
#
10
.wait 5
11
C some non frame data first
12
.tx8  00000000
13
.wait 5
14
.tx8  00000001
15
.wait 5
16
.tx8  00000010
17
#
18
.iowt 10
19
C -----------------------------------------------------------------------------
20
C Test 1: wreg
21
C wreg: tx: sop - cmd(10000,010) addr(0000) dl dh ccrc - eop
22
C       rx: sop - cmd(010) stat crc - eop
23
#
24
.rxsop
25
.rxcs  10000010 00000000
26
.rxeop
27
#
28
.txsop
29
.txcad 10000010 00000000 0011001111001100
30
.txeop
31
#
32
.iowt 10
33
C -----------------------------------------------------------------------------
34
C Test 2: rreg
35
C rreg: tx: sop - cmd(10010,000) addr(0000) ccrc - eop
36
C       rx: sop - cmd(000) dl dh stat crc - eop
37
#
38
.rxsop
39
.rxcds 10010000          0011001111001100 00000000
40
.rxeop
41
#
42
.txsop
43
.txca  10010000 00000000
44
.txeop
45
#
46
.iowt 10
47
C -----------------------------------------------------------------------------
48
C Test 3: chained wreg - wreg - rreg
49
C wreg: tx: sop - cmd(11001,010) addr(0001) dl dh ccrc
50
C wreg: tx:     - cmd(11011,010) addr(0010) dl dh ccrc
51
C rreg: tx:     - cmd(11100,000) addr(0001) ccrc
52
C       tx:     - eop
53
C       rx: sop - cmd(010) stat crc
54
C       rx:     - cmd(010) stat crc
55
C       rx:     - cmd(000) dl dh stat crc
56
C       rx:     - eop
57
#
58
.rxsop
59
.rxcs  11001010 00000000
60
.rxcs  11001010 00000000
61
.rxcds 11100000          1111111100000001 00000000
62
.rxeop
63
#
64
.txsop
65
.txcad 11001010 00000001 1111111100000001
66
.txcad 11001010 00000010 1111111100000010
67
.txca  11100000 00000001
68
.txeop
69
#
70
.iowt 10
71
C -----------------------------------------------------------------------------
72
C Test 4: wblk - rblk
73
C wblk: rx: sop - cmd(10100,011) addr(10000000) cnt(8->111) ccrc dl dh .. dcrc
74
C       rx:     - eop
75
C       rx: sop - cmd(011) stat crc
76
C       rx:     - eop
77
#
78
.rxsop
79
.rxcs  10100011 00000000
80
.rxeop
81
#
82
.txsop
83
.txcac 10100011 10000000 00000111
84
.tx16  0000000001000000
85
.tx16  0000000001000001
86
.tx16  0000000001000010
87
.tx16  0000000001000011
88
.tx16  0000000001000100
89
.tx16  0000000001000101
90
.tx16  0000000001000110
91
.tx16  0000000001000111
92
.txcrc
93
.txeop
94
#
95
.iowt 10
96
C
97
C now check, that register 16 holds 8, clear it to prepare reread:
98
C rreg: tx: sop - cmd(10011,000) addr(10000) ccrc
99
C wreg: tx:     - cmd(10000,010) addr(10000) dl dh ccrc
100
C       tx:     - eop
101
C       rx: sop - cmd(000) dl dh stat crc
102
C       rx:     - cmd(010) stat crc
103
C       rx:     - eop
104
#
105
.rxsop
106
.rxcds 10011000 0000000000001000 00000000
107
.rxcs  10000010 00000000
108
.rxeop
109
#
110
.txsop
111
.txca  10011000 00010000
112
.txcad 10000010 00010000 00000000000000000
113
.txeop
114
#
115
.iowt 10
116
C rblk: rx: sop - cmd(10110,001) addr(10000000) cnt(8->111) ccrc - eop
117
C       rx: sop - cmd(001) cnt dl dh ... stat crc - eop
118
#
119
.rxsop
120
.rx8  10110001
121
.rx8  00000111
122
.rx16 0000000001000000
123
.rx16 0000000001000001
124
.rx16 0000000001000010
125
.rx16 0000000001000011
126
.rx16 0000000001000100
127
.rx16 0000000001000101
128
.rx16 0000000001000110
129
.rx16 0000000001000111
130
.rx8  00000000
131
.rxcrc
132
.rxeop
133
#
134
.txsop
135
.txcac 10110001 10000000 00000111
136
.txeop
137
#
138
.iowt 10
139
C -----------------------------------------------------------------------------
140
C Test 5: stat (in non-error case) re-read last cmd twice, shouldn't change
141
C wreg: tx: sop - cmd(00001,010) addr(0010) dl dh ccrc
142
C wreg: tx:     - cmd(00011,010) addr(0011) dl dh ccrc
143
C rreg: tx:     - cmd(00101,000) addr(0010) ccrc
144
C rreg: tx:     - cmd(00111,000) addr(0011) ccrc
145
C stat: tx:     - cmd(01001,100) ccrc
146
C stat: tx:     - cmd(01010,100) ccrc
147
C       tx:     - eop
148
C       rx: sop - cmd(010) stat crc
149
C       rx:     - cmd(010) stat crc
150
C       rx:     - cmd(000) dl dh stat crc
151
C       rx:     - cmd(000) dl dh stat crc
152
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
153
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
154
C       rx:     - eop
155
#
156
.rxsop
157
.rxcs  00001010 00000000
158
.rxcs  00011010 00000000
159
.rxcds 00101000          1000000000000010 00000000
160
.rxcds 00111000          1000000100000011 00000000
161
.rxccd 01001100 00111000 1000000100000011 00000000
162
.rxccd 01010100 00111000 1000000100000011 00000000
163
.rxeop
164
#
165
.txsop
166
.txcad 00001010 00000010 1000000000000010
167
.txcad 00011010 00000011 1000000100000011
168
.txca  00101000 00000010
169
.txca  00111000 00000011
170
.txc   01001100
171
.txc   01010100
172
.txeop
173
#
174
.iowt 10
175
C -----------------------------------------------------------------------------
176
C Test 6: ccrc error abort
177
C wreg: tx: sop - cmd(01001,010) addr(0010) dl dh ccrc
178
C wreg: tx:     - cmd(01011,010) addr(0011) dl dh ccrc
179
C rreg: tx:     - cmd(01101,000) addr(0010) ccrc
180
C rreg: tx:     - cmd(01110,000) addr(0011) *BAD CRC*
181
C       tx:     - eop
182
C       rx: sop - cmd(010) stat crc
183
C       rx:     - cmd(010) stat crc
184
C       rx:     - cmd(000) dl dh stat crc
185
C       rx:     - nak  *ABORT*
186
C       rx:     - eop
187
#
188
.rxsop
189
.rxcs  01001010 00000000
190
.rxcs  01011010 00000000
191
.rxcds 01101000          1000000100001010 00000000
192
.rxnak
193
.rxeop
194
#
195
.txsop
196
.txcad 01001010 00000010 1000000100001010
197
.txcad 01011010 00000011 1000000100001011
198
.txca  01101000 00000010
199
.tx8   01110000
200
.tx8   00000011
201
.tx8   00000000
202
.txeop
203
#
204
.iowt 10
205
C
206
C now check that stat reflects last successfull rreg; re-read ccrc=1 sticks !
207
C stat: tx: sop - cmd(10001,100) ccrc
208
C stat: tx:     - cmd(10010,100) ccrc
209
C       tx:     - eop
210
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
211
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
212
C       rx:     - eop
213
C     stat: stat(000),attn(0),ccrc(1),dcrc(0),ioto(0),ioerr(0) -> 00001000
214
.rxsop
215
.rxccd 10001100 01101000 1000000100001010 00001000
216
.rxccd 10010100 01101000 1000000100001010 00001000
217
.rxeop
218
#
219
.txsop
220
.txc   10001100
221
.txc   10010100
222
.txeop
223
#
224
.iowt 10
225
C -----------------------------------------------------------------------------
226
C Test 7: dcrc error condition
227
C wreg: tx: sop - cmd(00001,010) addr(10000) dl dh ccrc
228
C wblk: rx:     - cmd(00011,011) addr(10000000) cnt(4->011) ccrc dl dh ..
229
C                                                                   *BAD CRC*
230
C       rx:     - eop
231
C       rx: sop - cmd(010) stat crc
232
C       rx:     - cmd(011) stat crc
233
C       rx:     - eop
234
C     stat: stat(000),attn(0),ccrc(0),dcrc(1),ioto(0),ioerr(0) -> 00000100
235
#
236
.rxsop
237
.rxcs  00001010 00000000
238
.rxcs  00010011 00000100
239
.rxeop
240
#
241
.txsop
242
.txcad 00001010 00010000 00000000000000000
243
.txcac 00010011 10000000 00000011
244
.tx16  0001000001000000
245
.tx16  0001000001000001
246
.tx16  0001000001000010
247
.tx16  0001000001000011
248
.tx8   00000000
249
.txeop
250
#
251
.iowt 10
252
C
253
C now check that stat reflects bad dcrc: re-read dcrc=1 sticks !
254
C stat: tx: sop - cmd(00101,100) ccrc
255
C stat: tx:     - cmd(00110,100) ccrc
256
C       tx:     - eop
257
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
258
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
259
C       rx:     - eop
260
C     stat: stat(000),attn(0),ccrc(0),dcrc(1),ioto(0),ioerr(0) -> 00000100
261
C     Note: dl,dh still the last read of Test 6 !!
262
.rxsop
263
.rxccd 00101100 00010011 1000000100001010 00000100
264
.rxccd 00110100 00010011 1000000100001010 00000100
265
.rxeop
266
#
267
.txsop
268
.txc   00101100
269
.txc   00110100
270
.txeop
271
#
272
.iowt 10
273
C -----------------------------------------------------------------------------
274
C Test 8: err(bad address) condition; 11000000 is an address returning err=1
275
C rreg: tx: sop - cmd(00001,000) addr(00010000) ccrc
276
C rreg: tx:     - cmd(00011,000) addr(11000000) ccrc
277
C wreg: tx:     - cmd(00101,010) addr(00010000) dl dh ccrc
278
C wreg: tx:     - cmd(00110,010) addr(11000000) dl dh ccrc
279
C       tx:     - eop
280
C     Note: the rreg(10000) will return 4, the prt after the last wblk !
281
C     Note: tb returns 1010101010101010 for access to bad addresses
282
C     stat: stat(000),attn(0),ccrc(0),dcrc(0),ioto(0),ioerr(1) -> 00000001
283
#
284
.rxsop
285
.rxcds 00001000          0000000000000100 00000000
286
.rxcds 00011000          1010101010101010 00000001
287
.rxcs  00101010 00000000
288
.rxcs  00110010 00000001
289
.rxeop
290
#
291
.txsop
292
.txca  00001000 00010000
293
.txca  00011000 11000000
294
.txcad 00101010 00010000 0000000000000000
295
.txcad 00110010 11000000 1000111110001111
296
.txeop
297
#
298
.iowt 10
299
C -----------------------------------------------------------------------------
300
C Test 9: to(time out) condition; 01bbbbbb addressed take n+1 hold states
301
C wreg: tx: sop - cmd(00001,010) addr(01000000) dl dh ccrc  (nh=1)
302
C wreg: tx:     - cmd(00011,010) addr(01001111) dl dh ccrc  (nh=16)
303
C wreg: tx:     - cmd(00101,010) addr(01011101) dl dh ccrc  (nh=30)
304
C wreg: tx:     - cmd(00111,010) addr(01011110) dl dh ccrc  (nh=31)
305
C wreg: tx:     - cmd(01001,010) addr(01011111) dl dh ccrc  (nh=32) TO
306
C wreg: tx:     - cmd(01011,010) addr(01100000) dl dh ccrc  (nh=33) TO
307
C wreg: tx:     - cmd(01101,010) addr(01111111) dl dh ccrc  (nh=64) TO
308
C wreg: tx:     - cmd(01110,010) addr(01000001) dl dh ccrc  (nh=2)
309
C       tx:     - eop
310
C     stat: stat(000),attn(0),ccrc(0),dcrc(0),ioto(1),ioerr(0) -> 00000010
311
#
312
.rxsop
313
.rxcs  00001010 00000000
314
.rxcs  00011010 00000000
315
.rxcs  00101010 00000000
316
.rxcs  00111010 00000000
317
.rxcs  01001010 00000010
318
.rxcs  01011010 00000010
319
.rxcs  01101010 00000010
320
.rxcs  01110010 00000000
321
.rxeop
322
#
323
.txsop
324
.txcad 00001010 01000000 0000000001000000
325
.txcad 00011010 01001111 0000000001001111
326
.txcad 00101010 01011101 0000000001011101
327
.txcad 00111010 01011110 0000000001011110
328
.txcad 01001010 01011111 0000000001011111
329
.txcad 01011010 01100000 0000000001100000
330
.txcad 01101010 01111110 0000000001111111
331
.txcad 01110010 01000001 0000000001000001
332
.txeop
333
.iowt 10
334
C
335
C now same with rreg
336
C rreg: tx: sop - cmd(00001,000) addr(01000000) ccrc  (nh=1)
337
C rreg: tx:     - cmd(00011,000) addr(01001111) ccrc  (nh=16)
338
C rreg: tx:     - cmd(00101,000) addr(01011101) ccrc  (nh=30)
339
C rreg: tx:     - cmd(00111,000) addr(01011110) ccrc  (nh=31)
340
C rreg: tx:     - cmd(01001,000) addr(01011111) ccrc  (nh=32) TO
341
C rreg: tx:     - cmd(01011,000) addr(01100000) ccrc  (nh=33) TO
342
C rreg: tx:     - cmd(01101,000) addr(01111111) ccrc  (nh=64) TO
343
C rreg: tx:     - cmd(01110,000) addr(01000001) ccrc  (nh=2)
344
C       tx:     - eop
345
C     Note: tb returns 0101010101010101 for timeout
346
#
347
.rxsop
348
.rxcds 00001000          0000000001000000 00000000
349
.rxcds 00011000          0000000001001111 00000000
350
.rxcds 00101000          0000000001011101 00000000
351
.rxcds 00111000          0000000001011110 00000000
352
.rxcds 01001000          0101010101010101 00000010
353
.rxcds 01011000          0101010101010101 00000010
354
.rxcds 01101000          0101010101010101 00000010
355
.rxcds 01110000          0000000001000001 00000000
356
.rxeop
357
#
358
.txsop
359
.txca  00001000 01000000
360
.txca  00011000 01001111
361
.txca  00101000 01011101
362
.txca  00111000 01011110
363
.txca  01001000 01011111
364
.txca  01011000 01100000
365
.txca  01101000 01111110
366
.txca  01110000 01000001
367
.txeop
368
#
369
.iowt 10
370
C -----------------------------------------------------------------------------
371
C Test 10: external init command
372
C rreg: tx: sop - cmd(00001,000) addr(00010010) ccrc
373
C init: tx:     - cmd(00011,110) addr(10000111) dl dh ccrc
374
C rreg: tx:     - cmd(00100,000) addr(00010010) ccrc
375
C       tx:     - eop
376
C       rx: sop - cmd(000) dl dh stat crc
377
C       rx:     - cmd(110) stat crc
378
C       rx:     - cmd(000) dl dh stat crc
379
C       rx:     - eop
380
#
381
.rxsop
382
.rxcds 00001000 0000000000000000 00000000
383
.rxcs  00011110 00000000
384
.rxcds 00100000 0000000000000001 00000000
385
.rxeop
386
#
387
.txsop
388
.txca  00001000 00010010
389
.txcad 00011110 10000111 0000111000111000
390
.txca  00100000 00010010
391
.txeop
392
#
393
.iowt 10
394
C -----------------------------------------------------------------------------
395
C Test 11: external status bit (RP_STAT)
396
C Note: stat bits are not latched for stat command !
397
C stat <= "001"
398
C rreg: tx: sop - cmd(00000,000) addr(00010010) ccrc - eop
399
C       rx: sop - cmd(000) dl dh stat crc - eop
400
#
401
.rxsop
402
.rxcds 00000000          0000000000000001 00100000
403
.rxeop
404
#
405
.stat 001
406
.txsop
407
.txca  00000000 00010010
408
.txeop
409
#
410
.iowt 10
411
C stat <= "010"
412
C stat: tx: sop - cmd(00011,100) ccrc
413
C rreg: tx:     - cmd(00100,000) addr(00010010) ccrc
414
C       tx:     - eop
415
C       rx: sop - cmd(100) ccmd (000) dl dh stat crc
416
C       rx:     - cmd(000) dl dh stat crc
417
C       rx:     - eop
418
C Note: stat command returns old 001 status
419
C       rreg command returns new 010 status
420
.rxsop
421
.rxccd 00011100 00000000 0000000000000001 00100000
422
.rxcds 00010000          0000000000000001 01000000
423
.rxeop
424
#
425
.stat 010
426
.txsop
427
.txc   00011100
428
.txca  00010000 00010010
429
.txeop
430
#
431
C stat <= "100"
432
C rreg: tx: sop - cmd(00110,000) addr(00010010) ccrc - eop
433
C       rx: sop - cmd(000) dl dh stat crc - eop
434
C stat <= '000'
435
.iowt 10
436
#
437
.rxsop
438
.rxcds 00110000          0000000000000001 10000000
439
.rxeop
440
#
441
.stat 100
442
.txsop
443
.txca  00110000 00010010
444
.txeop
445
#
446
.iowt 10
447
.stat 000
448
C -----------------------------------------------------------------------------
449
C Test 12: attention logic
450
C attn <= "0000000000000100"  (async case)
451
C rreg: tx: sop - cmd(01001,000) addr(00010010) ccrc
452
C attn: tx:     - cmd(01011,101) ccrc
453
C attn: tx:     - cmd(01101,101) ccrc
454
C rreg: tx:     - cmd(01110,000) addr(00010010) ccrc
455
C       tx:     - eop
456
C Note: the rreg command returns attn=1
457
C       the attn has attn=0, because stat is evaluated after read+clear !!
458
C     stat: stat(000),attn(1),ccrc(0),dcrc(0),ioto(0),ioerr(0) -> 00010000
459
#
460
.rxsop
461
.rxcds 01001000          0000000000000001 00010000
462
.rxcds 01011101          0000000000000100 00000000
463
.rxcds 01101101          0000000000000000 00000000
464
.rxcds 01110000          0000000000000001 00000000
465
.rxeop
466
#
467
.wait 5
468
.attn 00000100
469
.wait 5
470
.txsop
471
.txca  01001000 00010010
472
.txc   01011101
473
.txc   01101101
474
.txca  01110000 00010010
475
.txeop
476
#
477
.iowt 10
478
C
479
C now test sync case, the transaction causes the attention
480
C a write to 10000010 causes AP_LAM(15 downto 8) be pinged with RP_DO data
481
C wreg: tx: sob - cmd(10001,010) addr(10000010) dl dh ccrc
482
C rreg: tx:     - cmd(10011,000) addr(00010010) ccrc
483
C attn: tx:     - cmd(10101,101) ccrc
484
C attn: tx:     - cmd(10111,101) ccrc
485
C rreg: tx:     - cmd(11000,000) addr(00010010) ccrc
486
C       tx:     - eop
487
.rxsop
488
.rxcs  10001010 00010000
489
.rxcds 10011000          0000000000000001 00010000
490
.rxcds 10101101          0000000100000000 00000000
491
.rxcds 10111101          0000000000000000 00000000
492
.rxcds 11000000          0000000000000001 00000000
493
.rxeop
494
#
495
.txsop
496
.txcad 10001010 10000010 0000000100000000
497
.txca  10011000 00010010
498
.txc   10101101
499
.txc   10111101
500
.txca  11000000 00010010
501
.txeop
502
#
503
.iowt 10
504
C -----------------------------------------------------------------------------
505
C Test 13: verify that extra 'idle' commas are tolerated
506
C          do wreg+rreg, with "100000000" between bytes
507
C          use as data 1000000 and 10000001 to force escaping here
508
C wreg: tx: sop - cmd(00001,010) addr(0000) dl dh ccrc
509
C rreg: tx: sop - cmd(00010,000) addr(0000) ccrc
510
C       tx:     - eop
511
C       rx: sop - cmd(010) stat crc
512
C       rx: sop - cmd(000) dl dh stat crc
513
C       rx:     - eop
514
#
515
.rxsop
516
.rxcs  00001010 00000000
517
.rxcds 00010000          1000000010000001 00000000
518
.rxeop
519
#
520
100000000
521
.txsop
522
100000000
523
.tx8   00001010
524
100000000
525
.tx8   00000000
526
100000000
527
.tx8   10000001
528
100000000
529
100000000
530
.tx8   10000000
531
100000000
532
.txcrc
533
100000000
534
.tx8   00010000
535
100000000
536
100000000
537
100000000
538
.tx8   00000000
539
100000000
540
.txcrc
541
.txeop
542
#
543
.iowt 10
544
C -----------------------------------------------------------------------------
545
C Test 14: enable and test asynchronous attn notification
546
C init: tx: sob - cmd(00000,110) addr(00000001) dl dh ccrc - eop
547
C     init: anena(1), itoena(0), ito(0)   -> 11111111,1000000000000000
548
#
549
.rxsop
550
.rxcs  00000110 00000000
551
.rxeop
552
#
553
.txsop
554
.txcad 00000110 11111111 1000000000000000
555
.txeop
556
.iowt 10
557
#
558
C now ping an attention line, expect oob attn symbol
559
.wait 50
560
.rxoob 100000100
561
.attn  00000001
562
.iowt 10
563
C finally read attn flags
564
C attn: tx:     - cmd(00010,101) ccrc - eop
565
.rxsop
566
.rxcds 00010101          0000000000000001 00000000
567
.rxeop
568
#
569
.txsop
570
.txc   00010101
571
.txeop
572
#
573
.iowt 10
574
C -----------------------------------------------------------------------------
575
C Test 15: enable and test idle timeout
576
C init: tx: sob - cmd(00100,110) addr(00000011) dl dh ccrc - eop
577
C     init: anena(1), itoena(1), ito(9)   -> 11111111,1100000000001001
578
C     ito=9 --> divider=10; ce_xsec div is 1:20 --> total every 200 cycles
579
#
580
.rxsop
581
.rxcs  00100110 00000000
582
.rxeop
583
.rxoob 100000000
584
.rxoob 100000000
585
.rxoob 100000100
586
.rxoob 100000100
587
.rxoob 100000100
588
#
589
.txsop
590
.txcad 00100110 11111111 1100000000001001
591
.txeop
592
#
593
.iowt 10
594
C total ito now 200 cycles; wait 500 cycles, see 2 idle symbols
595
.wait 500
596
C ping an attention line, expect oob attn symbol
597
.attn  00000010
598
.iowt 10
599
C wait 500 more cycles, see 2 attn symbols
600
.wait 500
601
C finally read attn flags
602
C attn: tx:     - cmd(00110,101) ccrc - eop
603
.rxsop
604
.rxcds 00110101          0000000000000010 00000000
605
.rxeop
606
#
607
.txsop
608
.txc   00110101
609
.txeop
610
#
611
.iowt 10
612
C wait 500 more cycles, see 2 idle symbols again
613
.rxoob 100000000
614
.rxoob 100000000
615
.wait 500
616
C finally disable attn notification and idle timeout again
617
C init: tx: sob - cmd(00000,110) addr(00000000) dl dh ccrc - eop
618
C     init: anena(0), itoena(0), ito(0)   -> 11111111,0000000000000000
619
#
620
.rxsop
621
.rxcs  00000110 00000000
622
.rxeop
623
#
624
.txsop
625
.txcad 00000110 11111111 0000000000000000
626
.txeop
627
#
628
.iowt 10
629
C -----------------------------------------------------------------------------
630
C Test 16: attn poll
631
#
632
C send 2 attn, expect two idles back
633
.rxoob 100000000
634
.rxoob 100000000
635
100000100
636
100000100
637
.iowt 10
638
#
639
C ping an attention line
640
.attn  00000010
641
#
642
C send 2 attn, expect two attn back
643
.rxoob 100000100
644
.rxoob 100000100
645
100000100
646
100000100
647
.iowt 10
648
#

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