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-- $Id: slvtypes.vhd 314 2010-07-09 17:38:41Z mueller $
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--
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-- Copyright 2007-2008 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Package Name: slvtypes
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-- Description: Short names for std_logic types.
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-- This package simply defines short hands for the std_logic
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-- types. slbit and slv are just aliases for std_logic and
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-- std_logic_vector. slv<n> are subtype definitions for
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-- commonly used (n downto 0) vectors
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--
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-- Dependencies: -
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
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-- Revision History:
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-- Date Rev Version Comment
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-- 2008-08-24 162 1.0.4 add slv60 and 64
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-- 2008-08-22 161 1.0.3 add slvnn_m subtypes from pdp11 package
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-- 2008-03-24 129 1.0.2 add slv31
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-- 2007-12-08 100 1.0.1 add slv1
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-- 2007-06-02 44 1.0 Initial version
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package slvtypes is
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subtype slbit is std_logic; -- bit
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subtype slv is std_logic_vector; -- vector
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subtype slv1 is std_logic_vector( 0 downto 0); -- 1 bit word
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subtype slv2 is std_logic_vector( 1 downto 0); -- 2 bit word
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subtype slv3 is std_logic_vector( 2 downto 0); -- 3 bit word
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subtype slv4 is std_logic_vector( 3 downto 0); -- 4 bit word
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subtype slv5 is std_logic_vector( 4 downto 0); -- 5 bit word
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subtype slv6 is std_logic_vector( 5 downto 0); -- 6 bit word
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subtype slv7 is std_logic_vector( 6 downto 0); -- 7 bit word
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subtype slv8 is std_logic_vector( 7 downto 0); -- 8 bit word
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subtype slv9 is std_logic_vector( 8 downto 0); -- 9 bit word
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subtype slv10 is std_logic_vector( 9 downto 0); -- 10 bit word
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subtype slv11 is std_logic_vector(10 downto 0); -- 11 bit word
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subtype slv12 is std_logic_vector(11 downto 0); -- 12 bit word
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subtype slv13 is std_logic_vector(12 downto 0); -- 13 bit word
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subtype slv14 is std_logic_vector(13 downto 0); -- 14 bit word
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subtype slv15 is std_logic_vector(14 downto 0); -- 15 bit word
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subtype slv16 is std_logic_vector(15 downto 0); -- 16 bit word
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subtype slv17 is std_logic_vector(16 downto 0); -- 17 bit word
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subtype slv18 is std_logic_vector(17 downto 0); -- 18 bit word
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subtype slv19 is std_logic_vector(18 downto 0); -- 19 bit word
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subtype slv20 is std_logic_vector(19 downto 0); -- 20 bit word
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subtype slv21 is std_logic_vector(20 downto 0); -- 21 bit word
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subtype slv22 is std_logic_vector(21 downto 0); -- 22 bit word
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subtype slv23 is std_logic_vector(22 downto 0); -- 23 bit word
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subtype slv24 is std_logic_vector(23 downto 0); -- 24 bit word
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subtype slv31 is std_logic_vector(30 downto 0); -- 31 bit word
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subtype slv32 is std_logic_vector(31 downto 0); -- 32 bit word
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subtype slv60 is std_logic_vector(59 downto 0); -- 59 bit word
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subtype slv64 is std_logic_vector(63 downto 0); -- 63 bit word
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subtype slv8_1 is std_logic_vector(7 downto 1); -- 8 bit word, 1 lsb drop
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subtype slv9_2 is std_logic_vector(8 downto 2); -- 9 bit word, 2 lsb drop
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subtype slv13_1 is std_logic_vector(12 downto 1); -- 13 bit word, 1 lsb drop
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subtype slv16_1 is std_logic_vector(15 downto 1); -- 16 bit word, 1 lsb drop
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subtype slv18_1 is std_logic_vector(17 downto 1); -- 18 bit word, 1 lsb drop
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subtype slv22_1 is std_logic_vector(21 downto 1); -- 22 bit word, 1 lsb drop
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end package slvtypes;
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