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# $Id: INSTALL.txt 433 2011-11-27 22:04:39Z mueller $
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Guide to install and build w11a systems, test benches and support software
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Table of content:
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1. Download
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2. Setup environment variables
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3. Compile UNISIM/SIMPRIM libraries for ghdl
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4. Compile and install the support software
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a. Compile sharable libraries
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b. Setup Tcl packages
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5. The build system
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6. Building test benches
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a. General instructions
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b. Available test benches
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7. Building systems
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a. General instructions
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b. Available systems
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1. Download ---------------------------------------------------------------
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All instructions below assume that the project files reside in a
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working directory with the name represented as
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To download latest tagged version (V0.5) of w11a
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cd
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svn co http://opencores.org/ocsvn/w11/w11/tags/w11a_V0.5
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To download latest snapshot of trunk
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cd
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svn co http://opencores.org/ocsvn/w11/w11/trunk
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2. Setup environment variables --------------------------------------------
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The make flow for building test benches (ghdl and ISim based) and systems
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(Xilinx xst based) as well as the support software (mainly the rlink backend
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server) requires
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- the definition of the environment variables:
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- RETROBASE: must refer to the installation root directory
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- BOOSTINC: pathname for includes of boost library
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- that the tools binary directory is in the path
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- that the tools library directory is in the library path
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For bash and alike use
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export RETROBASE=
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export PATH=$PATH:$RETROBASE/tools/bin
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export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$RETROBASE/tools/lib
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In most cases the boost library version coming with the distribution will
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work, in those cases simply use
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export BOOSTINC=/usr/include
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After that building functional model based test benches will work. If you
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want to also build post-xst or post-par test benches read next section.
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3. Compile UNISIM/SIMPRIM libraries for ghdl ------------------------------
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The build system for test benches also supports test benches run against
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the gate level models derived after the xst, map or par step. In this
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case ghdl has to link against a compiled UNISIM or SIMPRIM library.
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To make handling of the parallel installion of several WebPack versions
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easy the compiled libraries are stored in sub-directories under $XILINX:
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$XILINX/ghdl/unisim
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$XILINX/ghdl/simprim
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Two helper scripts will create these libraries:
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cd $RETROBASE
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xilinx_ghdl_unisim
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xilinx_ghdl_simprim
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If you have several WebPack versions installed, repeat for each version.
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4. Compile and install the support software -------------------------------
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4a. Compile sharable libraries ---------------------------------------
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Required tools and libraries:
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g++ >= 4.3 (decltype support assumed in usage of boost::bind)
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boost >= 1.35 (boost::thread api changed, new one is used)
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Build was tested under:
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ubuntu lucid (10.04 LTS): gcc 4.4.3 boost 1.40.0
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debian lenny (5.0.8): gcc 4.3.2 boost 1.xx.x (t.b.c.)
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To build all sharable libraries
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cd $RETROBASE/tools/src
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make -j 4
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To cleanup, e.g. before a re-build
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cd $RETROBASE/tools/src
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rm_dep
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make realclean
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4b. Setup Tcl environment --------------------------------------------
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The Tcl files are organized in several packages. To create the Tcl
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package files (pkgIndex.tcl)
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cd $RETROBASE/tools/tcl
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setup_packages
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To use these packages it is convenient to make them available via the
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'auto_path' mechanism. To do that add in your .tclshrc or .wishrc
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lappend auto_path [file join $env(RETROBASE) tools tcl]
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lappend auto_path [file join $env(RETROBASE) tools lib]
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The w11 distribution contains two ready to use .tclshrc or .wishrc
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files which
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- include the auto_path statements above
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- activate tclreadline (and thus in tclshrc an event loop)
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To use them simply copy them into your home directory (or soft link them)
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cd $HOME
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ln -s $RETROBASE/tools/tcl/.tclshrc .
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ln -s $RETROBASE/tools/tcl/.wishrc .
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5. The build system -------------------------------------------------------
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Simulation and synthesis tools usually need a list of the VHDL source
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files, often in proper compilation order (libraries before components).
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The different tools have different formats of these 'project files'.
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The build system employed in this project is based on
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"VHDL bill of material" or 'vbom' files
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which list for each vhdl source file the libraries and sources for
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the instantiated components, the later via their vbom, and last but
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not least the name of the vhdl source file. All file name are relative
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to the current directory. A recursive traversal through all vbom's gives
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for each vhld module all sources needed to compile it. The vbomconv script
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in tools/bin does this, and generates depending on options
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- make dependency files
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- ISE xst project files
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- ISE ISim project files
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- ghdl commands for analysis, inspection and make step
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The master make files contain pattern rules like
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%.ngc : %.vbom -- synthesize with xst
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% : %.vbom -- build functional model test bench
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which encapsulate all the vbomconf magic
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A full w11a is build from more than 80 source files, test benches from
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even more. Using the vbom's a large number of designs can be easily
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maintained.
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6. Building test benches --------------------------------------------------
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6a. General instructions ---------------------------------------------
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To compile a test bench named all is needed is
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make
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The make file will use .vbom, create all make dependency files,
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and generate the needed ghdl commands.
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In many cases the test benches can also be compiled against the gate
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level models derived after the xst, map or par step. To compile them
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make ghdl_tmp_clean
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make _ssim # for post-xst
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make _fsim # for post-map
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make _tsim # for post-par
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The 'make ghdl_tmp_clean' is needed to flush the ghdl work area from
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the compilation remains of earlier functional model compiles.
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6b. Available test benches -------------------------------------------
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See file w11a_tb_guide.txt
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7. Building systems -------------------------------------------------------
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7a. General instructions ---------------------------------------------
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To generate a bit file for a system named all is needed is
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make .bit
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The make file will use .vbom, create all make dependency files, build
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the ucf file with cpp, and run the synthesis flow (xst, ngdbuild, par, trce).
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The log files will be named
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_xst.log # xst log file
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_tra.log # translate (ngdbuild) log file (renamed %.bld)
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_map.log # map log file (renamed %_map.mrp)
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_par.log # par log file (renamed %.par)
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_pad.log # pad file (renamed %_pad.txt)
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_twr.log # trce log file (renamed %.twr)
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To load the bitfile with WebPack impact into the target board use
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make .iconfig
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If only the xst or par output is wanted just use
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make .ngc
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make .ncd
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7b. Available systems ------------------------------------------------
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Note: Currently ready to build versions exist for
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Digilent S3BOARD (-1000 FPGA version)
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Digilent Nexys2 board (-1200 FPGA version)
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Digilent Nexys3 board
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1. rlink tester
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a. for Digilent Nexys2 board
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys2
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make sys_tst_rlink_n2.bit
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b. for Digilent Nexys3 board
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys3
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make sys_tst_rlink_n3.bit
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2. w11a systems
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a. for Digilent S3BOARD
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cd $RETROBASE/rtl/sys_gen/w11a/s3board
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make sys_w11a_s3.bit
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b. for Digilent Nexys2 board
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2
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make sys_w11a_n2.bit
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c. for Digilent Nexys3 board
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cd $RETROBASE/rtl/sys_gen/w11a/nexys3
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make sys_w11a_n3.bit
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