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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [sys_gen/] [tst_fx2loop/] [nexys2/] [ic/] [sys_tst_fx2loop_ic_n2.mfset] - Blame information for rev 17

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Line No. Rev Author Line
1 17 wfjm
# $Id: sys_tst_fx2loop_ic_n2.mfset 453 2012-01-15 17:51:18Z mueller $
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#
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# ----------------------------------------------------------------------------
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[xst]
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INFO:.*Mux is complete : default of case is discarded
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Unconnected output port 'LOCKED' of component 'dcm_sfs'
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Unconnected output port 'DOA' of component 'ram_1swar_1ar_gen'
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Node  of sequential type is unconnected
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Node  of sequential type is unconnected
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Node  of sequential type is unconnected
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Node  of sequential type is unconnected
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Node  of sequential type is unconnected
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Signal  is assigned but never used
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Input  is never used
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Input > is never used
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Input  is never used
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Input  is never used
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Input  is never used
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Input  is never used
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Signal  is assigned but never used
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Signal  is assigned but never used
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Signal  is assigned but never used
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#
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# ----------------------------------------------------------------------------
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[tra]
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INFO:.* - TNM 'I_CLK50', used in period specification.*was traced into DCM_SP
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The Offset constraint .*, is specified without a duration
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#
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# ----------------------------------------------------------------------------
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[map]
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The signal  is incomplete
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The signal _IBUF> is incomplete
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The signal _IBUF> is incomplete
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The signal _IBUF> is incomplete
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INFO:.*
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#
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# ----------------------------------------------------------------------------
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[par]
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A clock IOB / clock component pair have been found that are not placed at
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The Offset constraint .*, is specified without a duration
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The signal I_MEM_WAIT_IBUF has no load
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The signal I_BTN<1>_IBUF has no load
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The signal I_BTN<2>_IBUF has no load
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The signal I_BTN<3>_IBUF has no load
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There are 4 loadless signals in this design
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#
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# ----------------------------------------------------------------------------
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[bgn]
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Spartan-3 1200E and 1600E devices do not support bitstream
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To achieve optimal frequency synthesis performance .* consult
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The signal  is incomplete
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The signal _IBUF> is incomplete
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The signal _IBUF> is incomplete
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The signal _IBUF> is incomplete

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