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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [sys_gen/] [w11a/] [nexys3/] [tb/] [sys_conf_sim.vhd] - Blame information for rev 22

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-- $Id: sys_conf_sim.vhd 538 2013-10-06 17:21:25Z mueller $
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--
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-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Package Name:   sys_conf
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-- Description:    Definitions for sys_w11a_n3 (for simulation)
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--
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-- Dependencies:   -
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-- Tool versions:  xst 13.1, 14.6; ghdl 0.29
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-- Revision History: 
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-- Date         Rev Version  Comment
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-- 2013-10-06   538   1.3    pll support, use clksys_vcodivide ect
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-- 2013-04-21   509   1.2    add fx2 settings
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-- 2011-11-25   432   1.0    Initial version (cloned from _n3)
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use work.slvtypes.all;
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package sys_conf is
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  constant sys_conf_clksys_vcodivide   : positive :=  25;
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  constant sys_conf_clksys_vcomultiply : positive :=  18;   -- dcm   72 MHz
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  constant sys_conf_clksys_outdivide   : positive :=   1;   -- sys   72 MHz
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  constant sys_conf_clksys_gentype     : string   := "DCM";
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  constant sys_conf_memctl_read0delay : positive := 4;   -- for <75 MHz
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  constant sys_conf_memctl_read1delay : positive := sys_conf_memctl_read0delay;
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  constant sys_conf_memctl_writedelay : positive := 5;
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  constant sys_conf_ser2rri_cdinit : integer := 1-1;   -- 1 cycle/bit in sim
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  -- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec
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  constant sys_conf_fx2_petowidth  : positive := 10;
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  constant sys_conf_fx2_ccwidth  : positive := 5;
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  constant sys_conf_hio_debounce : boolean := false;   -- no debouncers
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  constant sys_conf_bram           : integer :=  0;      -- no bram, use cache
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  constant sys_conf_bram_awidth    : integer := 14;      -- bram size (16 kB)
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  constant sys_conf_mem_losize     : integer := 8#167777#; --   4 MByte
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--constant sys_conf_mem_losize     : integer := 8#003777#; -- 128 kByte (debug)
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--  constant sys_conf_bram           : integer :=  1;      --  bram only 
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--  constant sys_conf_bram_awidth    : integer := 16;      -- bram size (64 kB)
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--  constant sys_conf_mem_losize     : integer := 8#001777#; -- 64 kByte
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  constant sys_conf_cache_fmiss    : slbit   := '0';     -- cache enabled
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  -- derived constants
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  constant sys_conf_clksys : integer :=
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    ((100000000/sys_conf_clksys_vcodivide)*sys_conf_clksys_vcomultiply) /
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    sys_conf_clksys_outdivide;
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  constant sys_conf_clksys_mhz : integer := sys_conf_clksys/1000000;
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end package sys_conf;
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-- Note: mem_losize holds 16 MSB of the PA of the addressable memory
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--        2 211 111 111 110 000 000 000
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--        1 098 765 432 109 876 543 210
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--
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--        0 000 000 011 111 111 000 000  -> 00037777  --> 14bit -->  16 kByte
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--        0 000 000 111 111 111 000 000  -> 00077777  --> 15bit -->  32 kByte
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--        0 000 001 111 111 111 000 000  -> 00177777  --> 16bit -->  64 kByte
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--        0 000 011 111 111 111 000 000  -> 00377777  --> 17bit --> 128 kByte
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--        0 011 111 111 111 111 000 000  -> 03777777  --> 20bit -->   1 MByte
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--        1 110 111 111 111 111 000 000  -> 16777777  --> 22bit -->   4 MByte
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--                                          upper 256 kB excluded for 11/70 UB

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