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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [vlib/] [serport/] [serport_uart_rxtx_ab.vhd] - Blame information for rev 2

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1 2 wfjm
-- $Id: serport_uart_rxtx_ab.vhd 314 2010-07-09 17:38:41Z mueller $
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--
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-- Copyright 2007- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Module Name:    serport_uart_rxtx_ab - syn
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-- Description:    serial port UART - transmitter-receiver + autobauder
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--
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-- Dependencies:   serport_uart_autobaud
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--                 serport_uart_rxtx
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-- Test bench:     -
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-- Target Devices: generic
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-- Tool versions:  xst 8.1, 8.2, 9.1, 9.2, 11.4; ghdl 0.18-0.26
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-- Revision History: 
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-- Date         Rev Version  Comment
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-- 2007-06-24    60   1.0    Initial version 
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use work.slvtypes.all;
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use work.serport.all;
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entity serport_uart_rxtx_ab is          -- serial port uart: rx+tx+autobaud
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  generic (
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    CDWIDTH : positive := 13;           -- clk divider width
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    CDINIT: natural := 15);             -- clk divider initial/reset setting
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  port (
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    CLK : in slbit;                     -- clock
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    CE_MSEC : in slbit;                 -- 1 msec clock enable
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    RESET : in slbit;                   -- reset
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    RXSD : in slbit;                    -- receive serial data (uart view)
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    RXDATA : out slv8;                  -- receiver data out
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    RXVAL : out slbit;                  -- receiver data valid
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    RXERR : out slbit;                  -- receiver data error (frame error)
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    RXACT : out slbit;                  -- receiver active
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    TXSD : out slbit;                   -- transmit serial data (uart view)
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    TXDATA : in slv8;                   -- transmit data in
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    TXENA : in slbit;                   -- transmit data enable
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    TXBUSY : out slbit;                 -- transmit busy
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    ABACT : out slbit;                  -- autobaud active; if 1 clkdiv invalid
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    ABDONE : out slbit                  -- autobaud resync done
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  );
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end serport_uart_rxtx_ab;
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architecture syn of serport_uart_rxtx_ab is
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  signal CLKDIV : slv(CDWIDTH-1 downto 0) := conv_std_logic_vector(0, CDWIDTH);
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  signal ABACT_L : slbit := '0';        -- local readable copy of ABACT
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  signal UART_RESET : slbit := '0';
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begin
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  AB : serport_uart_autobaud
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    generic map (
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      CDWIDTH => CDWIDTH,
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      CDINIT  => CDINIT)
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    port map (
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      CLK     => CLK,
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      CE_MSEC => CE_MSEC,
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      RESET   => RESET,
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      RXSD    => RXSD,
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      CLKDIV  => CLKDIV,
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      ACT     => ABACT_L,
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      DONE    => ABDONE
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    );
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  UART_RESET <= ABACT_L or RESET;
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  ABACT      <= ABACT_L;
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  RXTX : serport_uart_rxtx
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    generic map (
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      CDWIDTH => CDWIDTH)
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    port map (
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      CLK    => CLK,
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      RESET  => UART_RESET,
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      CLKDIV => CLKDIV,
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      RXSD   => RXSD,
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      RXDATA => RXDATA,
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      RXVAL  => RXVAL,
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      RXERR  => RXERR,
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      RXACT  => RXACT,
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      TXSD   => TXSD,
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      TXDATA => TXDATA,
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      TXENA  => TXENA,
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      TXBUSY => TXBUSY
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    );
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end syn;

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