OpenCores
URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [vlib/] [serport/] [tb/] [tb_serport_uart_rx_stim.dat] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 wfjm 
# $Id: tb_serport_uart_rx_stim.dat 311 2010-06-30 17:52:37Z mueller $
2 
#
3 
#
4 
C setting rate=1  -> CLKDIV=0 ------------------------------------------------
5 
.wait 5
6 
.rate 1
7 
C test frame error (send 7,8,9,10 '0' bits, followed by 10 '1' bits)
8 
puls  1 0 11000000  0  7  1 10          -- VAL=1 ERR=0 DAT=11000000
9 
puls  1 0 10000000  0  8  1 10          -- VAL=1 ERR=0 DAT=10000000
10 
puls  1 0 00000000  0  9  1 10          -- VAL=1 ERR=0 DAT=00000000
11 
puls  1 1 00000000  0 10  1 10          -- VAL=1 ERR=1 DAT=00000000
12 
C test 1 stop bits
13 
puls  1 0 00000000  0  9  1  1          -- 1 stop bit VAL=1 ERR=0 DAT=00000000
14 
puls  1 0 11111111  0  1  1  9          -- 1 stop bit VAL=1 ERR=0 DAT=11111111
15 
puls  1 0 00000000  0  9  1  1          -- 1 stop bit VAL=1 ERR=0 DAT=00000000
16 
puls  1 0 11111111  0  1  1  9          -- 1 stop bit VAL=1 ERR=0 DAT=11111111
17 
C test 2 stop bits
18 
puls  1 0 00000000  0  9  1  2          -- 2 stop bit VAL=1 ERR=0 DAT=00000000
19 
puls  1 0 11111111  0  1  1 10          -- 2 stop bit VAL=1 ERR=0 DAT=11111111
20 
puls  1 0 00000000  0  9  1  2          -- 2 stop bit VAL=1 ERR=0 DAT=00000000
21 
puls  1 0 11111111  0  1  1 10          -- 2 stop bit VAL=1 ERR=0 DAT=11111111
22 
C test 3 stop bits
23 
puls  1 0 00000000  0  9  1  3          -- 3 stop bit VAL=1 ERR=0 DAT=00000000
24 
puls  1 0 11111111  0  1  1 11          -- 3 stop bit VAL=1 ERR=0 DAT=11111111
25 
puls  1 0 00000000  0  9  1  3          -- 3 stop bit VAL=1 ERR=0 DAT=00000000
26 
puls  1 0 11111111  0  1  1 11          -- 3 stop bit VAL=1 ERR=0 DAT=11111111
27 
C test 4 stop bits
28 
puls  1 0 00000000  0  9  1  4          -- 4 stop bit VAL=1 ERR=0 DAT=00000000
29 
puls  1 0 11111111  0  1  1 12          -- 4 stop bit VAL=1 ERR=0 DAT=11111111
30 
puls  1 0 00000000  0  9  1  4          -- 4 stop bit VAL=1 ERR=0 DAT=00000000
31 
puls  1 0 11111111  0  1  1 12          -- 4 stop bit VAL=1 ERR=0 DAT=11111111
32 
C test back-to-back data
33 
send  0  00000000
34 
send  0  00000001
35 
send  0  00000010
36 
send  0  00000100
37 
send  0  00001000
38 
send  0  00010000
39 
send  0  00100000
40 
send  0  01000000
41 
send  0  10000000
42 
send  0  11111110
43 
send  0  11111101
44 
send  0  11111011
45 
send  0  11110111
46 
send  0  11101111
47 
send  0  11011111
48 
send  0  10111111
49 
send  0  01111111
50 
send  0  00000000
51 
send  0  11111111
52 
send  0  00000011
53 
send  0  00001100
54 
send  0  00110000
55 
send  0  11000000
56 
C test data with 2 stop bits
57 
send  1  00000000
58 
send  1  00000001
59 
send  1  00000010
60 
send  1  00000100
61 
send  1  00001000
62 
send  1  00010000
63 
send  1  00100000
64 
send  1  01000000
65 
send  1  10000000
66 
send  1  11111110
67 
send  1  11111101
68 
send  1  11111011
69 
send  1  11110111
70 
send  1  11101111
71 
send  1  11011111
72 
send  1  10111111
73 
send  1  01111111
74 
send  1  00000000
75 
send  1  11111111
76 
send  1  00000011
77 
send  1  00001100
78 
send  1  00110000
79 
send  1  11000000
80 
C test data with 3 stop bits
81 
send  2  00000000
82 
send  2  00000001
83 
send  2  00000010
84 
send  2  00000100
85 
send  2  00001000
86 
send  2  00010000
87 
send  2  00100000
88 
send  2  01000000
89 
send  2  10000000
90 
send  2  11111110
91 
send  2  11111101
92 
send  2  11111011
93 
send  2  11110111
94 
send  2  11101111
95 
send  2  11011111
96 
send  2  10111111
97 
send  2  01111111
98 
send  2  00000000
99 
send  2  11111111
100 
send  2  00000011
101 
send  2  00001100
102 
send  2  00110000
103 
send  2  11000000
104 
#
105 
C setting rate=2  -> CLKDIV=1 ------------------------------------------------
106 
.wait 5
107 
.rate 2
108 
C test frame error (send 16,17,18,19,20 '0' bits, followed by 10 '1' bits)
109 
puls  1 0 10000000  0 16  1 10          -- VAL=1 ERR=0 DAT=10000000
110 
puls  1 0 10000000  0 17  1 10          -- VAL=1 ERR=0 DAT=10000000
111 
puls  1 0 00000000  0 18  1 10          -- VAL=1 ERR=0 DAT=00000000
112 
puls  1 0 00000000  0 19  1 10          -- VAL=1 ERR=0 DAT=00000000
113 
puls  1 1 00000000  0 20  1 10          -- VAL=1 ERR=1 DAT=00000000
114 
C test 1 stop bits
115 
puls  1 0 00000000  0 18  1  2          -- 1 stop bit VAL=1 ERR=0 DAT=00000000
116 
puls  1 0 11111111  0  2  1 18          -- 1 stop bit VAL=1 ERR=0 DAT=11111111
117 
puls  1 0 00000000  0 18  1  2          -- 1 stop bit VAL=1 ERR=0 DAT=00000000
118 
puls  1 0 11111111  0  2  1 18          -- 1 stop bit VAL=1 ERR=0 DAT=11111111
119 
C test 2 stop bits
120 
puls  1 0 00000000  0 18  1  4          -- 2 stop bit VAL=1 ERR=0 DAT=00000000
121 
puls  1 0 11111111  0  2  1 20          -- 2 stop bit VAL=1 ERR=0 DAT=11111111
122 
puls  1 0 00000000  0 18  1  4          -- 2 stop bit VAL=1 ERR=0 DAT=00000000
123 
puls  1 0 11111111  0  2  1 20          -- 2 stop bit VAL=1 ERR=0 DAT=11111111
124 
C test 3 stop bits
125 
puls  1 0 00000000  0 18  1  6          -- 3 stop bit VAL=1 ERR=0 DAT=00000000
126 
puls  1 0 11111111  0  2  1 22          -- 3 stop bit VAL=1 ERR=0 DAT=11111111
127 
puls  1 0 00000000  0 18  1  6          -- 3 stop bit VAL=1 ERR=0 DAT=00000000
128 
puls  1 0 11111111  0  2  1 22          -- 3 stop bit VAL=1 ERR=0 DAT=11111111
129 
C test 4 stop bits
130 
puls  1 0 00000000  0 18  1  8          -- 4 stop bit VAL=1 ERR=0 DAT=00000000
131 
puls  1 0 11111111  0  2  1 24          -- 4 stop bit VAL=1 ERR=0 DAT=11111111
132 
puls  1 0 00000000  0 18  1  8          -- 4 stop bit VAL=1 ERR=0 DAT=00000000
133 
puls  1 0 11111111  0  2  1 24          -- 4 stop bit VAL=1 ERR=0 DAT=11111111
134 
C test back-to-back data
135 
send  0  00000000
136 
send  0  00000001
137 
send  0  00000010
138 
send  0  00000100
139 
send  0  00001000
140 
send  0  00010000
141 
send  0  00100000
142 
send  0  01000000
143 
send  0  10000000
144 
send  0  11111110
145 
send  0  11111101
146 
send  0  11111011
147 
send  0  11110111
148 
send  0  11101111
149 
send  0  11011111
150 
send  0  10111111
151 
send  0  01111111
152 
send  0  00000000
153 
send  0  11111111
154 
send  0  00000011
155 
send  0  00001100
156 
send  0  00110000
157 
send  0  11000000
158 
C test data with 2 stop bits
159 
send  1  00000000
160 
send  1  00000001
161 
send  1  00000010
162 
send  1  00000100
163 
send  1  00001000
164 
send  1  00010000
165 
send  1  00100000
166 
send  1  01000000
167 
send  1  10000000
168 
send  1  11111110
169 
send  1  11111101
170 
send  1  11111011
171 
send  1  11110111
172 
send  1  11101111
173 
send  1  11011111
174 
send  1  10111111
175 
send  1  01111111
176 
send  1  00000000
177 
send  1  11111111
178 
send  1  00000011
179 
send  1  00001100
180 
send  1  00110000
181 
send  1  11000000
182 
C test data with 3 stop bits
183 
send  2  00000000
184 
send  2  00000001
185 
send  2  00000010
186 
send  2  00000100
187 
send  2  00001000
188 
send  2  00010000
189 
send  2  00100000
190 
send  2  01000000
191 
send  2  10000000
192 
send  2  11111110
193 
send  2  11111101
194 
send  2  11111011
195 
send  2  11110111
196 
send  2  11101111
197 
send  2  11011111
198 
send  2  10111111
199 
send  2  01111111
200 
send  2  00000000
201 
send  2  11111111
202 
send  2  00000011
203 
send  2  00001100
204 
send  2  00110000
205 
send  2  11000000
206 
#
207 
C setting rate=4  -> CLKDIV=3 ------------------------------------------------
208 
.wait 5
209 
.rate 4
210 
C test back-to-back data
211 
send  0  00000000
212 
send  0  00000001
213 
send  0  00000010
214 
send  0  00000100
215 
send  0  00001000
216 
send  0  00010000
217 
send  0  00100000
218 
send  0  01000000
219 
send  0  10000000
220 
send  0  11111110
221 
send  0  11111101
222 
send  0  11111011
223 
send  0  11110111
224 
send  0  11101111
225 
send  0  11011111
226 
send  0  10111111
227 
send  0  01111111
228 
send  0  00000000
229 
send  0  11111111
230 
send  0  00000011
231 
send  0  00001100
232 
send  0  00110000
233 
send  0  11000000
234 
C test data with 2 stop bits
235 
send  1  00000000
236 
send  1  00000001
237 
send  1  00000010
238 
send  1  00000100
239 
send  1  00001000
240 
send  1  00010000
241 
send  1  00100000
242 
send  1  01000000
243 
send  1  10000000
244 
send  1  11111110
245 
send  1  11111101
246 
send  1  11111011
247 
send  1  11110111
248 
send  1  11101111
249 
send  1  11011111
250 
send  1  10111111
251 
send  1  01111111
252 
send  1  00000000
253 
send  1  11111111
254 
send  1  00000011
255 
send  1  00001100
256 
send  1  00110000
257 
send  1  11000000
258 
#
259 
C setting rate=16 -> CLKDIV=15 -----------------------------------------------
260 
.wait 5
261 
.rate 16
262 
#
263 
C test resonse to start bit runts
264 
puls 0 0 00000000   0  1  1  20       -- will recover fast
265 
puls 0 0 00000000   0  2  1  20       -- "
266 
puls 0 0 00000000   0  3  1  20
267 
puls 0 0 00000000   0  4  1  20
268 
puls 0 0 00000000   0  6  1  20
269 
puls 1 0 11111111   0 10  1 200       -- will be taken as start bit
270 
#
271 
C test back-to-back data
272 
send  0  00000000
273 
send  0  00000001
274 
send  0  00000010
275 
send  0  00000100
276 
send  0  00001000
277 
send  0  00010000
278 
send  0  00100000
279 
send  0  01000000
280 
send  0  10000000
281 
send  0  11111110
282 
send  0  11111101
283 
send  0  11111011
284 
send  0  11110111
285 
send  0  11101111
286 
send  0  11011111
287 
send  0  10111111
288 
send  0  01111111
289 
send  0  00000000
290 
send  0  11111111
291 
send  0  00000011
292 
send  0  00001100
293 
send  0  00110000
294 
send  0  11000000
295 
C test data with 2 stop bits
296 
send  1  00000000
297 
send  1  11110000
298 
send  1  00001111
299 
send  1  11111111
300 
C test data with 3 stop bits
301 
send  2  00000000
302 
send  2  11110000
303 
send  2  00001111
304 
send  2  11111111
305 
C test data with 4 stop bits
306 
send  3  00000000
307 
send  3  11110000
308 
send  3  00001111
309 
send  3  11111111
310 
#
311 
C setting rate=32 -> CLKDIV=31 -----------------------------------------------
312 
.wait 5
313 
.rate 32
314 
C test back-to-back data
315 
send  0  00000000
316 
send  0  00000001
317 
send  0  00000010
318 
send  0  00000100
319 
send  0  00001000
320 
send  0  00010000
321 
send  0  00100000
322 
send  0  01000000
323 
send  0  10000000
324 
send  0  11111110
325 
send  0  11111101
326 
send  0  11111011
327 
send  0  11110111
328 
send  0  11101111
329 
send  0  11011111
330 
send  0  10111111
331 
send  0  01111111
332 
send  0  00000000
333 
send  0  11111111
334 
send  0  00000011
335 
send  0  00001100
336 
send  0  00110000
337 
send  0  11000000
338 
C test data with 2 stop bits
339 
send  1  00000000
340 
send  1  11110000
341 
send  1  00001111
342 
send  1  11111111
343 
C test data with 3 stop bits
344 
send  2  00000000
345 
send  2  11110000
346 
send  2  00001111
347 
send  2  11111111
348 
C test data with 4 stop bits
349 
send  3  00000000
350 
send  3  11110000
351 
send  3  00001111
352 
send  3  11111111
353 
#
354 
C setting rate=32 -> CLKDIV=31 ---- txrate = 31 !! ---------------------------
355 
.wait 5
356 
.rate  32
357 
.xrate 31
358 
C test back-to-back data
359 
send  0  00000000
360 
send  0  00000001
361 
send  0  00000010
362 
send  0  00000100
363 
send  0  00001000
364 
send  0  00010000
365 
send  0  00100000
366 
send  0  01000000
367 
send  0  10000000
368 
send  0  11111110
369 
send  0  11111101
370 
send  0  11111011
371 
send  0  11110111
372 
send  0  11101111
373 
send  0  11011111
374 
send  0  10111111
375 
send  0  01111111
376 
send  0  00000000
377 
send  0  11111111
378 
send  0  00000011
379 
send  0  00001100
380 
send  0  00110000
381 
send  0  11000000
382 
C test data with 2 stop bits
383 
send  1  00000000
384 
send  1  11110000
385 
send  1  00001111
386 
send  1  11111111
387 
C test data with 3 stop bits
388 
send  2  00000000
389 
send  2  11110000
390 
send  2  00001111
391 
send  2  11111111
392 
C test data with 4 stop bits
393 
send  3  00000000
394 
send  3  11110000
395 
send  3  00001111
396 
send  3  11111111
397 
#
398 
C setting rate=32 -> CLKDIV=31 ---- txrate = 33 !! ---------------------------
399 
.wait 5
400 
.rate  32
401 
.xrate 33
402 
C test back-to-back data
403 
send  0  00000000
404 
send  0  00000001
405 
send  0  00000010
406 
send  0  00000100
407 
send  0  00001000
408 
send  0  00010000
409 
send  0  00100000
410 
send  0  01000000
411 
send  0  10000000
412 
send  0  11111110
413 
send  0  11111101
414 
send  0  11111011
415 
send  0  11110111
416 
send  0  11101111
417 
send  0  11011111
418 
send  0  10111111
419 
send  0  01111111
420 
send  0  00000000
421 
send  0  11111111
422 
send  0  00000011
423 
send  0  00001100
424 
send  0  00110000
425 
send  0  11000000
426 
C test data with 2 stop bits
427 
send  1  00000000
428 
send  1  11110000
429 
send  1  00001111
430 
send  1  11111111
431 
C test data with 3 stop bits
432 
send  2  00000000
433 
send  2  11110000
434 
send  2  00001111
435 
send  2  11111111
436 
C test data with 4 stop bits
437 
send  3  00000000
438 
send  3  11110000
439 
send  3  00001111
440 
send  3  11111111
441 
#
442 
C setting rate=27 -> CLKDIV=25 ---- txrate = 26 !! ---------------------------
443 
.wait 5
444 
.rate  27
445 
.xrate 26
446 
C test back-to-back data
447 
send  0  00000000
448 
send  0  00000001
449 
send  0  00000010
450 
send  0  00000100
451 
send  0  00001000
452 
send  0  00010000
453 
send  0  00100000
454 
send  0  01000000
455 
send  0  10000000
456 
send  0  11111110
457 
send  0  11111101
458 
send  0  11111011
459 
send  0  11110111
460 
send  0  11101111
461 
send  0  11011111
462 
send  0  10111111
463 
send  0  01111111
464 
send  0  00000000
465 
send  0  11111111
466 
send  0  00000011
467 
send  0  00001100
468 
send  0  00110000
469 
send  0  11000000
470 
C test data with 2 stop bits
471 
send  1  00000000
472 
send  1  11110000
473 
send  1  00001111
474 
send  1  11111111
475 
C test data with 3 stop bits
476 
send  2  00000000
477 
send  2  11110000
478 
send  2  00001111
479 
send  2  11111111
480 
C test data with 4 stop bits
481 
send  3  00000000
482 
send  3  11110000
483 
send  3  00001111
484 
send  3  11111111
485 
#
486 
C setting rate=27 -> CLKDIV=27 ---- txrate = 28 !! ---------------------------
487 
.wait 5
488 
.rate  27
489 
.xrate 28
490 
C test back-to-back data
491 
send  0  00000000
492 
send  0  00000001
493 
send  0  00000010
494 
send  0  00000100
495 
send  0  00001000
496 
send  0  00010000
497 
send  0  00100000
498 
send  0  01000000
499 
send  0  10000000
500 
send  0  11111110
501 
send  0  11111101
502 
send  0  11111011
503 
send  0  11110111
504 
send  0  11101111
505 
send  0  11011111
506 
send  0  10111111
507 
send  0  01111111
508 
send  0  00000000
509 
send  0  11111111
510 
send  0  00000011
511 
send  0  00001100
512 
send  0  00110000
513 
send  0  11000000
514 
C test data with 2 stop bits
515 
send  1  00000000
516 
send  1  11110000
517 
send  1  00001111
518 
send  1  11111111
519 
C test data with 3 stop bits
520 
send  2  00000000
521 
send  2  11110000
522 
send  2  00001111
523 
send  2  11111111
524 
C test data with 4 stop bits
525 
send  3  00000000
526 
send  3  11110000
527 
send  3  00001111
528 
send  3  11111111
529 
#

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.